جستجوی استاد راهنمای دانشگاهی

Donatella Sciutoمشاهده پروفایل

استاد

• Embedded systems
• Multiprocessor System on Chip
• Reconfigurable systems
• +۵ مورد دیگر

Donatella Sciuto is a Full Professor in Computer Engineering at the Department of Electronics and Information of Politecnico di Milano, where she conducts research in System Architectures. She serves as Deputy Director of Education at CEFRIEL, managing executive company education training programs. Her academic career spans multiple leadership roles in professional organizations including the Council of EDA (CEDA) where she served as VP of Finance (2008-2009) and is currently President Elect. Her research focuses on embedded systems design methodologies, with particular expertise in Multiprocessor System on Chip, reconfigurable systems, hardware/software co-design, and design space exploration techniques. She leads the Embedded Systems Design and Design Methodologies research group (sagroup.elet.polimi.it) and has contributed significantly to the field of Electronic Design Automation. Her publication record shows a consistent focus on reconfigurable computing and MPSoC design, with recent work emphasizing dynamic reconfiguration techniques, hardware/software synchronization in multiprocessor systems, and optimization algorithms for heterogeneous architectures. Her research demonstrates a progression from foundational work in embedded systems to more complex system-level design methodologies for modern reconfigurable architectures. She has held editorial positions with prestigious journals including IEEE Transactions on Computers, Journal of Design Automation of Embedded Systems, and IEEE Embedded Systems Letters. She has served on program committees for major conferences including DAC, ICCAD, DATE, and CODES+ISSS, and has held leadership roles including Publications Chair for IEEE/ACM ESWEEK 2007 and Co-General Chair of ESWEEK 2009. Prof. Sciuto has advised more than 10 PhD students and currently mentors 4 PhD candidates at Politecnico di Milano. She teaches courses in Computer Architecture, Operating Systems, and High Performance Processors and Systems. She has published 5 teaching books in Italian across multiple editions and maintains active research collaborations through European and national research projects she coordinates.

Thidapat Chantemمشاهده پروفایل

دانشیار

• Real-time systems
• Embedded systems
• Cyber-physical systems
• +۷ مورد دیگر

Thidapat (Tam) Chantem is an Associate Professor in the Bradley Department of Electrical and Computer Engineering at Virginia Tech. He is affiliated with the Virginia Tech Research Center - Arlington and leads the RTX Lab. His research focuses on real-time systems, cyber-physical systems (CPS), and embedded systems security. He holds a Ph.D. from the University of Notre Dame (2011), M.S. from the same institution (2008), and a B.S. from Iowa State University (2005). His work integrates hardware-software co-design principles to address challenges in low-power computing, energy-aware system design, and secure embedded systems. Key projects include developing scheduling frameworks for CPS security, GPU-based real-time DNN inference, and vehicular edge computing solutions. He has secured grants from NSF and industry partners to advance time-sensitive CPS design and emergency response systems. His publications span ~150 articles since 2006, emphasizing real-time scheduling, embedded security, and traffic optimization. Notable contributions include DARIS (GPU spatio-temporal scheduling) and SGPRS (periodic deep learning workload management). He actively collaborates on NSF-funded projects like the Semi-Automated Emergency Response System (CPS Synergy grant). Professional service includes reviewing for top-tier journals/conferences and organizing workshops on real-time systems security. His RTX Lab develops solutions for connected vehicle systems, CPS trustworthiness, and energy-efficient multiprocessor architectures.

Stelios Neophytouمشاهده پروفایل

دانشیار

• Electronic Design Automation
• Integrated Circuit Design
• Test Pattern Generation
• +۳ مورد دیگر

Stelios Neophytou is an Associate Professor and Head of the Department of Engineering at the University of Nicosia. He holds a PhD in Computer Engineering from the University of Cyprus (2009) and a Bachelor's degree in Computer Engineering and Informatics from the University of Patras, Greece (2003). His research focuses on Electronic Design Automation, specifically developing algorithms for integrated circuit design verification and post-manufacturing testing. This includes methodologies for enhancing Automatic Test Pattern Generation (ATPG), test size compaction, and multiprocessing environments, alongside work on Built-In Self-Test architectures and graph-theoretic problems involving Binary Decision Diagrams. Dr. Neophytou has held academic roles such as Special Scientist and Teaching Assistant at the University of Cyprus (2003–2008) and Special Teaching Staff (2008). His expertise aligns with UN Sustainable Development Goals, particularly in advancing quality education and innovation. Notable contributions include research on IoT performance estimation frameworks, underwater sound classification using edge computing, and cross-national studies on automated vehicle acceptance. His work emphasizes scalability in testing processes, leveraging multicore systems and shared-memory architectures to improve efficiency. Recent studies explore real-time signal processing in IoT systems and agile edge classification for environmental monitoring. Dr. Neophytou maintains active collaborations in both technical and interdisciplinary research areas, contributing to both academic and practical advancements in engineering and computer science.

John L. Hennessyمشاهده پروفایل

استاد

• Computer Architecture
• RISC Technology
• Wireless Communication
• +۳ مورد دیگر

John L. Hennessy is a renowned computer scientist and former President of Stanford University (2000–2016). As a professor of Electrical Engineering and Computer Science since 1977, he pioneered RISC architecture and co-founded MIPS Computer Systems and Atheros Communications. He currently serves as the Shriram Family Director of the Knight-Hennessy Scholars program and chairs Alphabet’s board. His leadership revitalized Stanford’s financial aid and arts programs, and his research contributions include seminal work in computer architecture and parallel processing. Education: Bachelor’s in Electrical Engineering from Villanova University (1973) Master’s and Ph.D. in Computer Science from Stony Brook University (1975–1977) Hennessy’s research interests span computer architecture, RISC technology, and high-performance computing. He co-authored landmark textbooks Computer Architecture: A Quantitative Approach and Computer Organization and Design , which are industry standards. His leadership roles include Dean of Engineering, Provost, and President at Stanford, and board memberships at Alphabet and the Gordon and Betty Moore Foundation. His articles and books focus on multiprocessor systems, cache coherence, and hardware-software co-design, reflecting his deep impact on both academia and industry. Key awards include the ACM Turing Prize (2017), IEEE Medal of Honor (2012), and the Vannevar Bush Award (2024). Grants & Leadership: Launched Knight-Hennessy Scholars, the world’s largest graduate fellowship program Directed Stanford’s growth in interdisciplinary research and accessibility initiatives Hennessy’s legacy combines technical innovation with transformative leadership in higher education.

Sandhya Dwarkadasمشاهده پروفایل

استاد مهمان

• Parallel and distributed computing
• Computer architecture and networks
• Compiler-runtime-architecture integration
• +۵ مورد دیگر

Sandhya Dwarkadas is a Visiting Research Professor of Computer Science at the University of Rochester's Hajim School of Engineering & Applied Sciences. She holds a PhD from Rice University and has been recognized with an NSF Postdoctoral Fellowship and an NSF CAREER award. Her work focuses on parallel/distributed computing, architecture, and compiler-runtime integration. Education: PhD, Rice University Research Interests: Parallel and distributed computing Computer architecture and networks Compiler/Runtime/Architecture integration Software distributed shared memory Performance evaluation and simulation methodologies Awards: NSF Postdoctoral Fellowship NSF CAREER Award Projects & Contributions: Co-led the Cashmere and InterWeave distributed sharing projects, and leads the ARCH project (focusing on compiler/runtime/architecture integration for high-performance computing). Active in parallel applications development and uniprocessor/multiprocessor architecture analysis. Labs/Teams: ARCH Project leadership, collaborating on runtime systems and architecture optimization.

Ingo Sanderمشاهده پروفایل

استاد

• Embedded Systems Design
• Models of Computation (MoCs)
• Mixed-Criticality Systems
• +۳ مورد دیگر

Ingo Sander is a Professor in Electronic Systems Design at KTH Royal Institute of Technology, affiliated with the Digital Futures Faculty and the Division of Electronics and Embedded Systems. He joined KTH in 1993 and has held his current professorship since 2018. His research focuses on formal system design methodologies like ForSyDe, emphasizing embedded systems, mixed-criticality applications, and design automation. He co-founded the cross-disciplinary Digital Futures research center, which addresses societal challenges through digital technology innovation. Education: MSc in Electrical Engineering (Technical University of Braunschweig, 1990), PhD and Docent at KTH (2003, 2009). Professional experience includes work at Ericsson (1991–1993). Research Interests: Design methodologies for embedded systems, models of computation (MoCs), formal verification, and cyber-physical systems. Key contributions include the ForSyDe framework and design space exploration techniques for multiprocessor platforms. His work bridges theoretical foundations with practical implementations, targeting safety-critical and high-performance embedded systems. Teaching: Ingo Sander supervises numerous master’s degree projects in computer engineering, electrical engineering, and ICT innovation. He leads courses on embedded software, systems design, and simulation. Labs & Projects: Digital Futures collaborates with Stockholm University and RISE, advancing innovations in digital technologies. Sander’s projects include the SAFEPOWER initiative for energy-efficient mixed-criticality systems and CONTREX for control systems design.

Kunle Olukotunمشاهده پروفایل

استاد

• Computer Architecture
• Parallel Computing
• Multicore Processors
• +۵ مورد دیگر

Kunle Olukotun is the Cadence Design Systems Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a faculty member since 1991. He is a pioneer in multicore processor design, leading the Stanford Hydra CMP project and founding Afara Websystems (acquired by Sun Microsystems), which developed the Niagara processor. Currently, he co-leads SambaNova Systems as Chief Technologist and directs the Pervasive Parallelism Lab (PPL), focusing on domain-specific languages (DSLs) and machine learning infrastructure. Education: PhD in Computer Engineering from the University of Michigan (1991). Research interests include parallel computing architectures, transactional memory, and scalable systems. Awards include ACM Fellow, IEEE Fellow, and the Harry H. Goode Memorial Award. Key projects include the Hydra chip multiprocessor, Transactional Coherence and Consistency (TCC), and modern initiatives in dataflow architectures and AI acceleration. His work spans over 100 publications, emphasizing compiler design, hardware-software co-design, and high-performance computing. Current roles: Director of PPL and DAWN Lab, advisor to multiple students, and leader in industry collaborations like SambaNova’s dataflow accelerators. His research bridges academic innovation with commercial impact, addressing challenges in parallelism and scalable systems.

Panayiotis Yiannis Vrionisمشاهده پروفایل

پژوهشگر

• Fluid Mechanics
• Computational Fluid Dynamics
• Optimization Techniques
• +۳ مورد دیگر

Panayiotis Yiannis Vrionis is a computational scientist at the Computation-based Science & Technology Research Center (CaSToRC) of The Cyprus Institute. He holds a diploma in Mechanical Engineering from the National Technical University of Athens (NTUA) and a Ph.D. in Mechanical Engineering from NTUA, where his doctoral research focused on developing shape and topology optimization tools using the Adjoint and Cut-cell methods in fluid mechanics. His current research emphasizes computational methods applied to wetting hydrodynamics and fluid dynamics, with a particular interest in multiphase flows and high-performance computing environments. His work integrates advanced numerical techniques such as Cut-cell and Adjoint methods to address challenges in fluid mechanics, including cavitating flows and turbulent flow optimization. His academic background includes expertise in fluid dynamics simulation, numerical methods for solving Euler and Navier-Stokes equations, and parallel computing. Vrionis' contributions span theoretical advancements and practical applications, from optimizing engineering designs to studying condensation dynamics on heterogeneous surfaces. His publications reflect a consistent focus on computational methodologies and their deployment in multiprocessor systems. No scientific awards or advised students are explicitly mentioned in the provided information.

• Computer Science Education
• Computer Systems
• Object-Oriented Programming
• +۵ مورد دیگر

Mark A. Holliday is a Professor of Computer Science at Western Carolina University (WCU), where he has served since 2004. He holds a Ph.D. in Computer Science from the University of Wisconsin–Madison (1986) and has extensive experience in academia, including roles as Interim Department Head (2007–2009) and Visiting Research Scientist at institutions like the University of Portsmouth (UK) and the University of Toronto. His primary affiliation is with the Department of Mathematics and Computer Science at WCU. Education Background: Ph.D. in Computer Science, University of Wisconsin–Madison (1986) Master's in Computer Science, University of Wisconsin–Madison (1982) B.A. in Mathematics and Economics, University of Virginia (1978) Research Interests: Holliday focuses on enhancing computer science education, particularly in teaching methodologies for programming concepts (e.g., memory diagrams for object-oriented programming), computer systems, and networking. His work includes developing educational tools like interactive animations for network concepts and memory diagram assessments. He also explores performance analysis of parallel architectures and distributed computing. Prior Research Areas: Included grid computing, web services, memory reference traces in parallel systems, and shared memory multiprocessors. His recent projects include the National Storm Surge Database and applications for public access to environmental data. Advising & Grants: While no specific students are listed, Holliday has led curriculum development initiatives and collaborated on projects funded by institutions like the National Oceanic and Atmospheric Administration (NOAA). He has served on the ABET Computing Accreditation Commission since 2023, contributing to accreditation standards. Labs/Teams: His work involves interdisciplinary collaboration, including contributions to the Distributed Systems Group (University of Portsmouth) and the development of the Storm Surge Viewer application.

Annie Choquet-Genietمشاهده پروفایل

استاد

• Real-Time Systems
• Embedded Systems
• Scheduling Algorithms
• +۳ مورد دیگر

Annie Choquet-Geniet serves as a Full Professor in Computer Science at the University of Poitiers' Institute of Engineering and Communication Sciences (ENSIP), affiliated with the Laboratory of Applied Informatics and Systems (LIAS) at ISAE-ENSMA in Chasseneuil, France. Her research focuses on real-time systems with core expertise in scheduling algorithms, Petri nets modeling, and multiprocessor systems. Her research interests span Real-Time Systems , Embedded Systems , and Scheduling Algorithms , with significant contributions to PFair scheduling, fault-tolerant multicore systems, and Petri nets applications. Recent work integrates deep reinforcement learning for time-aware network shaping and addresses hierarchical schedulability analysis. Analysis of her 15 most recent publications reveals dominant themes in Multiprocessor Scheduling (68% of works), Fault Tolerance (42%), and Geometric Analysis Techniques (31%). Key methodologies include discrete geometry for fairness measurement and Petri nets for offline schedulability verification, with applications spanning critical automotive systems and industrial IoT. Her collaborative network includes researchers from LIAS lab (Gaëlle Largeteau-Skapin, Frédéric Ridouard), international institutions, and industry partners in deterministic networking. Current projects focus on IEEE 802.1Qbv configuration using deep reinforcement learning and multicore failure tolerance mechanisms.