جست‌وجوی استاد و پژوهشگر

Anuj Pathaniaمشاهده پروفایل

استادیار

• Low Power Design
• Sustainable Systems
• Electronic Design Automation
• +۴ مورد دیگر

Anuj Pathania serves as an Assistant Professor in the Parallel Computing Systems (PCS) group within the Informatics Institute at the University of Amsterdam's Faculty of Science. His research pioneers sustainable computing systems operating under severe power, thermal, and reliability constraints, with significant contributions to energy-efficient hardware design and embedded systems. Education: PhD in Computer Science (2018), Karlsruhe Institute of Technology MSc in Computer Science (2012), National University of Singapore B.Tech in Computer Science (2009), Maharaja Agrasen Institute of Technology Pathania's research centers on low-power design and sustainable systems for constrained environments, with particular expertise in thermal management of 3D-stacked architectures and energy-efficient machine learning inference . His work bridges electronic design automation with real-world reliability challenges, developing novel power budgeting techniques like T-TSP that incorporate transient temperature effects ignored by conventional methods. Current projects include EU-funded initiatives on energy labeling for digital services, addressing ecological impacts through technological, behavioral, and legal frameworks. His publication trajectory reveals a strategic evolution toward zero-waste computing , with recent work (2023-2025) focusing on hardware-software co-design for edge AI, energy modeling across computing continua, and parameter-efficient neural adaptation. Key themes include thermal-aware scheduling for S-NUCA many-cores, cooperative processor utilization in heterogeneous systems, and sustainability metrics for digital services. Scientific Recognition: Best Paper Award Nomination at IEEE Computer Society Annual Symposium on VLSI 2023 for 3D-TTP power budgeting technique Pathania actively mentors 4 PhD students (Ehsan Aghapour, Saeedeh Baneshi, Sudam Wasala, Yixian Shen) and has successfully supervised 5 Master's theses (including Cum Laude defenses by Joris op ten Berg and Jurre Wolff). His research is supported by major grants including Energy Labels for Ecologically Sustainable Digital Services (2023-2024) and Towards Zero-Waste Computing (2021-2025), developing simulation frameworks like HotSniper and CoMeT for thermal analysis. The PCS group maintains strong industry collaborations with ARM and NVIDIA, particularly through tools like ARM-CO-UP for heterogeneous processor utilization.

José Pineda de Gyvezمشاهده پروفایل

استاد

• Ultra-Low Power Design
• Variability Tolerance
• Context-Aware Computing
• +۳ مورد دیگر

José Pineda de Gyvez is Full Professor of Resilient Nanoelectronics at Eindhoven University of Technology (TU/e), affiliated with the Electronic Systems group in the Department of Electrical Engineering. He bridges academia and industry through practical experience in classrooms and technology innovation for industrial applications. His academic background includes a PhD from TU/e (1991), MSc from Instituto Nacional de Astrofísica, Óptica y Electrónica (Mexico) and University of Toronto (Canada) (1984). He previously served as faculty at Texas A&M University (1991–1999) and as Principal Scientist at Philips Research (1999–2006) and NXP Semiconductors (2006–present). Research interests focus on ultra-low power design , variability tolerance , and context-aware computing in semiconductor technology. Key trends in his publications include energy harvesting , subthreshold circuits , flip-flop optimization , and IoT power management . His work has shifted toward wearable medical devices and ultrasonic gesture recognition in recent years. Scientific Awards: IEEE Fellow (2009) He has co-authored over 100 publications, four books, and holds more than 30 US patents. His research is funded by the Dutch Ministry of Science, US Office of Naval Research, and National Science Foundation. Current projects include STW Zero 15-06 (energy harvesting), SILENSE (smart home transducers), and Wearable Brainwave Processing Platform (seizure detection).

• Integrated Circuits
• Analog Circuit Design
• Data Converters
• +۵ مورد دیگر

Harijot Singh Bindra is an Assistant Professor in the field of Integrated Circuit Design. His research focuses on analog and mixed-signal circuit design, with a strong emphasis on data converters, low-power electronics, and high-speed signal processing. He has contributed to advancements in ADC architectures, delta-sigma modulators, and radar systems. His work spans technologies like CMOS and FDSOI, addressing challenges in energy efficiency, noise reduction, and high-frequency operations. Notable research areas include sub-sampling ADC front-ends, programmable frequency translators, and latch-based circuits. His publications span IEEE journals and conferences, with contributions to both academic and applied domains. Bindra has also been involved in patent development, including a notable invention related to latch circuitry. His research aligns with applications in telecommunications, radar systems, and agricultural monitoring. Key collaborators include prominent figures like Bram Nauta and Erik Klumperink. Despite no listed student advisees or explicit grants, his prolific output since 2013 reflects sustained engagement in cutting-edge circuit design and signal processing.

• Neuromorphic Engineering
• Spiking Neural Networks
• CMOS Circuit Design
• +۳ مورد دیگر

Hugh Greatorex serves as a Researcher at the University of Groningen within the Faculty of Science and Engineering, affiliated with the Bio-inspired Circuits & Systems research group. His work centers on neuromorphic hardware design, specializing in spiking neural networks and event-based processing systems that prioritize energy efficiency and real-world applicability in robotics and embedded AI. His research spans critical areas in neuromorphic engineering: Neuromorphic Engineering Spiking Neural Networks CMOS Circuit Design Memristive Computing Event-based Vision and Audio Processing Symbolic Computation in Neural Hardware Greatorex integrates circuit design with neural algorithms to solve power efficiency challenges, frequently exploring beyond-CMOS technologies like memristors and multi-timescale neural dynamics for practical implementations. Analysis of his 14 recent publications (2022-2025) reveals a cohesive trajectory toward hybrid neuromorphic processors combining CMOS with emerging devices. Key contributions include the TEXEL and Fused-MemBrain architectures for beyond-CMOS integration, alongside advancements in event-based sensory processing and symbolic operations within spiking hardware. This work consistently bridges neural computation with symbolic AI paradigms while emphasizing scalability and robustness. No scientific awards were documented in available sources. Information regarding student advisement and research grants was not provided in the source materials. As a core member of Groningen's Bio-inspired Circuits & Systems group, Greatorex contributes to internationally collaborative projects focused on biologically inspired electronic systems for intelligent processing, with applications spanning edge AI and neural computation modeling.

• Parallel Computing Systems
• Multi-core Embedded Systems
• System-level Design
• +۵ مورد دیگر

Prof. A.D. Pimentel holds a full professorship at the Informatics Institute of the University of Amsterdam, leading the Parallel Computing Systems (PCS) group within the Systems and Networking Lab. His research focuses on multi-core and multi-processor systems, emphasizing performance, energy efficiency, dependability, and productivity in system design and runtime management. He earned his PhD and MSc in Computer Science from the University of Amsterdam in 1998 and 1993, respectively. Current roles: Chair of PCS group, Board member of Advanced School for Computing and Imaging (ASCI), and ICT Research Platform Nederland (IPN) Teaching: Courses on Multi-core Processor Systems, Embedded Software, and Architecture Research interests span edge AI, sustainable computing, and system-level modeling. Recent work includes innovations in energy-efficient scheduling, thermal management in 3D-stacked systems, and adaptive CNN inference at the edge. Over 25 years of contributions to embedded systems design space exploration and hardware/software co-design have been recognized through awards like the IEEE CEDA Outstanding Service Award (2025). Awards: IEEE DATE Fellow (2025), NWO Knowledge & Innovation Covenant grant lead Active in conference organization, serving as General Chair for Embedded Systems Week (2026) and Design Automation and Test in Europe (DATE 2024). Engages in cross-disciplinary projects like improved secure semiconductor evaluation (ISSE) and energy labeling for digital services.

• Embedded Systems
• Multi-Processor Systems
• Real-Time Systems
• +۳ مورد دیگر

Martijn L.P.J. Koedam is a researcher at the Electronic Systems department within the Electrical Engineering school at Eindhoven University of Technology . His work focuses on embedded systems, multi-processor architectures, and resource utilization optimization in real-time environments. Research areas: Embedded Systems, Multi-Processor Systems, Real-Time Systems External role: Founder/R&D at Verintec Solutions (since 2018) His research explores predictable and composable platforms for cyber-physical systems, emphasizing dynamic environments, quality-sensitive applications, and model-driven design. Projects like IMOCO4.E , TRANSACT , and I-MECH highlight collaborations with experts such as Kees Goossens and Sander Stuijk. Recent publications address resource utilization in multi-rate control systems, deployment frameworks for dynamic environments, and composable ROS2 architectures for robotics. These works intersect with disciplines like computer science, signal processing, and cyber-physical systems. He contributes to projects like COMP4DRONES and I-MECH , focusing on real-time systems and model-driven design. His external position at Verintec Solutions aligns with his technical expertise in embedded systems and MedTech innovation.

• Energy-Efficient Computing
• High-Performance Computing
• Compiler Techniques
• +۴ مورد دیگر

Kanishkan Vadivel is a Researcher in the Electronic Systems group at Eindhoven University of Technology (TU/e), specializing in energy-efficient hardware architectures and compiler-based code-generation techniques. He holds a Master’s degree in Embedded Systems from TU/e (2017) and a Bachelor’s from Coimbatore Institute of Technology (India). Prior to academia, he worked in embedded systems at Tata Engineering and Arm Ltd. Research Interests : His work focuses on computation-in-memory architectures using resistive devices, optimal code generation for CGRA (Coarse-Grained Reconfigurable Architecture), and high-performance computing. Key projects include the MNEMOSENE initiative and development of the CIM-SIM simulator for computation-in-memory systems. Awards : HiPEAC collaboration grant (2019) Advising & Grants : His research is supported by grants focused on neuromorphic processors and edge-AI hardware. He collaborates on projects like NEUROKIT2E for embedded deep learning systems. Labs/Teams : Active member of TU/e’s Electronic Systems Center and Efficient Stream Processing Lab, contributing to neuromorphic and energy-efficient computing initiatives.

• Neuromorphic Engineering
• Edge AI
• Computer Architecture
• +۴ مورد دیگر

Dr. A. Yousefzadeh is an Assistant Professor in Edge AI at the University of Twente (joined February 2024), affiliated with the Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS) within the Department of Computer Architecture Design and Test for Embedded Systems. He holds a Ph.D. in Neuromorphic Engineering from IMSE (Instituto de Microelectrónica de Sevilla), where his thesis focused on bio-inspired vision processing. His research specializes in neuromorphic computing systems, with emphasis on: Designing ultra-low-power AI processors and event-based vision systems Developing hardware accelerators for spiking neural networks (SNNs) Edge AI deployment for sensor-based applications Hardware-software co-design for energy-efficient computing His publication trends (2015-2025) reveal core foci on neuromorphic processor architectures (e.g., SENECA, NeuronFlow), event-based vision processing, hardware-aware neural network optimization, and 3D integration techniques. Recent work explores activation sparsification in transformers and hybrid analog-digital neuromorphic systems. Prior to academia, he contributed to industry neuromorphic projects: Architected the NeuronFlow processor at GrAI Matter Labs (acquired by Snap) Led SENECA processor development at imec's Hardware Efficient AI group He currently leads research on next-generation edge AI processors at UT's Embedded Systems lab.

Sherif Eissaمشاهده پروفایل

پژوهشگر

• Machine Learning
• Hardware Design
• Data Encoding
• +۴ مورد دیگر

Sherif Eissa is a PhD Candidate in the Electronic Systems group at the Department of Electrical Engineering, Eindhoven University of Technology (TU/e). His research focuses on neuromorphic computing for efficient real-time AI through hardware design, under the supervision of Prof. Henk Corporaal and Prof. Sander Stuijk. He is part of the national research project efficientdeeplearning.nl . Education: Bachelor of Information Engineering (cum laude), German University in Cairo (2016), with thesis at the Institute for Microelectronics Stuttgart (IMS) and University of Stuttgart. Master of Information Technology and Embedded Systems (cum laude), University of Stuttgart (2019), with thesis at Bosch Research Campus, Renningen. Research Interests: Machine Learning, Hardware Design, Data Encoding, Parallel Data Processing, Memory Structures, and Sparsity Utilization for Low-Power Edge AI. Awards: Best Achieving Student in overall grades (Bachelor's Degree). Best Achieving Student in overall grades (Master's Degree). Advising and Projects: Supervised 3 research works. Principal project: Efficient Deep Learning Platforms (eDLP) (2018–2023), focusing on Deep Learning Method, Energy Efficiency, and Hardware Platforms. Labs and Teams: Member of the Efficient Stream Processing Lab and the Electronic Systems group at TU/e.

Sander Stuijkمشاهده پروفایل

دانشیار

• Embedded Systems
• Signal Processing
• Multi-Core Architectures
• +۳ مورد دیگر

Sander Stuijk is an associate professor at the Department of Electrical Engineering of Eindhoven University of Technology, chairing the Electronic Systems (ES) group. His research focuses on design methodologies for embedded signal processing applications in high-tech systems like industrial manufacturing, automotive, and healthcare. He develops high-level compilation strategies for heterogeneous multi-core platforms, with interests in efficient code generation and resource allocation. Prof. Stuijk holds leadership roles including chairing the ES group, serving on the board of 4TU.NIRICT (a Dutch ICT research consortium), and coordinating the Embedded Systems master program. He contributes to national ICT initiatives through ICT Next Generation, a network for mid-career academics. He also chaired the Department Council (2016-2018) and participates in TPC activities. His research spans streaming applications, real-time systems, and multi-processor architectures. Notable projects include the PROMES initiative (programming embedded multi-media systems) and the MNEMEE project (automated MPSoC design). His work emphasizes predictable and energy-efficient computing, with applications in healthcare monitoring (e.g., remote PPG, thermal imaging) and reconfigurable systems. Prof. Stuijk has advised numerous PhD/Master students and led projects like FORSEE, VSM, and SenSafety. His publications include over 70 journal/conference papers, covering topics like neuromorphic computing, GPU optimization, and medical signal processing. He actively engages in academic service, including organizing SCOPES workshops and serving on editorial boards.

Andrew T. Nelsonمشاهده پروفایل

استادیار

• Embedded Systems
• Real-Time Systems
• Multi-Processor Systems
• +۴ مورد دیگر

Andrew T. Nelson is an Assistant Professor at the Eindhoven University of Technology , affiliated with the Electronic Systems department. His work focuses on predictable and composable embedded systems, particularly in multi-core architectures and real-time sensor fusion. Education: Master's thesis on simulation of multi-processor system-on-chip (2009). Projects: Involved in SCOTT, Enable-S3, ASSUME, and Research direct projects (2015-2024). Research Interests include embedded systems , multi-processor platforms , and sensor fusion for industrial applications. He has contributed to frameworks for motion control systems, resource management, and quality-sensitive deployments. Recent publications highlight trends in real-time computing , resource-constrained environments , and predictable embedded architectures , emphasizing multi-core systems and industrial automation.

• Multi-core embedded systems
• System-level design
• Modeling and simulation
• +۷ مورد دیگر

Andy D. Pimentel is a Full Professor at the University of Amsterdam, where he chairs the Parallel Computing Systems (PCS) group within the Systems and Networking Lab at the Informatics Institute. His research focuses on multi-core and multi-processor computer systems, with emphasis on design, programming, and run-time management. Dr. Pimentel earned his PhD in Computer Science in 1998 and MSc in Computer Science in 1993, both from the University of Amsterdam. His educational background laid the foundation for his extensive work in computer architecture and embedded systems. His research interests span a wide range of topics including multi-core embedded systems, system-level design and simulation, design space exploration, performance and power analysis, system dependability, hardware/software co-design, run-time resource management, and Edge AI. His work consistently addresses the extra-functional aspects of computing systems such as performance, energy consumption, and system dependability, while also considering the productivity of designing and programming these complex systems. Analyzing his recent publications reveals a clear trajectory toward sustainable and efficient computing systems. His work has evolved from foundational research in embedded systems design space exploration to cutting-edge research in Edge AI, distributed deep learning, and energy-efficient computing. His publications demonstrate strong interdisciplinary connections between computer architecture, artificial intelligence, and sustainable computing. IEEE CEDA Outstanding Service Recognition Award DATE Fellow Award Professor Pimentel has held significant leadership roles in the academic community, serving as Chair of the Board for the Advanced School for Computing and Imaging (ASCI) since 2021, and as a Board member of ICT Research Platform Nederland (IPN) since 2020. He has organized major conferences including serving as General Chair for Design Automation and Test in Europe (DATE) 2024 and IEEE/ACM Embedded Systems Week 2026. His extensive service to the community demonstrates his leadership in the field of computer architecture and embedded systems. At the University of Amsterdam, Professor Pimentel leads the Parallel Computing Systems group, which investigates the design, programming, and run-time management of multi-core and multi-processor systems. The group's research emphasizes modeling, analysis, and optimization of performance, power/energy consumption, and system dependability, while also focusing on improving the productivity of designing and programming these complex systems.

• Neuromorphic Computing
• Symbolic Computation
• Neural Networks
• +۳ مورد دیگر

Madison Cotteret serves as a Researcher in the Bio-inspired Circuits & Systems research group at the Faculty of Science and Engineering, University of Groningen (RUG), Netherlands. Her work focuses on neuromorphic computing and hardware implementations of neural networks and symbolic computation. Her research interests encompass the following areas: Neuromorphic Computing Symbolic Computation Neural Networks Computer Hardware Design Bio-inspired Circuits and Systems Event-based Vision Systems Recent publications reveal a cohesive research program centered on neuromorphic hardware for cognitive tasks. Key themes include distributed representations for multi-timescale symbolic computation, event-based vision for ego-motion estimation, and the design of low-power analog circuits for synaptic dynamics. Her work bridges theoretical models with practical hardware realizations, such as the TEXEL neuromorphic processor. Dr. Cotteret is an active member of the Bio-inspired Circuits & Systems group, which focuses on: Designing bio-inspired hardware solutions Developing neuromorphic processors Creating event-based vision sensors Implementing low-power computing systems

• Cryptography
• Post-Quantum Cryptography
• Cryptographic Engineering
• +۴ مورد دیگر

Peter Schwabe is a scientific director at the Max Planck Institute for Security and Privacy (MPI-SP) in Bochum, Germany, and a part-time professor for cryptographic engineering in the Digital Security Group at Radboud University in Nijmegen, The Netherlands. He has held these positions while leading significant research initiatives in post-quantum cryptography and high-assurance cryptographic implementations. His research interests center on post-quantum cryptography, cryptographic engineering, and high-assurance crypto software. Schwabe's work focuses on developing and verifying cryptographic implementations that are resistant to side-channel attacks while maintaining high performance. He has made significant contributions to lattice-based cryptography, hash-based signatures, and the standardization of post-quantum cryptographic algorithms. His research bridges theoretical cryptography with practical implementation concerns, particularly for resource-constrained environments. Analysis of Schwabe's recent publications reveals a strong focus on post-quantum cryptography standardization, formal verification of cryptographic implementations, and protection against side-channel attacks. His work spans theoretical advances in cryptographic primitives, practical implementations for real-world systems, and tools for verifying the security properties of cryptographic code. A significant portion of his recent work relates to the CRYSTALS-Kyber standard selected by NIST, including formal verification of its security properties and implementation correctness. Schwabe has served as an elected member of the IACR Board of Directors, member of the IACR CHES Steering Committee, and member of the IACR RWC Steering Committee. He is also a member of the advisory boards of Bitmark Inc., PQShield, Neutrality, and SciEngines, demonstrating his influence in both academic and industry cryptographic communities. As an advisor, Schwabe has supervised numerous Ph.D. students working on various aspects of cryptography, including post-quantum cryptography, side-channel resistance, and formal verification of cryptographic implementations. His work on the EPOQUE project (Engineering post-quantum cryptography), funded by an ERC Starting grant from October 2018 to December 2023, demonstrates his leadership in advancing post-quantum cryptographic research. Schwabe leads research efforts at the intersection of formal methods and practical cryptography, with a particular emphasis on creating high-assurance cryptographic implementations that can withstand both theoretical and practical attacks. His work often involves collaboration with international teams across academia and industry to advance the state of the art in cryptographic engineering.

Sem Borstمشاهده پروفایل

استاد

• Stochastic Networks
• Performance Evaluation
• Resource Allocation Algorithms
• +۶ مورد دیگر

Dr. Sem Borst is a Full Professor in Stochastic Operations Research at the Department of Mathematics and Computer Science, Eindhoven University of Technology (TU/e), holding this position since 1998. He maintains a part-time affiliation with Bell Labs' Mathematics of Networks and Systems research department since 1995. His academic background includes an MSc in Applied Mathematics (University of Twente, 1990) and a PhD (Tilburg University, 1994), with visiting appointments at Cambridge University's Statistical Laboratory (1994). Education: MSc (University Twente), PhD (Tilburg University) Affiliations: TU/e (1998-present), Bell Labs (1995-present) His research focuses on theoretical and algorithmic aspects of large-scale stochastic networks, particularly how local interactions influence macroscopic behavior. This work provides critical insights for designing low-complexity, distributed resource allocation algorithms that achieve near-optimal global performance. Key application domains include communication networks, call centers, and content distribution systems. Publication trends reveal consistent contributions to network optimization through: (1) distributed resource allocation algorithms, (2) wireless/wireline network performance modeling, (3) caching strategies for content delivery networks, and (4) stochastic stability analysis in dynamic environments. His methodological framework integrates Markov Random Fields, Gibbs Measures, and Processor-Sharing models. Academic roles include editorial board memberships at IEEE/ACM Transactions on Networking , Mathematical Methods of Operations Research , and Queueing Systems . Teaching activities at TU/e cover graduate courses in Queueing Systems, Stochastic Processes, and Risk/Reliability Analysis.