جستجوی استاد راهنمای دانشگاهی

Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.

• Reconfigurable Systems
• Hardware Design
• Digital Systems
• +۷ مورد دیگر

Luciano Lavagno is a Full Professor at the Department of Electronics and Telecommunications, Polytechnic University of Turin, with over two decades of academic and research contributions. His work bridges hardware acceleration, low-power electronics, and intelligent system design. Research Focus: Hardware-accelerated machine learning, high-level synthesis (HLS) for FPGA/ASIC, heterogeneous CPU/GPU/FPGA platforms Key Projects: SPACE (predictable acceleration), REBECCA (secure AI acceleration), HPC-National Center (quantum computing), and oral history preservation via "Ti racconto una storia" initiative His recent publications analyze CNN inference optimization, subgraph isomorphism, and superword-level parallelism exploitation. Lavagno supervises multiple PhD students working on FPGA acceleration, neural network hardware, and embedded systems. As Principal Investigator for national and EU-funded projects (PRIN, JTI-ECSEL, PNRR), he drives advancements in sustainable computing infrastructure. His patented technologies include MIx&Latch timing methodology, capacitive sensing innovations, and 5G acceleration frameworks.

• Field Programmable Gate Arrays (FPGA)
• High-Level Synthesis
• Indoor Positioning
• +۱۰ مورد دیگر

Andreas Peter Burg is a Tenured Associate Professor at the École Polytechnique Fédérale de Lausanne (EPFL), where he leads the Telecommunications Circuits Laboratory (TCL) within the School of Engineering. He holds multiple academic and administrative roles at EPFL including Associate Professor in Teaching (SEL, EDMI, EDEE), Director of SEL Management, and Member of the Doctoral Program Committee for Electrical Engineering. Dr. Burg received his Dipl.-Ing. degree in 2000 and Dr. sc. techn. degree in 2006 from ETH Zurich. His academic career includes positions as SNF Assistant Professor at ETH Zurich (2009-2011) before joining EPFL in January 2011 as a Tenure Track Assistant Professor, where he was promoted to Tenured Associate Professor in June 2018. His research focuses on circuits and systems for telecommunications , with particular expertise in silicon implementation of communication technologies, communication algorithms optimization for hardware, low-power VLSI signal processing, and digital integrated circuits. His work bridges theoretical communication concepts with practical circuit implementations, addressing challenges in wireless and wired communication systems. His recent publications (2024-2025) demonstrate a strong focus on next-generation communication technologies including 6G systems, advanced error correction coding, wireless sensing applications, and ultra-low power circuit design. These works span multiple subfields from LDPC and polar code decoding to RF signal processing and machine learning applications in wireless systems. Willi Studer Award (2000) ETH Medal for diploma thesis (2000) ETH Medal for Ph.D. dissertation (2006) Swiss National Science Foundation Assistant Professorship grant (2008) Dr. Burg has been involved in the development of more than 25 ASICs throughout his career and co-founded Celestrius, an ETH spinoff in MIMO wireless communication. His laboratory work focuses on practical implementations of communication algorithms with emphasis on power efficiency and hardware optimization. Current research directions include 6G technologies, wireless sensing applications, and novel error correction techniques for next-generation communication systems.

• Circuits and systems for telecommunications
• Silicon implementation of communication technologies
• Communication algorithms optimization
• +۵ مورد دیگر

Hossein Valavi is a Lecturer and Assistant Director of Undergraduate Studies at Princeton University, contributing to advancements in computer architecture and hardware acceleration. His research focuses on in-memory computing, neural networks, and energy-efficient systems, with notable work in reconfigurable architectures and mixed-signal processing. He has received multiple teaching awards, including recognition for innovative pandemic-era Car Lab courses and collaborative work honored by the Edison Patent Award. His academic contributions span academic positions since 2018, emphasizing both research and pedagogical excellence. Key technical areas include scalable in-memory computing systems, analog neural network accelerators, and low-power matrix factorization algorithms. His work addresses critical challenges in data movement reduction and hardware-software co-design for modern computing systems. Awards: Teaching Excellence Awards (2021, 2023), Edison Patent Award (2023) Grants & Projects: Leading developments in in-memory computing accelerators and embedded microprocessor designs Research teams under his guidance have produced impactful IP in semiconductor layouts, CNN accelerators, and programmable architectures, aiming to bridge theoretical computer science with practical hardware implementations.

• In-Memory Computing
• Neural Networks
• Hardware Acceleration
• +۳ مورد دیگر

Mark R. Greenstreet is a Professor in the Department of Computer Science at the University of British Columbia (UBC). He holds a BSc from Caltech (1981), MA (1988), and PhD (1993) in Computer Science from Princeton University. His primary research focuses on formal verification of analog and mixed-signal (AMS) circuits, VLSI design, and hybrid systems. Notable contributions include the STARI signaling technique, tools like Coho for reachability analysis, and PReach for parallel model checking. He has advised numerous graduate students and collaborators, including Brad Bingham, Chao Yan, and Yan Peng. His work has been recognized with a Best Paper Award at the ASYNC Symposium. Supported by NSERC, Intel, and Oracle, his research bridges theoretical foundations and practical challenges in circuit design and verification. He teaches courses on formal methods, computer architecture, and automata theory at UBC.

• Formal Verification
• VLSI Design
• Analog Circuit Verification
• +۳ مورد دیگر

Alireza Saberkari is an Associate Professor and Docent at Linköping University, affiliated with the Department of Electrical Engineering and the Division of Electronics and Computer Engineering (ELDA). His work bridges analog, digital, and mixed-signal electronics with applications in biomedical systems, wireless power, and energy-efficient integrated circuits. Research Interests: His research spans low-power analog and mixed-signal IC design, energy harvesting, RF circuits, and the miniaturization of Nuclear Magnetic Resonance (NMR) systems for portable spectroscopy. He is actively involved in developing integrated solutions for wireless cell fluorescence detection and intelligent surfaces for mid-range wireless power transfer. Recent Publication Trends: His recent publications (2024–2025) emphasize circuit-level innovations in switched-capacitor amplifiers, RF-DC rectifiers, and NMR front-ends, reflecting a strong focus on energy efficiency, integration, and system co-design for portable and biomedical applications. Scientific Projects: Nuclear Magnetic Resonance (NMR) Miniaturization for Spectroscopy (VR, 2023–2026) Efficient Mid-Range Wireless Power Transfer with Intelligent Surfaces (EMPTIS, ELLIIT, 2023–2027) ENGINED - Efficient Organic Energy Module (Vinnova, Phase I, 2023–2024) Micrometer-Scale Wireless Cell Fluorescence Detection Device (SSF Med-X, 2020–2024) Advising and Grants: While no formal students are listed, his leadership in multiple externally funded projects indicates active supervision and mentorship. He has secured funding from major Swedish research agencies including VR, ELLIIT, Vinnova, and SSF, demonstrating strong grant acquisition and collaborative research capabilities. Labs and Research Teams: He is a core member of the Electronics and Computer Engineering (ELDA) division at Linköping University, contributing to a multidisciplinary team focused on advancing electronics for real-world applications in healthcare, energy, and communication systems.

• Analog and Mixed-Signal Integrated Circuits
• Low-Power Electronics
• RF and Wireless Power Transfer
• +۷ مورد دیگر

Montek Singh serves as an Associate Professor and Associate Chair for Academic Affairs in the Department of Computer Science at the University of North Carolina at Chapel Hill. His research focuses on high-performance and energy-efficient digital systems with particular emphasis on asynchronous and mixed-timing circuit design. Dr. Singh received his Ph.D. in Computer Science from Columbia University in 2002 and his B.Tech. in Electrical Engineering from IIT Delhi, India, in 1993. His primary research interests span high-performance and low-power digital systems, with specialization in asynchronous or clockless and mixed-timing integrated chip design. His work encompasses circuit design methodologies, CAD tools for automated synthesis, analysis and optimization techniques. He has also explored applications in energy-efficient mobile graphics hardware, secure chip design for computer security, and design challenges in emerging computing technologies. His research has practical applications in industry, with work transferred to companies including IBM, Boeing, and Handshake Solutions. Analysis of Dr. Singh's publications reveals a strong focus on asynchronous circuit design spanning two decades. His work covers fundamental pipeline architectures (MOUSETRAP), high-speed asynchronous systems, latency-insensitive design methodologies, and practical applications in graphics hardware and mobile devices. The research demonstrates consistent innovation in making asynchronous design more practical for real-world implementation while addressing performance, power efficiency, and testing challenges. His notable scientific achievements include: Best Paper Award at the 6th IEEE Intl. Symp. on Adv. Res. in Async. Circ. and Syst. (ASYNC-2000) Best Paper Finalist at the 8th IEEE Intl. Symp. on Async. Circ. and Syst. (ASYNC-02) Dr. Singh has secured significant research funding including participation in the DARPA CLASS Program (led by Boeing) in 2005, where he collaborated with Philips/Handshake Solutions to develop an industrial-strength automated synthesis flow for high-speed asynchronous systems. His research has strong industry connections and practical applications, with technology transferred to major companies including IBM and Boeing. He has also organized major academic events such as the International Symposium on Asynchronous Circuits and Systems 2009 (ASYNC 2009) at UNC Chapel Hill. Dr. Singh leads research in asynchronous systems design with connections to industry partners and practical applications. His work has been featured in prominent media outlets including The New York Times, International Herald Tribune, and Technology Review Magazine, highlighting the significance of clockless design approaches as traditional synchronous design approaches face limitations.

• High-performance digital systems
• Low-power digital systems
• Asynchronous circuits
• +۵ مورد دیگر

Sule Ozev is a Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University (ASU). She holds a Ph.D. in Computer Science and Engineering from the University of California, San Diego (2002), and has been a faculty member since 2008. Her research focuses on analog and mixed-signal circuit testing, fault-tolerant systems, and RF circuit reliability. She has published over 100 papers and holds a U.S. patent. Notable awards include the NSF CAREER Award (2006) and the ASU Joseph Palais Distinguished Faculty Scholar Award (2023-2024). Her education includes: Ph.D., Computer Science and Engineering, UC San Diego (2002) M.S., Computer Science and Engineering, UC San Diego (1998) B.S., Electrical Engineering, Bogazici University, Turkey (1995) Research Interests: Self-test and calibration techniques for analog/RF circuits, fault simulation, and reliability enhancement. Recent work includes BIST solutions for power management units, MEMS sensor calibration, and IoT security. Publications span RF impedance measurement, low-power systems, and marine sensor applications. Awards also include best paper recognitions at IEEE VLSI Test Symposium (2022) and European Test Symposium (2019). Grants include NSF-funded projects on adaptive test strategies and collaborative research on sensor networks. Service roles include associate editor for IEEE Transactions on VLSI Systems and program chairs for major conferences.

• Self-test and self-calibration of circuits
• Fault-tolerant systems
• Analog and mixed-signal circuits
• +۳ مورد دیگر

Ahmedullah Aziz is an Assistant Professor in the Department of Electrical Engineering and Computer Science at the University of Tennessee, Knoxville, within the Tickle College of Engineering. He earned his Ph.D. in Electrical and Computer Engineering from Purdue University (2019), an M.S. from Pennsylvania State University (2016), and a B.S. from Bangladesh University of Engineering & Technology (2013). His research focuses on mixed-signal VLSI circuits, non-volatile memory, and beyond-CMOS device design, emphasizing emerging technologies like ferroelectrics and spintronics. He leads the NorDIC Lab and has published over 60 articles in journals, conferences, and patents. Education: PhD, Electrical & Computer Engineering, Purdue University, 2019 MS, Electrical Engineering, Pennsylvania State University, 2016 BS, Electrical & Electronic Engineering, BUET, 2013 Research Interests: Aziz explores device-circuit-system co-design techniques, particularly in cryogenic neuromorphic systems, superconducting memory, and ferroelectric-based circuits. His work bridges material innovation with practical applications, aiming to advance energy-efficient and high-performance computing. Awards: EDAA Outstanding Dissertation Award (2019/2020) Outstanding Graduate Student Research Award (Purdue, 2019) Samsung 'Icon' Award (2013) Best Publication Awards (SRC-DARPA STARnet, 2015/2016) Advising & Grants: While specific grants are not detailed, his research has been supported by prestigious institutions. He has advised/co-advised projects in emerging technologies but no listed students. His work extends to reviewing IEEE journals, conference TPC roles, and editorial contributions. Labs & Teams: He directs the NorDIC Lab, focusing on next-generation computing and device innovation.

• Mixed-Signal VLSI Circuits
• Non-Volatile Memory
• Beyond CMOS Device Design
• +۴ مورد دیگر

Dr. Saibal Mukhopadhyay is a Professor in the Department of Electrical and Computer Engineering at the Georgia Institute of Technology, where he joined in 2007. He holds the Joseph M. Pettit Professorship and is recognized as an IEEE Fellow for his contributions to low-power and reliable VLSI systems. Education: BEng (Jadavpur University, India), Ph.D. (Purdue University) Labs: Gigascale Reliable Energy Efficient Nanosystem (GREEN) Lab His research focuses on VLSI Systems , Nanotechnology , and Low-Power Electronics , with emphasis on technology-circuit co-design for energy-efficient computing. Recent work explores Compute-in-Memory (CIM) architectures and Spiking Neural Networks for edge AI. Key article themes include Transformer Model Acceleration , Quantum Computing Calibration , 3D Object Detection , and Device Aging Analysis , reflecting his interdisciplinary approach bridging hardware design and machine learning. Scientific Awards IEEE Fellow (2018) ONR Young Investigator (2012) NSF CAREER Award (2011) IBM Faculty Awards (2009, 2010) Best Paper Awards (IEEE-Nano 2003, ICCD 2004)

• VLSI Systems
• Nanotechnology
• Low-Power Electronics
• +۵ مورد دیگر

Labros Bisdounis is a Professor at the Department of Electrical and Computer Engineering, University of the Peloponnese, Greece. He previously held positions at the Technological Educational Institute of Western Greece, including Associate Professor, Full Professor, and Dean of the School of Technological Applications (2016–2018). He has extensive industry experience as a senior research engineer and project manager at Intracom S.A. (2000–2008), focusing on VLSI circuits and telecom applications. His research interests include CMOS circuit timing/power modeling, low-power/high-speed design, MOSFET modeling, and sensor applications. He has authored over 30 papers with 740+ citations and is an IEEE member. Education: Diploma in Electrical Engineering (1992), University of Patras Ph.D. in Electrical Engineering (1999), University of Patras Research Interests: CMOS circuit timing and power dissipation modeling Deep-submicron/nano-CMOS circuit design MOSFET device modeling Low-power embedded systems and SoC Sensor applications and organic electronics Leadership Roles: Dean of the School of Engineering, University of the Peloponnese (2023–present) Director of Training & Lifelong Learning Centre (2019–2019) Board Member, Hellenic NARIC (2016–2019) Collaborations: Active at the Hellenic Open University as a tutor in Computer Architecture and Digital Systems modules. Co-developed the AETHER framework for pervasive computing and contributed to energy-aware SoC designs for 5 GHz WLANs.

• CMOS Circuit Design
• Low-Power Electronics
• Embedded Systems
• +۴ مورد دیگر

Riadul Islam serves as an Assistant Professor in the Department of Computer Science and Electrical Engineering at the University of Maryland, Baltimore County (UMBC), maintaining his primary office in room 316 of the Information Technology and Engineering (ITE) Building. His academic appointment focuses on hardware design and verification within the institution's engineering framework. His educational qualifications include: Ph.D. in Computer Engineering from UCSC (2017) M.A.Sc. in Electrical and Computer Engineering from Concordia University, Montreal (2011) B.Sc. in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology (2007) Professor Islam's research centers on VLSI CAD tools and low-power digital/mixed-signal IC design , with significant contributions to current-mode clock networks, vehicular security systems, and error-robust circuit architectures. His work increasingly integrates machine learning for design automation while exploring neuromorphic computing applications and secure hardware implementations. This multidisciplinary approach bridges traditional IC design with modern AI-driven optimization techniques. Analysis of his 2023-2025 publications reveals three dominant research thrusts: (1) Machine learning applications in early-stage Design Rule Checking (DRC) prediction and clock network optimization, (2) Graph-based intrusion detection systems for automotive networks (particularly CAN bus security), and (3) Event-based vision systems and neuromorphic computing architectures. These areas demonstrate consistent innovation in merging hardware design with AI/ML methodologies for enhanced system reliability and efficiency. He directs the UMBC VLSI and SoC Research Group , which develops energy-efficient clocking networks, secure vehicular communication protocols, and compute-in-memory architectures. The lab maintains active collaboration with industry partners on hardware security and neuromorphic computing initiatives while supporting graduate student research in cutting-edge IC design methodologies.

• VLSI CAD
• Low-power IC Design
• Mixed-signal IC Design
• +۵ مورد دیگر

Dr. Sungyong Jung is a Research Professor in the Electrical Engineering Department at The University of Texas at Arlington. He leads the Integrated Sensing Circuits and Systems (ISCS) Laboratory, focusing on advancing integrated circuit (IC) design and embedded systems for applications in bio/chemical sensing, radar systems, and opto-electronics. His teaching responsibilities include courses like Digital VLSI Design, Analog Integrated Circuit Design, and Dissertation Research supervision. Research interests emphasize practical transitions from academic research to real-world applications through high-quality circuit design education and cutting-edge projects. The ISCS Lab collaborates globally to innovate in wireless systems, sensor networks, and embedded system solutions. Contact information includes the lab's Engineering Laboratory Building address and his email jung@uta.edu.

• Integrated circuits for bio/chemical sensing
• Embedded systems for bio/chemical sensing
• RF integrated circuits and systems
• +۴ مورد دیگر

Alan Mantooth is a Distinguished Professor holding the Twenty-First Century Research Leadership Chair in Engineering within the Department of Electrical Engineering at the University of Arkansas, Fayetteville. He serves as Director of the National Center for Reliable Electric Power Transmission (NCREPT), Executive Director for GRAPES (NSF I/UCRC) and SEEDS (DoE Center), and Deputy Director of the NSF Engineering Research Center for Power Optimization of Electro-Thermal Systems (POETS). His educational background includes: B.S. in Electrical Engineering, University of Arkansas M.S. in Electrical Engineering, University of Arkansas Ph.D. in Electrical Engineering, Georgia Institute of Technology Dr. Mantooth's research centers on analog/mixed-signal IC design, power electronics CAD, and semiconductor device modeling with emphasis on harsh-environment applications. His pioneering work in silicon carbide (SiC) and gallium nitride (GaN) power systems has enabled high-temperature operation for electric vehicles and renewable energy infrastructure, significantly advancing reliability in extreme conditions. His 2025 publications reveal strong trends toward AI-driven power electronics (e.g., SolarFormer++ for PV profiling), wide-bandgap device modeling (β-Ga2O3, SiC), and innovative packaging solutions. Key themes include reliability engineering for extreme environments, multi-physics optimization, and explainable AI for safety-critical power systems. Major scientific recognition includes: IEEE Fellow (2009) for power electronic device modeling Three R&D 100 Awards (2009, 2014, 2016) for SiC power modules IEEE Power Electronics Society Technical Achievement Award (2019) Multiple university teaching/research awards including SEC Faculty Achievement Award (2015) As an exceptional mentor (UA Outstanding Mentor 2006-2008), he co-founded Lynguent and Ozark Integrated Circuits. His centers NCREPT, GRAPES, and SEEDS have secured major funding from NSF, DoE, and industry partners, supporting over 350 refereed publications and numerous patents. Current research focuses on AI-enhanced power electronics, recyclable packaging, and next-generation wide-bandgap device characterization. He leads the NCREPT test facility and multi-institutional teams developing grid-connected power electronic systems, secure energy delivery architectures, and thermal management solutions for high-power-density applications, with direct impact on electric transportation and renewable energy integration.

• Analog and Mixed-Signal IC Design
• Power Electronics
• Semiconductor Device Modeling
• +۳ مورد دیگر

Atila Alvandpour serves as Professor and Head of the Integrated Circuits and Systems Division at Linköping University's Department of Electrical Engineering (ISY), concurrently holding the position of Vice Head of the Department. He joined the university in 2003 following senior research scientist roles at Intel Corporation's Circuit Research Lab (1999-2003). His educational foundation includes M.S. and Ph.D. degrees earned from Linköping University in 1995 and 1999 respectively. Alvandpour's research centers on advanced nano-scale integrated circuit design , with pioneering work in data converters (ADCs/DACs) , RF transceivers , and ultra-low-power systems . His expertise spans sensor interfaces, energy-harvesting architectures, and multi-GHz digital circuits, driving innovations for IoT and biomedical applications through novel analog/mixed-signal techniques. Recent publications (2024-2025) reveal a strategic focus on system-level integration for emerging technologies, particularly energy-efficient SoCs for wireless optical sensing, RF energy harvesting, and bio-implantable devices. This trend emphasizes circuit miniaturization, power optimization, and multi-functional integration in cutting-edge CMOS processes. No formal scientific awards are documented in the source materials. As Division Head and active researcher with 24 U.S. patents, Alvandpour leads a significant research group within the Division of Electronics and Computer Engineering (ELDA). His IEEE senior membership and editorial roles for flagship journals like IEEE Journal of Solid-State Circuits demonstrate substantial professional influence, though specific grant details remain unspecified.

• Integrated Circuits and Systems
• VLSI Design
• Analog and Mixed-Signal Circuits
• +۶ مورد دیگر