Kanad Ghose is a Distinguished Professor and Director of the Center for Energy-Smart Electronic Systems (ES2) at SUNY Binghamton's School of Computing. His research focuses on computer architecture, power-aware systems, high-performance computing, and cybersecurity. He leads projects in data center energy management, secure processor design, and flexible electronics for wearable health monitoring. Education: BTech/M.Tech from University of Calcutta; MS/PhD from Iowa State University Awards: SUNY Chancellor's Award, IBM Faculty Award, National Science Talent Search Research interests include energy-efficient microarchitectures, cybersecurity at the hardware level, and autonomous systems. Notable projects involve data center cooling optimization, secure execution validation, and wearable ECG sensors. His lab collaborates with industry partners like Intel, Lockheed Martin, and UC Berkeley's Arias group. Current projects include DC-powered data centers, FPGA accelerators, and flexible electronics for clinical-grade health monitoring. Past work includes the MARSSx86 simulator and ARINC-compliant avionics systems.
Martin Vogel is a part-time Lecturer at the Lucerne School of Computer Science and Information Technology (HSLU) since 2003. He holds a Master's degree in Electrical Engineering from ETH Zürich (1995). His academic role focuses on teaching subjects like Microcontroller Programming, Algorithms, and Computer Science fundamentals. Alongside his academic duties, he operates as a self-employed professional photographer, offering services for journalism, marketing, and portraits, including work for HSLU. Education: Master of Electrical Engineering, ETH Zürich (1995) Research & Professional Expertise: Vogel specializes in embedded systems, software/hardware development, and project management. His technical competencies include C/C++ programming, microprocessor technology, and Python scripting. His photography work complements his technical skills, with a focus on event, portrait, and architectural photography. Projects: He contributes to research initiatives such as the 'ITC - Big Data HSLU Cloud' and 'Autonomous Low-Cost Emissions Monitoring of Wood-Burning Stoves.' Teaching & Advising: No formal advisees are listed, but he instructs courses like 'PREN Project Module Product Development' and supervises bachelor theses. No grants are explicitly mentioned. Labs/Teams: Engaged in the HSLU's ITC projects, focusing on cloud computing and environmental monitoring systems.
Paul H J Kelly is a Professor of Software Technology at Imperial College London, leading the Software Performance Optimisation research group. He serves as co-Director of the Centre for Computational Methods in Science and Engineering and Director of Industrial Liaison for the HiPEDS Centre for Doctoral Training in High-Performance Embedded and Distributed Systems. Research Interests His research focuses on: Compiler technology for computational science Performance portability across heterogeneous architectures Domain-specific languages (DSL) for scientific computing Optimization of finite element methods and PDE solvers Data locality and parallelism trade-offs Computer vision algorithms and SLAM systems He actively collaborates with hardware vendors and application developers in computational science, robotics, and quantum chemistry. Article Trends Recent publications emphasize: Temporal and spatial tiling for PDEs and stencil computations Quantum circuit simulation optimization Distributed SLAM systems Performance portability frameworks (e.g., Firedrake, Devito) Compiler techniques for GPUs and custom accelerators Memory hierarchy optimization Scientific Awards Senior Member of the ACM (2021) Imperial College Engineering Faculty Teaching Excellence Award (2013) Best Robotics Paper at 18th Conference on Robots and Vision (2021) Student Mentoring He has mentored numerous PhD and postdoctoral researchers now in academic positions including: Luigi Nardi - Assistant Professor at Lund University Sajad Saeedi - Assistant Professor at Ryerson University Lawrence Mitchell - Assistant Professor at University of Durham Current students include Renato Salas-Moreno , David Ham , and Miklos Homolya .
Christopher Crispin-Bailey is a Senior Lecturer in the Department of Computer Science at the University of York. He holds a BEng and PhD from Teesside University. His research focuses on VHDL hardware synthesis, novel microprocessor architectures, stack-based processors, optimization of stack-oriented object code, multimedia server architectures, and bus arbitration methods. Career highlights include roles as a Teaching Research Fellow (1996–1997), Senior Lecturer at the University of Teesside (1997–1999), and Lecturer at the University of York since 1999. He currently holds the title of Senior Lecturer and is part of the Real-Time and Distributed Systems research group. His contributions span hardware design, embedded systems, and biomedical signal processing. He contributes to departmental roles as an Exam Paper Checker and Union Rep. His work emphasizes practical applications in both academic and industry contexts, with a focus on optimizing hardware and software systems for efficiency and scalability.
Valero Mateo is a Full Professor at the Department of Computer Architecture, Technical University of Catalonia (UPC), and Director of the Barcelona Supercomputing Center (BSC). He holds leadership roles in high-performance computing and computer architecture research, directing national and international projects like the BSC and CIRI. His career includes chairing departments, leading research institutes, and advising Intel's Microprocessor Lab. He has been recognized with prestigious awards, including the Eckert-Mauchly Award and multiple honorary doctorates. His research focuses on high-performance computing systems, parallel processing, and supercomputing infrastructure. Recent honors include the 2024 Vanguardia Innovation and Science Award and the inaugural Barceloní Prize. Affiliations: BSC (since 2004), UPC (since 1974), CEPBA (1990–1995). Education: Engineer in Telecommunications, UPC (1974). Research: Pioneering work in supercomputing architectures, energy-efficient computing, and parallel systems. Awards: Over 60 international awards, including ACM and IEEE Fellowships. Grants: ERC Advanced Grants, Spanish and European research funding. Labs/Teams: Leads BSC, collaborates with global institutions like NASA and IBM.
Ben Huey is an Associate Professor in the Department of Engineering at Arizona State University's College of Technology and Innovation. He joined ASU in 1979 and served as Chair of the Division from 2006. His roles include leadership in curriculum development for embedded systems and VLSI design. He holds a Ph.D. from the University of Arizona (1975). Research focuses on embedded systems, VLSI design languages, and computing education. Notable projects include NSF-funded embedded systems curriculum development (2001-2006) and brain mapping algorithms research (1993-1995). He actively contributes to accreditation bodies like ABET and CSAB, serving on criteria committees and visiting teams. Professional service includes roles with ABET International Activities Council, IEEE, and the Consortium for Embedded Systems. He is a senior member of multiple engineering societies including IEEE, ASEE, and Eta Kappa Nu.
Валентина Стоянова Кукенска е доцент и заведател на катедрата за Компютърни Системи и Технологии в Технически Университет - Габрово. Осъществява професионална дейност от 1984 г. с акцент в областта на автоматизираното проектиране, FPGA технологии и компютърни системи. Образованието й включва докторска степен (1999 г.) по тема „Разработка на модулна учебно-изследователска диалогова система за автоматизирано схемотехническо проектиране в електрониката“. Води курсове по автоматизация на инженерния труд, операционни системи и компютърни архитектури. Участлива е в международни и университетски проекти, включително в рамките на програмите TEMPUS и ERASMUS за модернизация на учебните програми и развитие на ICT инфраструктура. Има значителен вклад в разработка на учебни пособия и публикации в области на компютърните системи, FPGA и CAD системи. Нейните исследователски интереси се фокусират върху FPGA архитектури, автоматизирано проектиране на електронна апаратура, и интеграция на CAD технологии в образователните процеси. Участие в над 20 научни проекти и няколко публикации демонстрират нейния принос в областта на компютърната инженерия и образованието.
Jason H Losh is a Professor at the University of Texas at Arlington , affiliated with the College of Engineering in both the Department of Computer Science and Engineering and Department of Electrical Engineering . His career spans academia and industry, with roles at Motorola/Nokia and teaching expertise in embedded systems, SoC design, and wireless communication. Education : PhD, MS, BS in Electrical Engineering from the University of Texas at Arlington Research Interests focus on embedded systems, microprocessor design, and wireless networking. He has developed curricula for real-time operating systems, IoT, and hardware-software co-design, with patents addressing high-velocity wireless communication and cellular network optimization. Scientific Awards : CDMA Development Group recognition Telecommunication Industry Association honors Multiple internal Motorola engineering awards Service includes leadership roles on ABET accreditation, curriculum committees, and program coordination for embedded systems, FPGA/SoC, and cybersecurity certificates. He also advises Tau Beta Pi honor society and chairs CDMA standards groups.
José Barbosa is a Senior Researcher at the Research Centre in Digitalization and Intelligent Robotics (CeDRI) and an Invited Professor at the Department of Electrical Engineering, Polytechnic Institute of Bragança, Portugal. He holds a PhD in Automation and Computer Science from the University of Valenciennes (France) and has extensive experience in European-funded projects like ARUM, GRACE, DA.RE, GO0DMAN, and PERFoRM. His expertise spans Cyber-Physical Systems, Multi-Agent Systems, and manufacturing automation, with over 40 international publications. Research focuses on self-organizing manufacturing architectures, digital twins, and bio-inspired mechanisms. He teaches courses including Microcontroller/Microprocessor Systems, Automation, and Electric Propulsion. Projects emphasize Industry 4.0, zero-defect manufacturing, and intelligent products. His work intersects IoT, data analytics, and human-machine integration in industrial systems.
Deepthi Vaidhynathan is a Researcher IV in the Computational Science Center at the National Renewable Energy Laboratory (NREL), where she works in the Complex System Simulation and Optimization Group. Her research focuses on energy system integration, grid modeling and simulation, and high performance computing for scientific applications in power systems and building energy management. Her educational background includes: Bachelor of Electronics and Communication Engineering from Anna University Master of Electrical and Computer Engineering from the University of Colorado Boulder Deepthi's research spans energy systems integration, grid modeling, high performance computing, computer architecture, and control theory. She applies quantum computing principles and microprocessor optimization to develop advanced simulation tools for modern power grids with high renewable energy penetration. Her work bridges theoretical algorithms with practical energy system challenges. Analysis of her 2024-2025 publications reveals concentrated expertise in hybrid simulation techniques for inverter-dominated power grids and AI-enhanced control frameworks. She specializes in partitioning algorithms for large-scale electromagnetic transient simulations and neural-network-based predictive control for building energy systems, addressing critical needs in grid stability and renewable integration. Deepthi is an active contributor to NREL's Complex System Simulation and Optimization Group, which develops high-fidelity tools for modeling next-generation energy infrastructure. The group's work supports U.S. Department of Energy initiatives for grid modernization and renewable energy deployment. No scientific awards are documented in available sources. Public records indicate no formal student advising roles or disclosed grant funding details.
Guillaume Duc is an Associate Professor (Maître de Conférences) at Télécom Paris, affiliated with the Laboratoire Traitement et Communication de l'Information (LTCI) and the Systèmes Embarqués Critiques Autonomes team within the Computer Science and Networks Department. His expertise lies in embedded systems security, side-channel attacks, and secure architectures. Research Interests: His work spans embedded systems security , focusing on securing communication buses and memory architectures against espionage. He explores hardware support for software security , side-channel attacks (notably through the DPA Contest ), and secure memory encryption techniques. His research also delves into integrity checking , fault detection , and distributed security for multiprocessor systems. Publications & Patents: He has published extensively in top-tier journals and conferences, including Journal of Cryptographic Engineering , ACSAC , and CARDIS . His work covers topics like AES side-channel attacks, secure memory architectures, and Java Card vulnerabilities. He also holds multiple patents in secure memory allocation and electronic equipment monitoring. Teaching & Supervision: He leads several courses at Télécom Paris, including INF107: From Logic Gates to Operating Systems and SE203: Tools, Languages, and Practices for Microprocessor Systems . He is also involved in advanced Rust programming modules and has supervised PhD students. Labs & Teams: He is a key member of the Systèmes Embarqués Critiques Autonomes team at LTCI, contributing to cutting-edge research in secure and autonomous embedded systems.
Dr. Hong Yu is an Associate Professor in the Engineering Technology department at Fitchburg State University's School of Business and Technology. Specializing in wireless communication protocols, neural networks, and embedded systems, their research spans earthquake nowcasting, IoT applications, and industrial sensor development. Current projects include 5G network optimization and FPGA-based measurement systems. PhD in Electrical & Electronics Engineering from The Catholic University of America Active in NSF-funded initiatives like the Microcontroller Training System project Professional affiliations include IEEE Senior Membership and leadership roles in multiple IEEE chapters Teaches courses in microprocessor systems, digital electronics, and mobile application development Research focuses on merging biological neural network principles with technological applications, while maintaining expertise in analog electronics and environmental monitoring. Recent publications emphasize wireless protocol design (2021), color sensing automation (2021), and cross-platform smart home development (2020), showing consistent innovation across 5G networking, semiconductor design, and seismic analysis. Professional contributions include serving as Vice Chairperson in IEEE ROBOT Chapter (Worcester County) and IEEE AESS Chapter (Baltimore), plus judging robotics competitions like FIRST LEGO League.
Warren A. Hunt, Jr. is a Professor in the Department of Computer Sciences at The University of Texas at Austin. His research focuses on formal methods for hardware and software verification, computer architecture, low-power computing, and biological-inspired systems. He leads projects in specifying and validating computer memory models, extending the ACL2-based x86 specification, and exploring rapid single-flux quantum (RSFQ) computing. Research Interests Formal specification and verification of hardware/software systems Computer architecture and low-power design Biological-inspired computing ACL2 theorem prover applications X86 ISA modeling Notable Contributions Verification of complex microprocessor designs Development of formal tools for hardware/software co-verification Leadership in the FMCAD conference (chairman until 2020) Academic Collaborations Work with Centaur Technology on x86 processors Collaborations with industry partners (Intel, AMD, ARM) Keynote talks at international venues (Newton Institute, Royal Society) Publications (2017–2025) span formal verification of multipliers, self-timed circuits, RSFQ systems, and x86 machine-code analysis. His Google Scholar page lists all his work. PhD Students Current: Balasubraman Muthuvelu, Gavin Meil, Carl Kwan Graduates: Jun Sawada (1999), Sol Swords (2010), Shilpi Goel (2016), and others Leadership Chairman of FMCAD steering committee (1996–2020) Editorial roles in multiple FMCAD/CHARME conferences
Monday Ikhide is an Assistant Professor (Academic) at the CEES School of The Environment, Staffordshire University. He serves as the course director for Building Services degree Apprenticeships and teaches modules in Building Services Electrics and Intelligent Built Environment. His research focuses on protection systems for AC/DC grids, low-voltage DC distribution (LVDC), renewable energy integration, and smart infrastructure. Ikhide holds a Doctorate in Electrical & Electronic Engineering from Staffordshire University (2018), with postgraduate certificates in Technology-Assisted Learning and Research Skills. Education: Doctorate in DC Line Protection for HVDC Transmission (2018) MSc (Distinction) in Electrical Engineering Systems (2012) Postgraduate Certificates in Research Methods (2015) and Technology-Assisted Learning (2017) Research Interests: His work addresses critical challenges in DC grid protection, energy efficiency in buildings, and smart city infrastructure. Innovations include a novel time-domain protection algorithm based on traveling waves, supported by a £86,000 grant from General Electric Grid Solutions. This algorithm aims to enhance fault detection in DC grids, addressing a major barrier to their widespread adoption. Publications Trends: Recent articles focus on HVDC grid protection strategies, traveling wave-based methodologies, and energy optimization in built environments. Key contributions include wavelet transform applications, transient analysis, and backup protection systems for DC grids. Awards: BEST PAPER AWARD (2019) for contributions to power electronics research. Grants & Advising: Secured £86k grant from GE Grid Solutions. Actively supervises PhD students in DC grid protection and accepts applications for research in energy efficiency, smart cities, and LVDC systems. Collaborates on UN Sustainable Development Goals related to energy and infrastructure. Labs/Teams: Engaged in cross-disciplinary projects at Staffordshire University, focusing on smart grids, renewable integration, and intelligent building systems.
George Papadimitriou is an Assistant Professor in the Computer Engineering & Informatics Department at the University of Patras , Greece, hosted within the School of Engineering . His primary affiliation lies with the Computer Hardware and Architecture division, where he leads research and teaching activities focused on dependable, energy-efficient computer architectures. Education: PhD in Computer Science, Department of Informatics & Telecommunications, National and Kapodistrian University of Athens (2019) Post-doctoral researcher, Computer Architecture Lab, National and Kapodistrian University of Athens Research Interests: Dr Papadimitriou’s research lies at the intersection of computer architecture , energy efficiency , and microprocessor reliability . His work specifically targets: Robust and energy-efficient CPU/GPU/accelerator architectures Post-silicon validation techniques for catching elusive hardware bugs Silent data corruption detection and mitigation across the compute stack Characterization of voltage margins and power consumption in modern microprocessors Modeling and simulation of domain-specific accelerators for low-power, dependable operation More recently, his team has been extending these methodologies to RISC-V and neuromorphic photonic accelerators within large European consortia. Scientific Awards & Recognition: Eight HiPEAC Paper Awards for top-tier conference publications (MICRO, HPCA, ISCA) between 2017–2024 IEEE Transactions on Computers 2022 Best Paper Award for the article “Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers” TTTC/ITC Gerald W. Gordon Student Award 2023 Research Funding & Projects: Dr Papadimitriou is principal investigator or key technical contributor in multiple Horizon Europe and industry-backed projects that collectively exceed €50 M in funding. Current leadership roles include: DARE (Digital Autonomy for RISC-V in Europe) NEUROPULS (Neuromorphic Energy-Efficient Secure Accelerators) REBECCA (Reconfigurable Heterogeneous Highly Parallel Processing Platform) Vitamin-V (Virtual Environment & Tool-boxing for Trustworthy RISC-V Cloud Services) Intel, IBM, and Thales bilateral research contracts on energy-efficient and resilient microarchitectures Laboratory & Team: He leads the Energy-Efficient and Dependable Architectures (EEDA) research group at University of Patras, operating laboratory facilities for silicon measurement, FPGA emulation, and full-system simulation (gem5, MARSS, custom tools). The team currently comprises 3 PhD candidates, 2 post-docs, and several MSc thesis students collaborating with European and US partners.
