Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture
Stefano Fusi is an Associate Professor of Neuroscience at Columbia University's Vagelos College of Physicians and Surgeons, with joint affiliations at the Mortimer B. Zuckerman Mind Brain Behavior Institute and Kavli Institute. His laboratory focuses on computational modeling of neural circuits and neuromorphic engineering. Education PhD in Physics, Hebrew University of Jerusalem (1999) BS in Physics, Sapienza University of Rome (1992) Research Focus Fusi investigates how biological complexity supports neural computation through three primary domains: theoretical analysis of neural circuit dynamics, representational geometry in learning systems, and hardware implementations of brain-inspired algorithms. His work bridges machine learning, neurophysiology, and theoretical physics, emphasizing high-dimensional representations and memory optimization. Recent publications demonstrate consistent focus on neural coding principles across hippocampus, prefrontal cortex, and sensory systems, with innovations in modeling working memory, stress responses, and cross-species computational paradigms. Collaborations & Labs Leads an interdisciplinary laboratory collaborating with Columbia experimental neuroscientists, MIT engineers, and Stanford computational researchers to validate theoretical models. Current projects include neuromorphic hardware development and neural decoding of emotional states.
Vijay Kumar is the Nemirovsky Family Dean of Penn Engineering at the University of Pennsylvania, with faculty appointments in the Departments of Mechanical Engineering, Computer and Information Science, and Electrical and Systems Engineering. He is a leading figure in robotics and computer architecture research. Research Interests include robotics, particularly multi-robot systems and micro aerial vehicles (MAVs), as well as computer architecture innovations for machine learning, GPU acceleration, and datacenter efficiency. His work spans theoretical foundations and practical applications in autonomous systems and hardware optimization. Scientific Awards include: 1991 NSF Presidential Young Investigator Award 1996 Lindback Award for Distinguished Teaching 2012 ASME Mechanisms and Robotics Award 2014 Engelberger Robotics Award 2017 IEEE George Saridis Leadership Award Multiple best paper awards at DARS, ICRA, and RSS conferences Editorial Leadership includes serving as Editor of the ASME Journal of Mechanisms and Robotics and Advisory Board Member of AAAS Science Robotics Journal . His GRASP Lab team developed foundational frameworks for micro UAV testbeds and swarm robotics.
Nam Sung Kim is the W. J. "Jerry" Sanders III-Advanced Micro Devices Inc. Endowed Chair and holds a Professorship in Electrical and Computer Engineering at the University of Illinois. He is also affiliated with the Siebel School of Computing and Data Science, Coordinated Science Lab, and National Center for Supercomputing Applications (NCSA). His research focuses on computer architecture, memory systems, chiplet integration, and hardware security. Key areas include energy-efficient computing, processing-in-memory (PIM), and mitigating hardware vulnerabilities like rowhammer attacks. Kim has received prestigious awards including IEEE Fellow (2016), MICRO Hall of Fame (2018), NAI Fellow (2023), and NSF CAREER Award (2015). His work spans publications in top venues like ASPLOS and IEEE journals, addressing topics such as CXL-based memory systems, DRAM module optimization, and GPU architecture improvements. Collaborations emphasize interdisciplinary research in hardware-software co-design and emerging technologies. His labs and teams at Coordinated Science Lab and NCSA drive innovations in scalable computing, near-memory processing, and cloud infrastructure for AI workloads. Ongoing projects include developing resilient memory hierarchies and accelerating large-scale machine learning models through novel architecture designs.
Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.
Tosiron Adegbija is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Arizona, where he serves as Director of Graduate Studies and Thomas R. Brown Endowed Fellow. He is a member of the Graduate Faculty and actively contributes to research and teaching in computer architecture and embedded systems. Education: PhD in Electrical and Computer Engineering, University of Florida, 2015 MS in Electrical and Computer Engineering, University of Florida, 2011 BS in Electrical Engineering, University of Ilorin, Nigeria, 2005 His research centers on energy-efficient computing with a focus on bio-inspired computer architecture , including spiking neural network (SNN) accelerators and in-memory computing. He also explores domain-specific architectures , adaptable memory systems , and microprocessor optimizations for IoT . His work leverages novel memory technologies like STT-RAM to enhance performance and reduce energy consumption in embedded and resource-constrained systems. Recent publications highlight trends in hybrid SNN acceleration, domain-specific accelerator generation, and system-level design space exploration. His research is increasingly focused on neuromorphic computing, automated hardware design, and ultra-efficient architectures using emerging materials like antiferromagnetic tunnel junctions. Scientific Awards: National Science Foundation (NSF) CAREER Award (2019) Elected IEEE Senior Member (2020) Best Paper Award at IEEE ISVLSI (2014) Teaching Award, University of Arizona (2018) ACM GLSVLSI Travel Award (2015) He advises numerous graduate and undergraduate students, many of whom have pursued careers at institutions like Pacific Northwest National Labs, Micron Technology, and Amazon. He has secured significant funding, including a $1.9M NSF FuSE2 grant for energy-efficient computing. His lab collaborates with UA Physics, CMU, and UNL. He has also developed educational tools for Chipyard and RISC-V, supporting hands-on learning in computer architecture. Labs and Research Teams: Leads a research group focused on bio-inspired and domain-specific computing, fostering innovation in energy-efficient hardware. The lab emphasizes hardware/software co-design, neuromorphic engineering, and real-world deployment in IoT and biomedical applications.
Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.
Jee Choi is an Assistant Professor in the Department of Computer and Information Science within the College of Arts and Sciences at the University of Oregon. His research focuses on developing high-performance algorithms for big data analytics, particularly in tensor decomposition and parallel computing systems. Education: PhD in Electrical and Computer Engineering, Georgia Institute of Technology, 2015 MS in Electrical and Computer Engineering, Georgia Institute of Technology, 2004 BS in Electrical and Computer Engineering, Georgia Institute of Technology, 2000 Research Interests: Dr. Choi specializes in High Performance Computing with expertise in parallel algorithm design, performance modeling, and energy efficiency. His work targets Tensor Decomposition & Data Mining for big data, developing scalable solutions for sparse and dense tensor computations. He advocates leveraging HPC systems to transform massive datasets into societal benefits through efficient data mining techniques. Publication Trends: Choi's recent publications (2021-2025) demonstrate consistent innovation in tensor decomposition methodologies, with increasing focus on adaptive storage (Alto), streaming data factorization, and energy-aware autotuning. His work spans GPU clusters, distributed systems, and emerging architectures, maintaining strong connections to real-world big data challenges while advancing theoretical algorithm design. Professional Background: After completing his PhD under Richard Vuduc at Georgia Tech (notable for SpMV GPU autotuning and Energy Roofline Model), Choi conducted DoD-funded research on tensor decomposition at IBM Watson Research Center (2015-2018) before joining the University of Oregon faculty.
Mithuna S. Thottethodi is a Professor and Interim Associate Head of Teaching and Learning at the Elmore Family School of Electrical and Computer Engineering at Purdue University. He holds a B.Tech. from the Indian Institute of Technology, Kharagpur (1996), and a Ph.D. in Computer Science from Duke University (2002). His research focuses on computer architecture, interconnection networks, distributed systems, and security, with notable work on sparse tensor accelerators and processing-near-memory architectures. His work has been funded by the NSF, AT&T, and SK Hynix. Research interests include security, interconnection networks in multicores, storage performance optimization, and memory hierarchies. Notable contributions span hardware accelerators for machine learning, secure speculative execution, and datacenter network congestion control. He has advised over 20 graduate students, many of whom have joined top tech firms like Google, Microsoft, and Intel. Awards: NSF CAREER Award (2007) Wilfred Hesselberth Teaching Excellence Award (2021) Multiple Eta Kappa Nu Outstanding Professor Awards Teaching includes undergraduate courses like EE 437 (Computer Design) and graduate courses such as ECE 666 (Advanced Computer Architecture). He also advises VIP and EPICS student teams.
Callie Hao is an Assistant Professor in the Department of Electrical and Computer Engineering at the Georgia Institute of Technology since 2021, holding the ON Semiconductor Junior Professorship. Her research bridges hardware efficiency and algorithmic innovation with significant industry and federal recognition. Education: Ph.D. in Electrical Engineering, Waseda University (2017) M.S. and B.S. in Computer Science and Engineering, Shanghai Jiao Tong University Research Focus: Dr. Hao pioneers software/hardware co-design for edge AI, specializing in hardware-efficient machine learning algorithms, FPGA-based reconfigurable computing, graph neural networks, and electronic design automation (EDA). Her work emphasizes neural architecture search, high-level synthesis optimization, and memory-efficient systems for embedded and IoT applications, driven by the philosophy that "1 + 1 > 2" for transformative efficiency gains. Publication Impact: Her 15 most recent publications (2023-2026) reveal a strategic shift toward machine learning-driven EDA tools, with 60% focused on high-level synthesis frameworks and 40% on graph neural network acceleration. Key trends include simulation speed breakthroughs (LightningSim), automated accelerator generation (GNNBuilder), and cryptographic hardware innovations (Cryptonite), predominantly published in top-tier venues like MICRO, ICCAD, and DAC. Awards & Recognition: NSF CAREER Award (2024) and Intel Rising Star Faculty Award (2023) Best Paper Awards at MLCAD 2024 and GLSVLSI 2021 ON Semiconductor Junior Professorship (2025) and Sutterfield Family Early Career Professorship (2022) DAC-SDC competition championships (2018-2020) Mentorship & Funding: Dr. Hao advises 8+ Ph.D. students in the Sharc Lab, with Rishov Sarkar winning the Oscar P. Cleaver Award and Qualcomm Innovation Fellowship. Her research is funded by DARPA (2021) for ultra-light video intelligence systems and supported by industry awards from Amazon and Sony. She actively serves on program committees for DAC, ICCAD, and DATE conferences. Lab Leadership: As director of the Sharc Lab (Software/Hardware Co-design lab), she cultivates interdisciplinary research at the intersection of FPGA design, machine learning, and EDA, requiring expertise in Verilog/HLS, GNNs, and compiler technologies while maintaining strict focus on real-world hardware implementation.
Dr. Jing Li is an Associate Professor and Eduardo D. Glandt Faculty Fellow at the University of Pennsylvania , holding dual appointments in the Electrical and Systems Engineering and Computer and Information Science departments. As co-director of the CyberSavvy nationwide security research center and director of the Penn Computational Intelligence Lab (PennCIL) , she pioneers innovations in non-von Neumann computing paradigms. Her research spans post-CMOS technologies, in-memory computing, and hardware-software co-design for security and AI applications. PhD in Computer Engineering, Purdue University (2009) BSc in Electrical Engineering, Shanghai Jiaotong University (2004) Research Focus: Dr. Li's work addresses fundamental challenges in computer systems across the stack. Key areas include: In-Memory Computing: Liquid Silicon architecture combining RRAM with silicon CMOS through monolithic 3D integration Security Engineering: Transforming computer security from "Art" to formal "Engineering" discipline within CyberSavvy Virtualization: Cloud FPGA abstraction layers decoupling compilation from runtime resource management Graph Analytics: Degree-aware optimization techniques for massive-scale graph processing Deep Learning Systems: Roofline model extensions for FPGA-based CNN acceleration Scientific Impact: Awarded DARPA Young Faculty Award , NSF CAREER Award , and IBM CEO Milestone Award , her team has achieved world records in energy-efficient computing (ENIAD supercomputer). With 46 U.S. patents and over 80 publications, she leads ecosystem development for emerging computing architectures through initiatives like the open-source MEG simulation platform . Community Leadership: Dr. Li serves on program committees for flagship conferences ( ISCA , FPGA Symposium ), chairs the International Memory Workshop , and contributes to the MLsys conference's inaugural committee. She actively mentors through multiple PhD openings and industry collaborations.
Franz Franchetti is the Kavčić-Moura Professor of Electrical & Computer Engineering at Carnegie Mellon University. He serves as Associate Dean for Research and Director of the Engineering Research Accelerator at CMU. Education: Ph.D. in Computational Mathematics (Vienna University of Technology, 2003) M.Sc. in Technical Mathematics (Vienna University of Technology, 2000) His research interests focus on automatic performance tuning and program generation for emerging parallel computing platforms , including multicore CPUs , GPUs , and 3DIC chip design . He leads the SPIRAL effort to automate highly optimized software libraries and explores domain-specific compiler transformations in HPC applications for smart grids and material sciences . Recent work extends SPIRAL to quantum computing . The scientific awards Franchetti has received include the Gordon Bell Prize (2006) , HPC Challenge Class II Award (2010) , and the CIT Dean's Early Career Fellowship (2013) . He and his students have won multiple Best Paper Awards at HPEC, DAC, and ISPA ACM TODAES Best Paper (2014) Student Research Competition wins (PACT 2024, CGO 2023) Franchetti has advised students like Richard Veras and Thom Popovici . He has secured significant grants from agencies such as DARPA, DOE, NSF, and industry partners (Intel, NVIDIA, Mercury). He co-founded SpiralGen, Inc. and holds leadership roles in organizations like ASciNA Western Pennsylvania and as Honorary Consul of Austria in Pittsburgh.
Gene Cooperman is a Professor at the Khoury College of Computer Sciences at Northeastern University, with an affiliation in the College of Engineering. His research focuses on high-performance computing (HPC), transparent checkpoint-restart systems, and model checking. He leads the High Performance Computing Laboratory, where he explores checkpointing technologies like DMTCP, MANA for MPI, and CRAC for CUDA, aiming to enhance HPC workflows on supercomputers such as NERSC's Perlmutter. His work bridges distributed computing, parallel algorithms, and system software to address challenges in fault tolerance, scalability, and resource management. Cooperman has advised 10 PhD students and co-authored over 125 refereed publications, contributing to projects like Geant4-MultiThreaded and Roomy for disk-based computation. His teaching includes courses on computer systems and HPC seminars. Education: Background in computational algebra and parallel computing, transitioning to HPC systems and checkpointing. Research Themes: Transparent checkpointing, MPI agnostic solutions, CUDA integration, and HPC resource optimization. Recent articles emphasize MPI checkpointing, reversible debugging (FReD), and CUDA support, reflecting trends in distributed and GPU-accelerated systems. His grants include NSF, NERSC/DOE, and MemVerge funding. Cooperman collaborates with institutions like CERN and NERSC, advancing applications in particle physics simulations and supercomputing. Current students include Aayushi Gautam, Jiajun Cao, Rohan Garg, and Twinkle Jain.
Kenneth Ross is a Professor in the Computer Science Department at Columbia University in New York City. His primary appointment is within the Department of Computer Science, with affiliations including the Foundations of Data Science Committee. His work bridges theoretical database research and practical system implementation. His research focuses on database systems with particular expertise in query processing, query language design, data warehousing, and architecture-sensitive database system design. Additional research spans computational biology, especially analysis of large genomic data sets. Current projects include Linear Algebra Operators in Databases for machine learning workloads and Repeats and Somatic Mutation analysis in genomics. His work consistently addresses the intersection of hardware capabilities and database system design. Ross leads the Database Research Lab at Columbia, which has produced significant work on query optimization, GPU database processing, and hardware-conscious database systems. His recent publications demonstrate strong focus on adapting database systems to modern hardware including GPUs, SIMD processors, and persistent memory. His scientific recognition includes: Packard Foundation Fellowship Sloan Foundation Fellowship NSF Young Investigator Award Distinguished Faculty Teaching Award (2008) Ross actively advises undergraduate engineering students (juniors with last names P-Z) and has taught foundational courses including Introduction to Databases and Programming and Problem Solving for over two decades. His teaching portfolio shows consistent engagement with both theoretical concepts and practical implementation challenges in computer science education.
Emmett Witchel is a Professor of Computer Science at the University of Texas at Austin , with research spanning computer architecture, systems, networking, security, and privacy . His work focuses on low-level systems optimization and secure concurrent execution. Research Interests: Concurrent systems, secure execution environments, GPU integration, distributed systems. Teaching: CS 380L (Advanced Operating Systems), CS 371M (Mobile Computing). Scientific Awards: Runner-up Best Paper, ASPLOS 2013 Runner-up Award for Outstanding Research, USENIX Symposium 2012 IEEE Micro Top Pick Award 2007 ACM Honorable Mention 2004 George M. Sprowls Award, MIT EECS 2004 Recent Publications demonstrate leadership in CXL pod databases ( Tigon ), stateful serverless computing ( Boki ), SmartNIC-accelerated file systems ( LineFS ), and GPU security ( Telekine ). His work bridges hardware-software co-design and practical systems implementation.
