Shiyu Su is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on high-speed data converters, wireless transceivers, digital phase-locked loops (PLL), and AI-assisted analog/mixed-signal design automation. He holds a Ph.D. from the University of Southern California (2019) and teaches courses such as ECE 340 (Electronic Circuits 2) and ECE 432 (Radio Frequency Integrated Devices and Circuits). Education: B.S. from Beijing University of Post and Telecommunication (China) and Queen Mary, University of London (UK), 2011; M.S. and Ph.D. from USC, 2013 and 2019, all in electrical engineering. Research Interests: High-speed ADCs/DACs RF/mm-wave transceivers Time-approximation filters (TAF) Analog/mixed-signal design automation Memristor-based computing Biomedical interfaces Key Awards: IEEE SSCS Predoctoral Achievement Award (2017–2018) Best Student Paper Award at IEEE RFIC (2022) Ming Hsieh Institute Scholar (2019–2020) Lab Focus: The Shiyu Su Lab develops integrated circuits for communications, sensing, and computing, with a focus on AI-driven methodologies and digital-analog co-design. Collaborations include work with Prof. Wei Wu (USC) on memristor-based systems.
Judith Driscoll is Professor of Materials Science at the University of Cambridge in the Department of Materials Science & Metallurgy. She holds the prestigious Royal Academy of Engineering Chair in Emerging Technologies and serves as a Visiting Staff Member at Los Alamos National Laboratory. As the founding Editor-in-Chief of APL Materials, she has significantly contributed to the materials science community. Dr. Driscoll's research focuses on Energy Efficient Oxide Materials for Information and Communications Technologies and energy devices. Her work spans the development of non-volatile memory, resistive switching devices, and ferroelectric materials for neuromorphic computing applications. She investigates oxide thin films for applications ranging from data storage to energy generation and conversion, with particular emphasis on creating more energy-efficient device technologies to handle the exponential growth of data-centric applications. Her recent publications demonstrate strong trends in developing novel oxide-based memory devices with improved energy efficiency, particularly for AI applications. The work shows significant progress in hafnium-zirconium oxide ferroelectrics, resistive switching mechanisms, and vertically aligned nanocomposite structures for enhanced device performance. These innovations address critical challenges in reducing the unsustainable energy demands of modern computing, particularly for artificial intelligence systems. Fellow of the Royal Academy of Engineering Fellow of the Materials Research Society Fellow of the American Physical Society Fellow of IOM3, IOP, and Women Engineers Society Fellow of the American Academy of Arts and Sciences Recipient of ERC Advanced Grant Editor-in-Chief of APL Materials Dr. Driscoll leads a vibrant research group that has secured significant funding including her Royal Academy of Engineering Research Chair, an ERC Advanced Grant, and an ECCS-EPSRC grant in collaboration with researchers from the USA. She has founded the Cambridge Centre for Neuromorphic Computing (Neucam) in 2023. Her group operates world-leading growth equipment including pulsed laser deposition with RHEED control, high temperature oxide sputtering, and spatial ALD systems. She collaborates extensively across the University of Cambridge and with international partners to solve complex materials challenges, with her group's role often being to identify optimal materials for functional goals, predict fabrication methods, and then create and characterize these materials.
Manoj Sachdev is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, Faculty of Engineering. His research focuses on semiconductor devices, low-power electronics, and secure hardware systems. He leads projects in flexible electronics, nanotechnology, and radiation-hardened circuits, with applications in displays, memory technologies, and biomedical sensors. His work integrates advanced materials science with circuit design to address challenges in energy efficiency and security. Education: Not explicitly stated in provided text. Research interests span thin-film transistors (TFTs), resistive switching memories, neuromorphic computing, and physically unclonable functions (PUFs). Recent efforts include developing low-power circuits for flexible substrates and secure microprocessors. His contributions to semiconductor device physics and integration techniques have advanced applications in wearable electronics and medical diagnostics. Publications highlight innovations in low-power flip-flops, energy-efficient display drivers, and memristor-based systems. He collaborates on interdisciplinary projects combining photonics, nanoelectronics, and biomedical engineering. Awards: None explicitly listed in provided text. Grants and advising: Advises on semiconductor fabrication, secure hardware design, and radiation effects in electronics. Leads research groups focused on next-generation memory technologies and flexible integrated systems. Labs/Teams: Active in the University of Waterloo's semiconductor and flexible electronics research clusters, contributing to both academic and industry partnerships.
Jingtong Hu is an Associate Professor at the Swanson School of Engineering, University of Pittsburgh, where he also holds the William Kepler Whiteford Faculty Fellowship. His research focuses on Cyber-Physical Systems and Infrastructure Security, with significant contributions to embedded systems, non-volatile memory architectures, and hardware/software co-design for energy-constrained environments. Dr. Hu received his PhD from the University of Texas at Dallas (2007-2013) and his Bachelor of Engineering from Shandong University (2003-2007). His research spans multiple interdisciplinary areas including energy harvesting systems, non-volatile processors, FPGA acceleration, and machine learning at the edge. His recent publications demonstrate a strong focus on algorithm-hardware co-design, particularly for vision transformers, federated learning, and non-volatile memory systems. His work often addresses the challenges of implementing AI on resource-constrained edge devices, with emphasis on energy efficiency, reliability, and performance optimization. The trend in his publications shows increasing focus on sustainable AI processing, heterogeneous computing architectures, and personalized machine learning for IoT applications. Selected Awards: IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award (2021) ACM SIGDA Meritorious Service Award (2019) Multiple Best Paper Award nominations at top conferences including DAC, ASP-DAC, and CODES+ISSS Dr. Hu's research has been supported by multiple grants focusing on energy-efficient computing, non-volatile memory systems, and hardware acceleration for machine learning. His collaborative work spans numerous institutions and involves interdisciplinary teams working at the intersection of computer architecture, embedded systems, and artificial intelligence. His publications show extensive collaboration with researchers at the University of Pittsburgh, particularly with Albert K. Jones and Yiyu Shi. His laboratory work focuses on implementing practical systems for energy harvesting powered devices, non-volatile processors, and hardware accelerators for machine learning applications. Current projects appear to emphasize sustainable AI processing at the edge, heterogeneous FPGA acceleration, and personalized federated learning for health monitoring applications.
Mark Lee is an Adjunct Professor in the People Analytics department at NYU’s Tandon School of Engineering, specializing in Technology Management and Innovation. He holds a Ph.D. in Engineering Psychology from Georgia Institute of Technology (1996). Currently, he serves as Head of Research, Analytics, and Business Development at UL ComplianceWire, focusing on pharmaceutical and medical device manufacturing training. His research leverages large datasets to improve healthcare safety through regulatory compliance and best practices. Courses taught include Human Factors Engineering, Workplace Design, and Predictive Analytics. Education: Ph.D. in Engineering Psychology, Georgia Tech (1996) Key Roles: Adjunct Professor, Head of Research at UL ComplianceWire Research Focus: Human Factors, Training Systems Design, Healthcare Compliance His work spans auditory display systems for aviation (e.g., 3D audio cockpit interfaces) and ergonomic design for industrial products. Recent projects emphasize data-driven solutions for regulatory challenges in life sciences. Publications highlight studies on visual search strategies, age-related cognitive performance, and application of signal detection theory in decision-making. He actively collaborates with industry and government entities, exemplified by the FDA-UL Cooperative Research Agreement.
Margus Pärtlas is Professor of Music Theory and Vice Rector for Academic Affairs and Research at the Estonian Academy of Music and Theatre (EAMT). He earned his Doctorate from the St. Petersburg Conservatory in 1992 with a dissertation on Eduard Tubin's symphonies. His career includes positions as Associate Professor (1993-2003), Senior Teacher (1987-1993), and Fulbright Visiting Scholar at the University of North Texas (1999-2000). Pärtlas's research focuses on music analysis methodologies , specializing in the works of Eduard Tubin and Richard Strauss. Key areas include symphonic form, tonal transformation in Romantic music, semiotic analysis of choral works, and cultural identity in exile compositions. His publications consistently explore structural innovation in 19th-20th century European music. His recent articles reflect a thematic emphasis on Estonian musical heritage , institutional development of music academies, and analytical studies of concerti/symphonies. A significant trend involves examining how composers negotiate cultural identity through structural elements. Awards & Honors: Fulbright Visiting Scholar Grant (1999) Best Music Article Award from 'Teater. Muusika. Kino' (1992) Academic Leadership: Chaired accreditation committees internationally (Latvia, Lithuania, Russia, Armenia), serves on editorial boards of Res Musica and Eduard Tubin's Complete Works, and organized major conferences including 'Eduard Tubin 100'. Doctoral Supervision: Guided 4 PhD students in music analysis and interpretation, focusing on topics like Tubin's piano sonatas, Estonian song traditions, and analytical approaches to contemporary performance.
Holger Fröning is a full professor at Heidelberg University’s Institute of Computer Engineering (ZITI), where he leads the Hardware and Artificial Intelligence (HAWAII) Lab. His research focuses on embedded machine learning , high-performance computing , and hardware-software co-design , with emphasis on resource efficiency, power optimization, and emerging architectures like analog , photonic , and resistive memory systems. He has held leadership roles including Managing Director of ZITI (2023–present) and Dean of Studies for Computer Science (2019–2022) , and has collaborated with institutions such as NVIDIA Research, Chinese Academy of Sciences, and Graz University of Technology. Research Trends : His recent publications explore Bayesian neural networks , green machine learning , analog computing noise mitigation , and GPU/FPGA optimization . Articles highlight photonic computing for AI , memory-efficient training , and hardware-aware DNN compression . Scientific Awards : 2025 HiPEAC Paper Award (Nature Computational Science) 2014 Google Faculty Research Award Multiple Best Paper Awards (IPDPS, ICPP, ECML-PKDD workshops) Leadership & Service : Organized workshops (WEML, ITEM, F4HD), chaired tracks at EuroPar and ISC, and served on program committees for ICPR, ECAI, and FPL. Education & Affiliations : PhD and MSc from University of Mannheim (2007/2001). Sponsors include DFG, FWF, FFG, NVIDIA, SAP, and XILINX.
Paolo Ienne is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), where he leads the Processor Architecture Laboratory (LAP) within the School of Computer and Communication Sciences. His research focuses on advancing reconfigurable computing systems through innovative FPGA architectures and high-level synthesis methodologies. His primary research domains include reconfigurable computing, FPGA architecture design, dynamically scheduled dataflow circuits, and hardware acceleration techniques. Recent work emphasizes memory system optimization for FPGAs, formal verification of circuit transformations, and rapid C-to-hardware compilation flows. He has pioneered approaches for handling thousands of outstanding memory misses in FPGA accelerators and developed novel techniques for switch-block exploration without explicit pattern enumeration. Analysis of his 2023-2025 publications reveals a strong trend toward practical FPGA deployment challenges, with increasing focus on HBM integration, virtual memory systems for PCIe-attached devices, and formally verified circuit transformations. His work consistently targets real-world bottlenecks in high-level synthesis toolchains while maintaining theoretical rigor in dataflow architecture design. Professor Ienne's laboratory receives support from the Swiss National Science Foundation and industry partners including Huawei, enabling cutting-edge research in FPGA-based acceleration. His collaborative network spans major semiconductor companies and academic institutions worldwide, with frequent co-authorship on conference proceedings and journal publications in IEEE and ACM venues.
Jundong Li is an Assistant Professor at the University of Virginia with primary appointment in the Department of Electrical and Computer Engineering and secondary appointments in Computer Science and the School of Data Science. He is affiliated with the School of Engineering and Applied Science and conducts research at the intersection of machine learning, data mining, and artificial intelligence. Education: Ph.D. in Computer Science, Arizona State University, 2019 M.Sc. in Computer Science, University of Alberta, 2014 B.Eng. in Software Engineering, Zhejiang University, 2012 His research focuses on graph machine learning , trustworthy and fair AI , and large language models . He investigates how to make deep learning models more interpretable, robust, and equitable, especially in graph-structured data and NLP applications. His work combines causal inference, feature selection, and model explanation techniques to build reliable AI systems. His recent publications (2024–2022) reveal a strong trend toward large language models , with topics including in-context learning, knowledge editing, and collaborative reasoning. Simultaneously, he continues pioneering research on fairness and interpretability in graph neural networks , addressing structural bias, adversarial attacks, and node attribution. His work is highly interdisciplinary, spanning computer science, data science, and social impact. Scientific Awards: SIGKDD Rising Star Award (2024) PAKDD Best Paper Award (2024) NSF CAREER Award (2022) SIGKDD Best Research Paper Award (2022) JP Morgan Faculty Research Award (2021, 2022) Cisco Faculty Research Award (2021) Stanford/Elsevier Top 2% Scientist (2024) Jundong Li actively advises graduate students, as seen in his co-authored papers with researchers like Song Wang, Yushun Dong, and Binchi Zhang. His research is generously funded by the National Science Foundation (NSF) through multiple programs including CAREER, III, SaTC, SAI, and S&CC, as well as by the Department of Energy (DOE) , Office of Naval Research (ONR) , Jefferson Lab , and industry partners including JP Morgan, Cisco, Netflix, and Snap . He leads a dynamic research group focused on advancing the frontiers of graph learning and trustworthy AI, with projects on causal inference, model unlearning, and explainable systems. His lab contributes to both theoretical foundations and real-world applications in public health, transportation, and network security.
Jonathan M. Baker is an Assistant Professor in the Department of Electrical and Computer Engineering at The University of Texas at Austin, holding the Advanced Micro Devices Chair in Computer Engineering. His research centers on quantum computer architecture with emphasis on practical quantum error correction implementation across the quantum computing stack. His educational background includes a Ph.D. in Computer Science from the University of Chicago (advised by Fred Chong) and dual B.S. degrees in Mathematics and Chemistry and Computer Science from the University of Notre Dame. Baker's research spans quantum compilation, logic synthesis, multi-radix architectures, and error mitigation for both near-term and fault-tolerant quantum systems. His work addresses critical challenges in quantum hardware-software co-design, with particular focus on optimizing quantum circuits for real-world hardware constraints and noise characteristics. Current projects emphasize qudit-based computing, neutral atom architectures, and efficient error correction implementations. His publication record shows strong focus on quantum architecture innovations, with recent work exploring qudit advantages, modular chiplet designs, and dynamic noise adaptation. Key trends include hardware-aware compilation techniques, communication optimization across quantum systems, and practical approaches to fault tolerance. Best Paper Award Runner Up, MICRO 2020 IEEE Micro Top Pick, 2020 (Virtualized Logical Qubits) IEEE Micro Top Pick, 2020 (Extending Frontier with Qutrits) IEEE Micro Top Pick, 2021 (Emerging Technologies) Best Poster Award, MICRO 2018 Baker actively mentors graduate students in quantum computing architecture research and serves on conference review committees including MICRO and ASPLOS. His teaching includes specialized quantum systems courses at UT Austin and online EdX modules covering quantum computation fundamentals and architecture. He collaborates with the Duke Quantum Center and maintains strong industry connections through the AMD Chair position, focusing on bridging academic research with practical quantum computing implementations.
H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University, where he has been since 2004. He holds the rank of Professor in the Department of Electrical Engineering and serves as the Director of the Stanford Nanofabrication Facility. Prior to Stanford, he spent 16 years at IBM’s T.J. Watson Research Center and served as Vice President of Corporate Research at TSMC (2018–2020), remaining as Chief Scientist in an advisory role thereafter. Leadership roles include founding the Stanford SystemX Alliance and leading the Microelectronics Commons AI Hardware Hub funded by the CHIPS Act. Research focuses on nanotechnology, semiconductor devices, and next-generation computing architectures, including carbon nanotube electronics, 3D integration (N3XT/MOSAIC), and neuromorphic computing. Awarded IEEE Fellow (2001), the IEEE Andrew S. Grove Award, and the J.J. Ebers Award for contributions to electron devices. His work spans device physics, fabrication, and system integration, with over 600 publications. Key contributions include advancements in phase-change memory, carbon nanotube transistors, and compute-in-memory systems. He advises numerous students and collaborates with industry through initiatives like the Stanford Non-Volatile Memory Technology Research Initiative. Recent efforts emphasize AI hardware acceleration, cryo-CMOS for quantum computing, and scalable memory architectures. His lab innovations include CellChips for synthetic biology and hyperdimensional computing using 3D RRAM.
Prof. Bryan Ford leads the Decentralized/Distributed Systems (DEDIS) lab at EPFL. He focuses on secure decentralized systems, including blockchain technology, privacy, and systems security. He earned his Ph.D. from MIT and held faculty positions at Yale University and EPFL. His work spans distributed consensus protocols, peer-to-peer networking, and privacy-preserving systems. Key projects include QuePaxa (timeout-free consensus), UIA (global connectivity for mobile devices), and MedCo (secure healthcare data sharing). He advises numerous PhD students and contributes to open-source projects like Bitcoin collective signing and privacy networks like Riffle. Education: Ph.D., MIT; Postdoctoral work at Yale Research interests include blockchain scalability, consensus algorithms, and cryptographic privacy. His lab develops systems like TRIP for coercion-resistant voting and F3B to mitigate blockchain front-running. His work on NAT traversal and peer-to-peer protocols (e.g., STUN/ICE) remains foundational in network architecture. He emphasizes practical, auditable security solutions such as CertiKOS and atomic cross-chain transactions (Atom). Notable contributions: CoSi (collective signing), OmniLedger (sharded blockchain), and privacy-preserving protocols like PURBs (Protected Unsealable Recursive Boxes). His lab collaborates with Swiss Post to audit e-voting systems and designs democratic cryptocurrencies like PoPCoin.
Prof. Baker Mohammad serves as Professor and Director of the System on Chip Lab in the Department of Computer and Information Engineering at Khalifa University. With over 15 years of industrial experience at Intel and Qualcomm designing microprocessors and DSP chips, he bridges academic research with real-world engineering challenges in high-performance computing and low-power systems. His educational background includes: Ph.D. in Electrical and Computer Engineering, University of Texas at Austin (2008) M.S. in Electrical and Computer Engineering, Arizona State University B.S. in Electrical Engineering, University of New Mexico Dr. Mohammad's research spans cutting-edge domains where VLSI design converges with AI acceleration and emerging memory technologies . His work pioneers Memristor applications in environmental sensing (radiation, vacuum, glucose) and neuromorphic computing, while advancing energy harvesting systems for wearable electronics. The integration of in-memory computing with security primitives represents a paradigm shift in hardware design, moving beyond traditional CMOS limitations. His publication trajectory reveals accelerating focus on self-powered neuromorphic systems and RRAM-based architectures, with recent work (2021-2023) emphasizing hardware-software co-design for edge AI. Over 75% of his recent publications involve cross-disciplinary collaborations spanning materials science, chemistry, and biomedical engineering. Notable scientific recognition includes: IEEE TVLSI Best Paper Award 2016 IEEE MWSCAS Myrill B. Reed Best Paper Award Qualcomm Qstar Award for Performance Leadership KUSTAR IP Excellence Award Multiple SRC Techon Best Session Papers As a dedicated mentor, he has supervised over 15 graduate students while securing competitive funding from Khalifa University, ADEK, Qualcomm, Tii, and UAE space agencies. His grant portfolio demonstrates exceptional translational impact, converting fundamental research in memristive devices into drone flight computers and medical sensors. Current projects integrate academic rigor with industrial deployment timelines. The System on Chip Lab operates as a multidisciplinary hub where semiconductor physicists collaborate with AI researchers to develop RISC-V-based secure processors and piezoelectric nanogenerator systems. Recent expansions include partnerships with Tii for aerospace applications and medical device startups for glucose monitoring technology.
Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.
Professor Ben Goldys is a distinguished academic at The University of Sydney's School of Mathematics and Statistics, where he conducts research at the intersection of pure mathematics and applied sciences. His work spans multiple disciplines including stochastic analysis, partial differential equations, and financial mathematics, with significant contributions to both theoretical frameworks and practical applications in science and finance. Goldys' research interests center on stochastic (ordinary and partial) differential equations and their applications. His specific focus areas include stochastic partial differential equations, stochastic geometric PDEs, stochastic boundary value problems, stochastic fluid dynamics, ergodic theory of infinite-dimensional diffusions, and applications in financial mathematics such as interest rate derivatives, credit risk, and stochastic volatility. His work bridges pure mathematical theory (Functional Analysis, PDEs, Ergodic Theory) with complex real-world problems across multiple domains. His research aligns with the University of Sydney Faculty of Science Research Strengths including Understanding the Universe, Fundamental Laws of Nature, Complex Systems, and Next Generation Materials. Professor Goldys has secured multiple significant research grants from the Australian Research Council, including recent projects such as 'Mathematics for future magnetic devices' (2024), 'Mathematics for breaking limits of speed and density in magnetic memories' (2019), and 'Novel Approaches for Problems with Uncertainties' (2015). His current research projects focus on geometric stochastic partial differential equations and applications in micromagnetism, mean field games in finance, stochastic boundary value problems, and stochastic Navier-Stokes equations on the rotating sphere. He maintains extensive international collaborations with institutions in Germany (University of Tuebingen), Italy (LUISS University), Poland (Institute of Mathematics Polish Academy of Sciences), and the United Kingdom (University of York), working on projects involving optimal control, stochastic systems with memory, and geometric stochastic PDEs. Goldys is an active member of the Applied Mathematics Research Group and The University of Sydney Nano Institute, contributing to interdisciplinary research initiatives that connect mathematical theory with cutting-edge technological applications.
