Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.
Austin Rovinski is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University’s Tandon School of Engineering. He specializes in chip design, electronic design automation (EDA), and open-source hardware methodologies. His research focuses on VLSI design, domain-specific accelerators, and chiplet-based systems. Prior to NYU, he held a postdoctoral position at Cornell University and earned all his degrees (Ph.D., M.S., and B.S.) from the University of Michigan. Education: Ph.D., Electrical Engineering, University of Michigan - Ann Arbor Master’s, Electrical Engineering, University of Michigan - Ann Arbor Bachelor’s, Electrical Engineering, University of Michigan - Ann Arbor Research Focus: Developing open-source EDA frameworks like OpenROAD Optoelectronic interconnect systems for 2.5D packaging Agile hardware design methodologies Reconfigurable sparse matrix accelerators RISC-V-based manycore processors (e.g., Celerity project) Key Contributions: Austin led the development of the OpenROAD RTL-to-GDS flow and contributed to the Sirius and Celerity projects. His work emphasizes reproducibility, democratizing chip design through open-source tools. Awards: IEEE Micro Top Picks (2015) Michigan EECS Outstanding Research Award (2016) NSF Graduate Research Fellowship Honorable Mention (2017, 2018) Advising & Grants: Actively mentors graduate students in chip design and EDA. His research is supported by NYU’s Tandon School of Engineering and collaborations with industry partners. Labs & Teams: Core contributor to the OpenROAD project, part of NYU’s hardware design and EDA initiatives, and collaborator on the Celerity manycore processor project.
Aviral Shrivastava is a Professor at the School of Computing and Augmented Intelligence, Arizona State University, leading the Make Programming Simple Lab. He holds a Ph.D. and M.S. from the University of California-Irvine (2006, 2002) and a Bachelor’s from IIT Delhi (1999). His research focuses on making programming simple for embedded and cyber-physical systems, with a particular interest in manycore and accelerated computing, software for CPS, and resilient/fault-tolerant computing. He has co-authored over 120 publications in top venues like DAC, ESWEEK, and ACM TECS, with more than 3000 citations and 5 granted patents. His work has been recognized with multiple awards, including the 2010 NSF CAREER award and best paper nominations. Research Areas: Embedded and Cyber-Physical Systems Compiler Design for Modern Architectures Resilient and Fault-Tolerant Computing Scientific Awards: 2010 NSF CAREER award DAC 2017 Best Paper Award Candidate VLSI 2016 Best Student Paper Award LCTES 2010 Second Highest Ranked Paper ASPDAC 2008 Best Paper Candidate Advising & Grants: He has mentored 9 Ph.D. and over 20 Masters students. His research has been funded by NSF, DOE, NIST, SFAZ, and industry partners, totaling $3.5M. He teaches courses on computer organization, architecture, and embedded systems, with student evaluations averaging over 4/5. He also serves as General Chair of Embedded Systems Week (ESWEEK) and holds editorial roles in IEEE ESL, ACM TCPS, and ACM TECS.
Dr. Alessandro Ottaviano is a Researcher affiliated with the Department of Digital Integrated Circuits and Systems at ETH Zürich. His work focuses on advanced computer architecture and embedded systems, particularly in the domains of RISC-V processors, real-time systems, and heterogeneous computing. He contributes to the design of time-predictable virtual memory solutions, mixed-criticality systems, and energy-efficient hardware-software interfaces. Key research areas include modular processor architectures, hardware monitoring for safety-critical applications, and power management in high-performance computing (HPC) systems. His recent projects involve developing controllers for 2.5D systems-in-package and creating open-source networking solutions for mixed-criticality environments. Ottaviano’s work often emphasizes open-source hardware design and scalable system-level approaches to address challenges in autonomous systems and edge computing. He collaborates on advancements in interrupt handling for virtualized systems, peripheral event linking for IoT devices, and FPGA-based thermal emulation for many-core processors. His research bridges theoretical computer architecture principles with practical implementations in embedded and real-time systems.
Tom Conte is an academic leader with a joint appointment in the School of Electrical & Computer Engineering and School of Computer Science at Georgia Institute of Technology. As the founding director of the Center for Research into Novel Computing Hierarchies (CRNCH), he specializes in computer architecture and compiler optimization. His work focuses on manycore architectures, energy-efficient microprocessor design, and embedded system architectures. Prior to Georgia Tech, he directed the Center for Embedded Systems Research at North Carolina State University. He holds IEEE Fellow status and served as 2015 President of the IEEE Computer Society, co-leading the IEEE Rebooting Computing Initiative since 2011. Dr. Conte earned his bachelor’s degree in Electrical Engineering from the University of Delaware (1986), followed by M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign (1988 and 1992). His research has been recognized with prestigious awards including the IEEE Computer Society’s Golden Core Member award and the National Science Foundation’s CAREER Award (1996). His research interests span quantum computing, 3D chip architectures, energy-efficient processing, and post-Moore computing innovations. He has pioneered initiatives like the Superstrider architecture and CREEPY energy-efficient processing frameworks. Recent work includes advancements in quantum programming languages (e.g., Qwerty) and hybrid quantum-classical systems. Awards: IEEE Fellow, Young Alumni Achievement Award, CAREER Award Leadership: IEEE Computer Society President (2015), CRNCH Director Key Projects: Rebooting Computing Initiative, Superstrider Architecture His lab’s contributions include novel compiler optimizations for manycore systems, smart NIC offloading techniques, and thermodynamically inspired computing models. Conte’s work bridges academic research with industry needs through interdisciplinary collaborations and standardization efforts.
Felix Xiaozhu Lin serves as Associate Professor and William Wulf Faculty Fellow in the Department of Computer Science at the University of Virginia's School of Engineering and Applied Science, where he directs the Computer Science Ph.D. Program and MCS/MS Program. Previously a tenured Associate Professor at Purdue University's School of Electrical and Computer Engineering, Lin joined UVA Engineering in August 2020 after completing his doctoral research at Rice University. His educational credentials include: Ph.D. in Computer Science, Rice University (2014) M.S. in Computer Science, Tsinghua University (2008) B.S. in Automation, Tsinghua University (2006) Lin's research centers on systems software at the intersection of operating systems, compilers, and computer architecture, with emphasis on accelerating and safeguarding software systems. His current projects target on-device large language models and speech processing for low-cost hardware ( Analysis of his recent publications reveals a strong trajectory in edge computing and efficient AI systems. His research demonstrates increasing focus on hardware-software co-design for autonomous devices, with significant contributions in video analytics for energy-constrained cameras, kernel virtualization for heterogeneous architectures, and stream processing frameworks leveraging emerging memory technologies. The work consistently addresses real-world constraints like power limitations and network intermittency while maintaining rigorous academic standards. His scientific recognition includes: National Science Foundation CAREER Award (2019) Google Faculty Research Award (2016) NSF CISE Research Initiation Initiative Award (2015) ACM ASPLOS Best Paper Award (2014) Lin leads the XSEL research group mentoring graduate and undergraduate students in systems software development. His educational initiatives include CS4414/CS6456, a modern operating systems course featuring Arm64 baremetal kernel development, multicore systems, trusted execution environments, and filesystem forensics. The course's experiential approach has received strong student feedback for its modern content and practical relevance. His group actively recruits for projects spanning on-device AI, hardware-accelerated speech processing, and next-generation OS development. Based in Charlottesville, Virginia, Lin's research benefits from UVA's proximity to Shenandoah National Park and collaborative opportunities within the university's vibrant computing ecosystem, including the 2024 LLM Workshop he co-organized with Professor Yangfeng Ji.
David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).
Dr.-Ing. Thomas Wild serves as an Academic Director at the Technical University of Munich (TUM), working within the TUM School of Computation, Information and Technology at the Chair of Integrated Systems. He maintains an active research and teaching role at the institution, with his office located in Building N1 (Theresienstr. 90), Room N2136 in Munich, Germany. Dr. Wild's research focuses on advanced computing architectures, with particular emphasis on manycore system on chip (SoC) architectures, network processor (NPU) architectures, on-chip communication architectures including networks on chip (NoC), and system level design methodologies. His work bridges theoretical research with practical implementation, often exploring design space exploration techniques to optimize system performance. The evolution of his research over two decades demonstrates a consistent focus on improving communication architectures and system-level design for embedded and high-performance computing platforms. His recent publications (2023-2025) reveal a growing integration of machine learning techniques with traditional hardware design, particularly in optimizing power-performance tradeoffs in embedded systems. There's a clear trend toward hardware-software co-design approaches, with significant work on SmartNICs, Linux system optimization, and network processing acceleration. His research shows strong interdisciplinary connections between computer architecture, networking, and machine learning. EUROPRACTICE representative for TUM city campus, facilitating access to commercial EDA tools for academic purposes Active collaborator with Professor Andreas Herkersdorf and other researchers at TUM Focus on practical implementations with FPGA-based prototyping and real system modifications Dr. Wild teaches several hardware design courses including VHDL Lab, SystemC Lab, and HW/SW Codesign, contributing to the education of next-generation computer engineers. His teaching directly complements his research in system design and hardware acceleration, providing students with hands-on experience in cutting-edge technologies.
Nicola Capodieci is an Associate Professor at the Department of Physical, Computer and Mathematical Sciences at the University of Modena and Reggio Emilia, specializing in Information Processing Systems (IINF-05/A). He actively teaches multiple courses including Object-Oriented Programming, Web Technologies, and General Computer Science across Computer Science and Mathematics degree programs. His research interests focus on GPU acceleration for embedded systems, autonomous vehicles, and real-time computing. Dr. Capodieci's work addresses critical challenges in heterogeneous computing platforms, particularly for automotive applications and smart city infrastructure. His research bridges theoretical computer science with practical applications in autonomous driving and urban mobility systems. Analysis of his recent publications reveals a strong focus on optimizing GPU performance for latency-sensitive applications, particularly in autonomous vehicles. His work spans path planning algorithms, memory interference management, and real-time scheduling on heterogeneous platforms. A significant portion of his research addresses practical implementation challenges in embedded systems where computational resources are constrained but timing predictability is critical. Dr. Capodieci's teaching portfolio demonstrates expertise in both foundational programming concepts and advanced topics in web technologies. His courses emphasize practical implementation skills while covering theoretical foundations of object-oriented programming, web development frameworks, and computational thinking.
Professor John D. Kubiatowicz is a faculty member at the University of California at Berkeley in the Department of Electrical Engineering and Computer Sciences since 1998. He holds a PhD in Electrical Engineering and Computer Science (minor in Physics) from MIT (1998), an M.S. in EECS (1993), and a double B.S. in Electrical Engineering and Physics (1987) from MIT. His research interests span Quantum Computing Architectures Distributed Systems and Storage Network Security and Peer-to-Peer Protocols Introspective and Manycore Operating Systems Edge and Fog Computing Hardware-Assisted Security He has pioneered systems like OceanStore , a global-scale distributed file system, and Tessellation , a manycore OS with continuous adaptation. The scientific awards he has received include Presidential Early Career Award (PECASE, 2000) Scientific American 50 (2002) Diane S. McEntyre Teaching Award (2003) IEEE ICRA Best Paper (2025) George M. Sprowls Award for MIT PhD thesis (1998) Okawa Research Grant (1998) Best Paper at International Conference on Supercomputing (1993) His recent publications focus on Quantum Circuit Design and Optimization Edge/Fog Computing Architectures Secure Runtime Systems Distributed Garbage Collection Manycore OS Innovations Hardware-Assisted Security Mechanisms He leads the Quantum Architecture Research Center and co-founded the SWARM Lab at Berkeley, advancing a vision of self-adapting, secure systems from the chip level to internet scale.
Biresh Kumar Joardar is an Assistant Professor in the Electrical and Computer Engineering Department at the University of Houston's Cullen College of Engineering. He holds a BE from Jadavpur University (2016) and PhD from Washington State University (2020), with postdoctoral training at Duke University as a Computing Innovation Fellow. His research integrates machine learning with hardware design to develop efficient deep learning accelerators, ReRAM-based architectures, and heterogeneous manycore systems. Current projects focus on enhancing reliability, security, and performance of AI hardware through in-memory computing and 3D integration techniques. Research themes include hardware security (e.g., Rowhammer mitigation), fault-tolerant neural network training, and hardware-software co-design for bioinformatics. Recent articles explore energy-efficient architectures for graph neural networks and cross-layer optimization for AI workloads. Awards: Best Paper Award, International Symposium on Networks-on-Chip (NOCS 2019) Joardar leads the Heterogeneous and In-Memory Computing Lab, seeking PhD students with backgrounds in VLSI, computer architecture, or machine learning. His work has been supported by NSF and industry partnerships.
Jovan Stojkovic is an incoming Assistant Professor at the Department of Computer Science at the University of Texas at Austin, set to join in Fall 2026. Prior to his appointment at UT Austin, he will spend a year at Meta working with the AI and Systems Co-design group. His research focuses on cloud computing and datacenters, with particular emphasis on cloud-native workloads and machine learning inference. Education: PhD in Computer Science from the University of Illinois at Urbana-Champaign, advised by Professor Josep Torrellas Undergraduate studies at the School of Electrical Engineering, University of Belgrade, Serbia, where he was recognized as the best student of the Computer Engineering and Information Theory Department every year from 2017-2020 Research Interests: Jovan's research focuses on cloud computing and datacenters , with two primary domains: Cloud-native workloads , such as microservices and serverless computing. He investigates how to co-design novel hardware platforms and software systems that deliver orders-of-magnitude improvements in performance, energy efficiency, and resource utilization for these emerging workloads. Machine Learning (ML) inference , particularly large language models (LLMs). His work addresses the challenges of ML inference through smart scheduling, workload placement, and system-level configuration tuning to reduce energy, power, and thermal overheads while maintaining performance and accuracy guarantees. Publication Trends: Jovan's publications demonstrate a strong focus on optimizing cloud infrastructure for emerging workloads. His research spans across serverless computing, microservices, and large language model inference. A clear trend emerges in his work: addressing the performance, energy efficiency, and resource utilization challenges of modern cloud workloads through innovative hardware-software co-design approaches. His most recent work shows increasing focus on LLM inference optimization, particularly in the areas of thermal management, power efficiency, and scheduling for many-adapter environments. Awards and Honors: HPCA Best Paper Award (2025) IEEE MICRO Top Picks Honorable Mention (2024) 6 patents with IBM and Microsoft on: Serverless systems, Processor overclocking in the cloud, and Energy-efficient LLM inference W. J. Poppelbaum Memorial Award (2025) for hardware and architecture innovation Mavis Future Faculty Fellowship (2024–2025) Invited to present at 11th Heidelberg Laureate Forum (2024) Kenichi Miura Award (2022) for excellence in High Performance Computing Multiple student travel grants to ISCA, MICRO, ASPLOS, and HPCA Advising and Grants: Jovan is actively seeking prospective PhD students for his research group at UT Austin. His research has been supported through collaborations with major tech companies including IBM, Microsoft, and Meta. His six patents with IBM and Microsoft demonstrate the practical impact of his research in serverless systems, processor overclocking, and energy-efficient LLM inference. His work on serverless computing (MXFaaS, EcoFaaS) and LLM inference optimization has received significant recognition in top-tier computer architecture conferences. Research Groups: During his PhD at UIUC, Jovan worked with Professor Josep Torrellas on cloud infrastructure research. He has collaborated extensively with researchers at IBM Research (particularly Hubertus Franke) and Microsoft (particularly Íñigo Goiri and Ricardo Bianchini). His upcoming position at UT Austin will establish his independent research group focused on cloud computing and datacenter systems. His year at Meta working with the AI and Systems Co-design group will further strengthen his expertise in AI infrastructure.
Prof. Dr. Andreas Herkersdorf is a Full Professor and Chair of Integrated Systems at the Technical University of Munich (TUM) School of Computation, Information and Technology. His research focuses on application-specific multicore processors (MPSoC), FPGA-based prototyping, fault-tolerant systems, and energy-efficient architectures, with applications in IP packet processing, automotive systems, and visual computing. He has received multiple IBM innovation awards and serves on editorial boards including the DFG Review Board for computer architecture. Education: Dipl.-Ing. Electrical Engineering (TUM, 1987), Dr. techn. Electrical Engineering (ETH Zurich, 1991) Research: MPSoC architectures, autonomic computing, NoC resilience, FPGA acceleration, and self-optimizing systems. Awards: IBM Master Inventor (1998), IBM Outstanding Technical Achievement Award (2001), multiple IBM Innovation Achievement Awards (1996-2003) His recent publications emphasize hardware/software co-design, machine learning integration for runtime optimization, and network-on-chip innovations. He collaborates on projects involving 6G systems, smartNICs, and automotive communication protocols.
Mark Oskin is an Adjunct Professor at the School of Computer Science and Engineering , University of Washington , focusing on Software & Hardware Systems . He leads the Sampa Group and collaborates on projects like HammerBlade and BlackParrot. University: University of Washington School: School of Computer Science and Engineering Department: Department of Electrical & Computer Engineering His research spans Computer Architecture , Parallel Computing , and Graph Processing , with additional expertise in Quantum Computing , Open Source Hardware , and Distributed Shared Memory . Ongoing work includes custom manycore devices for graph execution and open-source RISC-V designs. Past projects like Grappa and WaveScalar advanced distributed memory and dataflow execution. Recent publications include BlackParrot: An Agile Open Source RISC-V Multicore for Accelerator SoCs (IEEE Micro 2020) and Perceptual Compression of Video Storage and Processing Systems (SoCC 2019), reflecting trends in hardware-software co-design, quantum systems, and energy-efficient video processing. Best Paper Award , USENIX ATC 2015 IEEE Micro Top Picks , 2009 Mark has advised numerous students, including Amrita Mazumdar (IoT video compression startup), Brandon Lucia (CMU), and Steve Swanson (UC San Diego). He co-founded Corensic, a startup exploring deterministic multithreaded execution.
Maurice S. Fabien is an Assistant Professor in the Department of Mathematics at the University of Wisconsin-Madison and a SIAM-MGB Early Career Fellow. In 2025, he will join MIT's Schwarzman College of Computing as an MLK Assistant Professor while on leave from UW-Madison. His research focuses on computational mathematics with specialization in partial differential equations, high-performance computing, and numerical methods including discontinuous Galerkin formulations and multigrid solvers. Research interests span: Development of structure-preserving discretizations for hyperbolic systems GPU-accelerated computational algorithms Hybridizable discontinuous Galerkin (HDG) frameworks Multiscale modeling in porous media and biomechanics Numerical analysis of nonlinear PDEs Publications demonstrate strong focus on: High-order methods for conservation laws Efficient solvers for elliptic/parabolic systems Applications in fluid dynamics and materials science GPU-based performance optimization Error analysis of energy-stable schemes Awards & Honors: SIAM-MGB Early Career Fellowship (2025) Research Team: Austin Anyanwu (Undergraduate) - Finite precision arithmetic Alexis Liu (Alumni) - GPU-accelerated elliptic solvers Patrick Li (Undergraduate) - GPU-based mesh refinement Neer Mehta (Alumni) - Adaptive mesh refinement algorithms Significant involvement since 2007 in STEM diversity initiatives focused on recruitment/retention of underrepresented groups in academia.
