Luciano Lavagno is a Full Professor at the Department of Electronics and Telecommunications, Polytechnic University of Turin, with over two decades of academic and research contributions. His work bridges hardware acceleration, low-power electronics, and intelligent system design. Research Focus: Hardware-accelerated machine learning, high-level synthesis (HLS) for FPGA/ASIC, heterogeneous CPU/GPU/FPGA platforms Key Projects: SPACE (predictable acceleration), REBECCA (secure AI acceleration), HPC-National Center (quantum computing), and oral history preservation via "Ti racconto una storia" initiative His recent publications analyze CNN inference optimization, subgraph isomorphism, and superword-level parallelism exploitation. Lavagno supervises multiple PhD students working on FPGA acceleration, neural network hardware, and embedded systems. As Principal Investigator for national and EU-funded projects (PRIN, JTI-ECSEL, PNRR), he drives advancements in sustainable computing infrastructure. His patented technologies include MIx&Latch timing methodology, capacitive sensing innovations, and 5G acceleration frameworks.
Kimia Zamiri Azar serves as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Central Florida, focusing on hardware security and verification methodologies. Her research bridges theoretical formal methods with practical security implementations in semiconductor design and testing. Her educational background includes: Ph.D. in Electrical and Computer Engineering, George Mason University (2021) Postdoctoral Research, University of Florida Dr. Azar's research spans hardware security with emphasis on system-level verification, VLSI design-for-trust, and advanced IC testing. She pioneers techniques in logic locking, secure heterogeneous integration, and IC supply chain security, developing frameworks for authenticated encryption in Systems-in-Package and runtime security monitoring. Her work integrates formal verification with innovative testing methodologies to address hardware trust challenges across the semiconductor lifecycle. Analysis of her recent publications reveals two dominant trends: (1) Application of large language models (LLMs) to hardware design tasks including high-level synthesis code generation and RTL optimization, and (2) Advancement of secure heterogeneous integration techniques for System-in-Package architectures with focus on counterfeit prevention and split-test security protocols. These directions address critical gaps in hardware trustworthiness amid increasingly complex semiconductor supply chains. Her scientific contributions have earned significant recognition: Best Paper Award at ICCAD 2019 Best Paper Award at ISVLSI 2020 Best Paper Award at ICCAD 2020 Best Paper Award at IEEE DCAS 2020 Best Paper Award at HOST 2022 Best Paper Award at DATE 2023 Dr. Azar secures substantial research funding from premier agencies including NSF, SRC, DARPA, AFRL, DoD (NG), and Microsemi. Her grants support projects spanning hardware security validation frameworks, secure heterogeneous integration, and AI-augmented verification methodologies. She actively mentors students in her research group, guiding publications in top venues like IEEE D&T, IEEE TC, and DAC while fostering industry-academic collaborations. Her work directly impacts semiconductor security standards through patented innovations and open-source verification tools. As an active IEEE and ACM member, she contributes to community advancement through conference organization (HOST, DATE), journal editorial roles, and workshop leadership on hardware security standards. Her research group collaborates with semiconductor industry leaders to translate theoretical security frameworks into practical design-for-trust methodologies for next-generation integrated circuits.
Stephen Brown is a Professor at the University of Toronto within the Department of Electrical and Computer Engineering under the Faculty of Applied Science and Engineering. He earned his B.A.Sc and M.A.Sc in Electrical Engineering from the University of Toronto and New Brunswick, respectively, and a Ph.D. in Electrical Engineering from the University of Toronto (1992). His career spans over two decades in academia and industry collaboration. Education : B.A.Sc, University of New Brunswick M.A.Sc, University of Toronto Ph.D, University of Toronto Professor Brown’s research focuses on field-programmable gate arrays (FPGAs) , CAD algorithms , and computer architecture , with applications in machine learning and high-level synthesis . He is a principal investigator in the LegUp project , an open-source high-level synthesis framework that bridges software and hardware design. His work also extends to optimizing FPGA interconnect delays, physical synthesis, and logic block architectures. Key trends in his publications include advancements in high-level synthesis tools, FPGA architecture evaluation, and timing-driven design methodologies. His contributions often intersect with design automation , resource sharing , and embedded systems . Scientific Awards : NSERC 1992 Doctoral Prize Hart Professorship for Innovation in Teaching (2017) Multiple teaching excellence awards Best Paper Award at ICCAD 1990 Best Paper Award nomination at Canadian Conference on VLSI (1989) As Director of the FPGA University Program at Intel Corporation, he leads industry-academia initiatives. His teaching portfolio includes courses like ECE253 (Digital Logic) and ECE1733F (Switching Theory).
Paul R. Genssler is a Dr.-Ing. researcher at the Chair of AI Processor Design (AI-Pro) within the Technical University of Munich (TUM), actively advancing hardware solutions for artificial intelligence under Prof. Hussam Amrouch. His work bridges computer engineering and emerging technologies, focusing on overcoming fundamental limitations in conventional computing architectures through brain-inspired paradigms. His research spans critical domains in next-generation computing: Hyperdimensional Computing for robust pattern recognition and bioinformatics applications Neuromorphic and In-Memory Computing architectures for energy efficiency Reliability engineering for emerging memory technologies (FeFET, etc.) Quantum computing support systems including cryogenic embedded electronics Machine learning-driven transistor aging prediction and mitigation Analysis of his 15 most recent publications (2023-2024) reveals a dominant trend toward hyperdimensional computing as a unifying framework for addressing reliability challenges in emerging technologies. His work consistently integrates in-memory computing techniques to bypass von Neumann bottlenecks while targeting real-world applications like genome matching and unsupervised learning. A significant portion focuses on error-resilient implementations for unreliable nanoscale devices, demonstrating exceptional cross-stack expertise from transistor physics to algorithm design. As a core member of TUM's AI Processor Design group affiliated with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Genssler collaborates extensively on projects spanning cryogenic quantum control systems, FPGA-based AI resilience, and monolithic 3D integration. The team operates at the intersection of semiconductor physics, computer architecture, and machine learning, with strong industry connections evident through publications at DATE, ASP-DAC, and ICCAD.
Andreas Lööw is a Lecturer at Royal Holloway, University of London , focusing on hardware and software verification. Previously, he was a postdoctoral researcher at Imperial College London under Philippa Gardner , contributing to the Gillian Platform . He completed his PhD at Chalmers University of Technology under Magnus Myreen , specializing in interactive theorem proving and hardware verification. His research explores symbolic execution, separation logic, and formal verification of hardware/software systems. Key projects include Betterlog (Verilog semantics reformulation) and foundational work on the Gillian Platform . 2025 : Compositional Symbolic Execution for Memory Models 2025 : Simulation Semantics of Synthesisable Verilog 2024 : Compositional Symbolic Execution for Correctness/Incorrectness 2023 : Exact Separation Logic (Distinguished Paper at ECOOP'24) 2023 : Hardware Verification of Pipelined Processors 2022 : Verilog Concurrency Analysis 2021 : Verified Verilog Compiler (Lutsig) Scientific Awards : Distinguished Paper at ECOOP 2024 He maintains the vv Verilog visualization tool and collaborates on the Gillian Platform . Contact: andreas.loow@rhul.ac.uk
Yongshan Ding is an Assistant Professor of Computer Science and Applied Physics at Yale University. He leads the Quantum Systems Lab (QSL) and directs Yale's Quantum Science and Engineering Certificate program. Affiliated with the Yale Quantum Institute (YQI) and Computer Systems Lab (CSL), his research focuses on quantum computing systems spanning algorithms, architecture, and hardware/software co-design. Dr. Ding earned his Ph.D. from the University of Chicago and a B.Sc. from Carnegie Mellon University. He has received prestigious awards including the Siebel Scholarship (2020) and William Rainey Harper Dissertation Fellowship (2020). Research Interests: Quantum computing architectures, noise-resilient quantum algorithms, error correction methods, quantum compilation, hardware-software co-design, and NISQ system optimization. Editorial Roles: Editor at Quantum journal and Associate Editor at ACM Transactions on Quantum Computing . Labs: Founder of Yale's Quantum Systems Lab (QSL) and contributor to the Computer Systems Lab (CSL). Awards: Siebel Scholarship (2020) William Rainey Harper Dissertation Fellowship (2020) QCE Best Paper Award (2024) IEEE Micro Top Picks Honorable Mention (2023, 2020) IBM Q Best Paper Award, First Prize (2020) Mathematics Competition Runner Up (2016)
Giovanna Turvani is an Associate Professor at the Department of Electronics and Telecommunications (DET) at Politecnico di Torino, with affiliations in both the College of Electronic, Telecommunications and Physics Engineering and the College of Computer, Film, and Mechatronics Engineering. Scientific Branch: IINF-01/A - Electronics ERC Sectors: PE7_4, PE7_11, PE6_1, PE6_14, PE7_3 SDG Goals: Quality Education, Gender Equality, Affordable Energy, Industry Innovation Her research focuses on advanced electronics and quantum technologies, including: Logic-in-memory computing Quantum computing architectures Microwave imaging for medical and agricultural applications CAD tools for emerging nanotechnologies Embedded systems for bee health monitoring IoT solutions for bio-waste valorization Publications show strong expertise in quantum computing, nanocomputing, and microwave imaging, with recent trends emphasizing quantum optimization frameworks, in-memory architectures, and IoT-based agricultural technologies. She supervises PhD students in areas like quantum machine learning algorithms, predictive on-board systems, and quantum hardware design. Collaborations span multiple disciplines, including medical device development and agricultural electronics. Patents include innovations in microwave imaging, racetrack memory logic functions, and in-memory computing devices.
Pasquale Davide Schiavone holds multiple research and teaching positions at École Polytechnique Fédérale de Lausanne (EPFL), serving as a Lecturer at the School of Computer and Communication Sciences (IC) and as a Scientist at both the Embedded Systems Laboratory (ESL) within the School of Engineering (STI) and PAT Administration. His interdisciplinary work bridges computer architecture, embedded systems design, and biomedical applications, with office located at ELG 136 in Lausanne, Switzerland. Dr. Schiavone's research focuses on ultra-low-power computing systems, particularly RISC-V architectures and TinyML applications for edge devices. His work develops open-source hardware platforms like X-HEEP and HEEPOCRATES that enable energy-efficient AI at the edge, with applications spanning biomedical monitoring, neural interfaces, and wearable computing. He explores innovative hardware-software co-design approaches to overcome energy constraints in resource-limited environments. His recent publications reveal a consistent research trajectory centered on open, configurable computing platforms for specialized applications. The work spans from fundamental RISC-V architecture improvements (ARCANE, e-GPU) to application-specific implementations for biomedical contexts (BiomedBench, neural interfaces). A strong emphasis on energy efficiency permeates all his research, whether through novel arithmetic approaches (Posit), system architecture (near-memory computing), or specialized accelerators (Strela, Quadrilatero). Lecturer, School of Computer and Communication Sciences (IC) Scientist, Embedded Systems Laboratory (ESL), School of Engineering (STI) Scientist, PAT Administration, School of Engineering (STI) Dr. Schiavone teaches courses on hardware compilation, presenting algorithms and methods for transforming hardware description languages into optimized circuit implementations. His Embedded Systems Laboratory work places him at the forefront of developing practical, open-source solutions for next-generation computing challenges in energy-constrained environments.
Weiwen Jiang is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at George Mason University (GMU), affiliated with the College of Engineering and Computing (CEC). He leads the JQub lab, focusing on hardware/software co-design for computing systems, spanning classical (FPGAs, ASICs) and quantum computing applications in AI-driven fields like medical imaging and geophysics. Prior to GMU, he held a postdoctoral position at the University of Notre Dame and earned his PhD in Computer Science from Chongqing University with a joint PhD in Electrical and Computer Engineering from the University of Pittsburgh. His research emphasizes quantum computing, AI accelerators, and domain-specific computing. Notable achievements include the 2025 NSF CAREER Award, ACM Sigda Meritorious Service Award (2024), and IEEE QuantumWeek Best Paper Award (2023). His work is funded by NSF, DoE, ARO, Meta, and Leidos. He co-chaired IEEE QuantumWeek (2023–2025) and created workshops like StableQ at ESWEEK 2023. Key contributions include developing frameworks like QuPAD for quantum learning and JQub's AI-driven geophysical and medical imaging tools. His lab graduated Dr. Yi Sheng (now at University of South Florida) and Dr. Zhepeng Wang (Amazon Applied Scientist). Current research explores quantum machine learning, noise mitigation, and fairness in AI for edge devices.
Alastair F. Donaldson is a Professor and Director of Research in the Department of Computing at Imperial College London, where he leads the FastPL research group. His academic career spans over a decade at Imperial, progressing from Lecturer (2011-2014) to Senior Lecturer (2014-2017), Reader (2017-2020), and Professor (2020-present). He has also held significant industry positions, including Founder and Director of GraphicsFuzz Ltd. (acquired by Google in 2018), Senior Software Engineer at Google (2018-2021), and Visiting Researcher at both Google and Microsoft Research Redmond. Donaldson earned his PhD from the University of Glasgow under Alice Miller, following a BSc (hons, First Class) in Computing Science and Mathematics. His postdoctoral work included an EPSRC Postdoctoral Research Fellowship at the University of Oxford and a Research Fellowship at Wolfson College Oxford. His research focuses on formal analysis, software testing and programming languages techniques for improving software reliability, with special emphasis on high-performance systems. Donaldson's work bridges theoretical foundations with practical applications, particularly in compiler testing, GPU programming verification, and metamorphic testing. His research has significantly influenced both academia and industry, as evidenced by the acquisition of his startup GraphicsFuzz by Google. Analysis of his recent publications reveals a strong focus on fuzz testing techniques applied across diverse domains including compilers, GPUs, cryptographic protocols, and large language models. His work consistently combines formal methods with practical testing approaches, addressing challenges in compiler correctness, memory models, and API verification across multiple platforms. 2017 BCS Roger Needham Award EPSRC Early Career Fellowship Best Paper Award, EuroSys 2024 Best Paper Award, MET 2021 Best Paper Award, IWOCL 2019 Best Paper Award, IISWC 2019 Best Paper Award, ICST 2016 ACM SIGSOFT Distinguished Paper Award, ISSTA 2023 ACM SIGSOFT Distinguished Paper Award, FSE 2017 ACM SIGPLAN Most Influential OOPSLA Paper Award, 2022 (for GPUVerify) As Director of Research in the Department of Computing, Donaldson oversees research strategy and development. His FastPL research group investigates novel techniques for programming, testing and reasoning about high performance systems. He has served on numerous program committees and held leadership roles including PLDI Steering Committee Chair (2022-2025) and PACM-PL Advisory Board member. His industry engagement includes testifying as an Expert Witness in the IBM UK Ltd v LzLabs GmbH & Ors case. The FastPL research group, which Donaldson leads, focuses on formal analysis, software testing and programming languages. The group has made significant contributions to compiler testing, GPU verification, and metamorphic testing techniques, with practical impact demonstrated by the acquisition of GraphicsFuzz. Current research directions include fuzzing for zero-knowledge proof circuits, randomized testing of decompilers, and systematic testing of large language models for code generation.
Professor Simon Devitt is Research Director of the Centre for Quantum Software and Information (QSI) at the University of Technology Sydney's Faculty of Engineering and Information Technology, School of Computer Science. He also holds several prestigious international appointments including InstituteQ Visiting Chair of Excellence in Quantum Technologies at Aalto University, Finland, and visiting positions at RIKEN in Japan. As a leading figure in quantum computing research, he directs the Australian Quantum Software Network and co-founded quantum education startup Eigensystems Pty Ltd. His educational background includes: PhD in Physics from University of Melbourne (2004-2007) BSc (Hons) in Physics from University of Melbourne (2000-2003) Professor Devitt's research spans quantum software, quantum architecture, and quantum error correction, with a focus on making quantum computing practical at scale. His work addresses fundamental challenges in quantum computing architecture when scaled to millions or billions of qubits. He has pioneered approaches to quantum error correction, resource estimation, and quantum network design, particularly through his leadership of the Quantum Technology at Scale (QTS) research group. His research bridges theoretical foundations with practical implementation challenges, aiming to shape the evolution of quantum technology over the coming decades. His recent publications demonstrate a strong focus on practical quantum computing challenges, with particular emphasis on error correction techniques, resource estimation, and quantum architecture. A significant portion of his work addresses the surface code and its variants, exploring ways to optimize qubit usage and error rates. He has also made important contributions to quantum networking, particularly through the concept of "quantum sneakernet," and to quantum education and standardization efforts that will be critical for the emerging quantum industry. His notable awards and recognitions include: Fellow of the Australian Institute of Physics Fellow of the Royal Society of New South Wales Warren Prize from the Royal Society of NSW InstituteQ Visiting Chair of Excellence in Quantum Technology Professor Devitt actively mentors numerous PhD students, postdocs, and researchers through his Quantum Technology at Scale group. His research is supported by significant funding from diverse sources including Google Academic Research Awards, Sydney Quantum Academy, DARPA, and the Japanese Society for the Promotion of Science. He has led projects on quantum sneakernet networks, quantum algorithm benchmarking frameworks, and quantum software tools that address critical challenges in the field. He leads the Quantum Technology at Scale (QTS) research group at UTS, which focuses on the design and architectural challenges of quantum computing and communications technology at scale. The group includes researchers working on quantum computing architectures, quantum networking (Rottnest Quantum Sneakernet project), and quantum software (Quokka project). The team collaborates extensively with international partners including Aalto University in Finland, University of New South Wales, Keio University in Japan, and industry leaders like Rigetti Computing.
Ioannis Sourdis is a Full Professor at the Department of Computer Engineering, Chalmers University of Technology, Sweden. His research focuses on computer architecture, reconfigurable computing, network-on-chip (NoC) design, memory systems, and fault-tolerant embedded systems, with applications in biomedical informatics and hardware security. Current projects include EUMMSS (Efficient Uncore Mechanisms for Multicore Space Systems, funded by the Swedish National Space Board) and eProcessor (European Processor Ecosystem, funded by the European Commission). Past initiatives include the DeSyRe project (on-demand system reliability), ECOSCALE (exascale reconfigurable computing), and SHARCS (secure hardware-software architectures). His work spans NoC router design (e.g., FastTrackNoC, DDRNoC), memory compression (MemSZ, L2C), and biomedical security applications (heartbeat-based protocols). He has published extensively in venues like DATE, ICS, PACT, and IEEE Transactions on Networking. Key research areas: Chiplet-based systems , hybrid memory architectures , FPGA acceleration , and real-time stream aggregation .
Ksenia Dolgaleva is an Associate Professor at the University of Ottawa's School of Electrical Engineering and Computer Science, and holds a Canada Research Chair in Integrated Photonics (Tier 2). She joined the university in July 2013 as part of the Canada Excellence Research Chair team led by Professor Robert Boyd. Education: She earned a Diploma in Physics from Moscow State University (Russia) and a Ph.D. in Optics from the University of Rochester (USA, 2009). She completed a postdoctoral fellowship at the University of Toronto (2009–2013), supported by a Mitacs Elevate fellowship (2011–2012). Research Interests: Her work focuses on integrated photonics, nonlinear optics, THz technology, and advanced optical materials. Key areas include artificial photonic structures, nonlinear responses in materials like InP, GaN, and quartz, and plasmonic metamaterials for sensing and frequency conversion. Publications & Trends: Over 20 peer-reviewed articles highlight her contributions to nonlinear photonics platforms, THz spectroscopy, and material characterization. Recent work emphasizes phase-matched processes, ultra-high-Q resonances, and THz plasmonic metasurfaces. Scientific Awards: Outstanding undergraduate thesis award (Russian Physical Society, 2009) Outstanding student presentation (OSA Frontiers in Optics, 2008) Advising & Grants: Trained 8 students during her Ph.D. and postdoc. Currently building her research group to explore optics and photonics. Labs/Teams: Active in the Canada Excellence Research Chair team and collaborates on projects involving III-V semiconductors and THz technologies.
David Atienza is a Professor in the Department of Electrical Engineering at the School of Engineering, Swiss Federal Institute of Technology in Lausanne (EPFL), renowned for pioneering embedded systems education and research in ultra-low power computing. His innovative teaching methods, including using Nintendo DS consoles and smartphones to teach embedded systems, earned him the 2015 EPFL Teaching Award in Electrical Engineering. His research focuses on Embedded Systems , Edge AI , and Wearable Healthcare , with breakthroughs in energy-efficient hardware-software co-design for biomedical applications. Key contributions include open-source platforms like X-HEEP and HEEPocrates for ultra-low power edge computing, and frameworks like SzCORE for seizure detection benchmarking. His work bridges computer architecture with real-world healthcare challenges, emphasizing privacy-preserving algorithms and sustainable computing. Recent publications (2023-2025) reveal a dominant trend toward biomedical edge AI and sustainable computing , with 70% of articles targeting healthcare wearables (seizure detection, cough monitoring) and 30% addressing energy efficiency in data centers and edge devices. His research consistently integrates open-hardware principles (RISC-V) with novel algorithm-hardware co-design. Awards include: 2015 EPFL Teaching Award in Electrical Engineering section While specific advising details are unreported, his extensive publication record and leadership in multi-partner projects like Sustainable Textile Electronics (STELEC) indicate active graduate supervision and significant research funding. His group develops open-source hardware frameworks used globally in academia and industry. He leads the Embedded Systems Laboratory at EPFL, driving projects in ultra-low power RISC-V architectures, biomedical wearables, and sustainable computing. Current initiatives include carbon-aware data center frameworks and multi-modal health monitoring systems deployable on commercial wearables.
Earl Campbell is Professor of Quantum Computation in the School of Mathematical and Physical Sciences at the University of Sheffield. He holds an MSc in Physics and Philosophy from University of Bristol and a PhD in Quantum Computing from University of Oxford. His research develops fault-tolerant quantum computing protocols, error correction codes, and quantum software architectures to enable reliable quantum technologies. Key focus areas include topological error correction, magic state distillation, qudit computation, and bridging quantum theory with hardware implementation. Research Team: 1 Postdoctoral Researcher (Mark Howard) 1 PhD Student (Luke Heyfron) Major Grants: EPSRC Early Career Fellowship: 'Towards fault-tolerant quantum computing with minimal resources' (£675,867) Royal Commission of Great Exhibition of 1851 Fellowship
