جست‌وجوی استاد و پژوهشگر

Daniel W. Blissمشاهده پروفایل

استاد

• Radar
• Wireless Communications
• Precision Positioning
• +۷ مورد دیگر

Daniel W. Bliss is a Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University and Director of ASU's Center for Wireless Information Systems and Computational Architectures (WISCA). With over $50 million in research funding as principal investigator from organizations including DARPA, ONR, Google, and Airbus, his work bridges theoretical foundations with practical implementations across multiple domains of wireless systems. Dr. Bliss received his educational foundation with a B.S.E.E. from Arizona State University (1989), followed by M.S. and Ph.D. degrees in Physics from the University of California-San Diego (1995, 1997). His academic journey includes significant industry experience at General Dynamics (1989-1993) and MIT Lincoln Laboratory (1997-2012) before joining ASU. His research program focuses on advanced wireless systems spanning radar, communications, precision positioning, computational architectures, and medical monitoring applications. Bliss employs information theory, estimation theory, and signal processing to develop novel system concepts with disruptive capabilities. Current research emphasizes RF convergence, integrated sensing and communications, and anticipatory medical analytics using wireless technologies, with particular focus on extracting physiological data from radar signals. Analysis of recent publications reveals a strong trend toward integrated sensing and communications systems, particularly utilizing mmWave and radar technologies for medical monitoring applications. His work increasingly bridges traditional communications and radar domains while expanding into physiological monitoring, demonstrating a clear trajectory toward convergence of wireless technologies for healthcare applications and remote vital sign detection. Dr. Bliss has received significant recognition for his contributions: Fellow of the IEEE (2015) 2021 IEEE Warren D. White Award for Excellence in Radar Engineering 2016-2017 Top 5% Teaching Award at ASU 2017 ASU Fulton Engineering Exemplar Faculty As a dedicated mentor, Dr. Bliss has supervised numerous graduate students through successful dissertation and thesis defenses across both PhD and Master's programs. His research portfolio includes substantial funding from diverse sources with over $50 million secured as principal investigator. Current projects include the $17M DARPA DASH project focused on advanced software-reconfigurable heterogeneous SoCs for next-generation RF systems, and multiple initiatives in contactless vital sign monitoring using radar technologies. Dr. Bliss leads the BLISS Lab and serves as director of WISCA, fostering interdisciplinary research in wireless systems. His team includes researchers working on distributed coherent systems, MIMO radar, RF convergence, and medical monitoring applications, with recent successes including the Making Waves team that tied for first place in the Air Force Spark Tank challenge. He has founded two startup companies: DASH Tech Integrated Circuits Company and the Big Little Sensor Company, focusing on high-performance embedded processing and small-scale radar physiological monitoring, respectively.

Michael A Osborneمشاهده پروفایل

استاد

• Machine Learning
• Bayesian Optimization
• Gaussian Processes
• +۳ مورد دیگر

Michael A Osborne is Professor of Machine Learning at the University of Oxford and leads the Bayesian Exploration Lab . He serves as Director of the EPSRC Centre for Doctoral Training in Autonomous Intelligent Machines and Systems and co-directs the Oxford Martin AI Governance Initiative. His research focuses on Bayesian optimization, Gaussian processes, and probabilistic numerics with applications in quantum devices, battery modeling, and AI governance. Key Positions: Professor of Machine Learning, University of Oxford Official Fellow, Exeter College Co-founder of Mind Foundry Lead Researcher, Oxford Martin Programme on Technology and Employment Research Themes: Probabilistic modeling for quantum systems Uncertainty quantification in energy storage AI safety and societal impact analysis Automated experimental design Quantum device calibration Probabilistic numerical methods Technical Contributions: Bridging reality gap in quantum devices Efficient Bayesian quadrature techniques Personalized neurostimulation algorithms Automated measurement protocols Quantum-classical hybrid ML

Priyanka Rainaمشاهده پروفایل

استادیار

• Domain-Specific Architectures
• Hardware/Software Co-design
• Energy-Efficient Computing
• +۳ مورد دیگر

Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).

Benjamin Carrison-Schaferمشاهده پروفایل

دانشیار

• Reconfigurable Computing
• FPGAs
• Electronic Design Automation
• +۷ مورد دیگر

Benjamin Carrison-Schafer is an Associate Professor and Assistant Dean for Graduate Student Success at the Department of Electrical and Computer Engineering, Erik Jonsson School of Engineering and Computer Science, University of Texas at Dallas. He leads the Design Automation and Reconfigurable Computing Laboratory (DARClab), focusing on systems, high-level design, and programming methodologies for VLSI computing systems and FPGAs. Education: MBA from McGill University, Canada (2012) PhD in Electrical and Electronic Engineering from University of Birmingham, UK (2003) Research Interests: His work spans modeling, analysis, synthesis, optimization, and implementation of VLSI systems. Current projects include: Approximate Computing, High-Level Synthesis Design Space Exploration, Hardware Security, Behavioral MPSoC Optimization, and Automatic Fault-Tolerant System Generation. His research blends theory and practice, using analytical and experimental techniques to solve real-world problems. Publication Trends: Recent publications demonstrate strong focus on hardware security, FPGA optimization, and automated design methodologies. Key themes include High-Level Synthesis innovations, hardware acceleration techniques, and cross-disciplinary applications of reconfigurable computing. His work frequently addresses challenges in hardware trustworthiness, energy efficiency, and design automation scalability. Professional Activities: Associate Editor: IEEE Transactions on Sustainable Computing (2022-present) Conference Chair: ICCD 2024, DCAS 2024 Program Committee: ASP-DAC, DATE, FCCM, GLSVLSI Advising & Labs: Supervises multiple PhD and Master's students at DARClab. Current research includes domain-specific architecture design, hardware security, sustainable computing, and ML for VLSI design. The lab collaborates with industry partners like Renesas Electronics and develops commercial tools through spin-off company highX Technologies.

Larry Pileggiمشاهده پروفایل

استاد

• Secure Integrated Circuit Hardware
• Integrated Circuits Design Methodologies
• Power Systems Simulation and Optimization
• +۳ مورد دیگر

Larry Pileggi is the Coraluppi Head and Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University (CMU). He is also the Department Head of CMU’s ECE Department and has held prior roles at Westinghouse Research and Development and the University of Texas at Austin. His work bridges academic research and industry innovation, with co-founding ventures like Fabbrix Inc., Extreme DA, and Pearl Street Technologies. Dr. Pileggi earned his Ph.D. in Electrical and Computer Engineering from CMU (1989), following an M.S. (1984) and B.S. (1983) in Electrical Engineering from the University of Pittsburgh. His research focuses on three core areas: secure integrated circuit hardware (mitigating supply-chain threats), integrated circuits design methodologies (supporting sub-20nm CMOS and heterogeneous technologies), and power systems simulation (developing robust grid analysis tools like SUGAR). He has been recognized with numerous awards, including the prestigious 2023 Phil Kaufman Award for contributions to electronic system design, and is an IEEE Fellow. His academic leadership includes fostering maker initiatives and interdisciplinary research programs to address future challenges in energy and computing systems. Pileggi’s advising record includes over 47 Ph.D. students, many of whom collaborate with him in industry ventures. Current and past grants support his work on resilient power grids and novel memory technologies, reflecting a commitment to both theoretical and applied research. His lab, the Pileggi Lab, develops cutting-edge solutions for energy and integrated systems, emphasizing scalable simulation, secure hardware design, and next-generation memory architectures. Collaborations span institutions like ETH Zurich and industry partners in EDA and semiconductor sectors.

Bahar Asgariمشاهده پروفایل

استادیار

• Computer Architecture
• Domain-Specific Architecture Design
• Near Memory Processing
• +۳ مورد دیگر

Bahar Asgari is an Assistant Professor in the Department of Computer Science at the University of Maryland, College Park. She holds appointments in CS, UMIACS, and ECE, and directs the Computer Architecture and Systems Lab (CASL). Her research focuses on domain-specific architecture design, near memory processing, and reconfigurable computing. Before joining UMD, she worked at Google, contributing to system optimization and memory utilization strategies. Education: Ph.D., Georgia Institute of Technology, 2021. Research Interests: Developing energy-efficient architectures for sparse problems, scientific computing acceleration, FPGA optimizations, and reconfigurable hardware systems. Her work addresses challenges in memory efficiency, parallelization, and hardware-software co-design across domains like machine learning and IoT. Key Awards: 2024 UMD Excellence in Teaching Award 2023 DOE Early Career Award Advising & Grants: Supervises 9 graduate students and leads projects sponsored by NSF, DOE, and industry partnerships. Her lab explores systolic arrays, near-data processing, and fault-tolerant computing. Labs/Teams: Directs CASL, which builds next-generation computing systems through hardware innovation and algorithm-architecture co-design.

Tapio Schneiderمشاهده پروفایل

استاد

• Atmospheric Dynamics
• Climate Modeling
• Geophysical Turbulence
• +۴ مورد دیگر

Tapio Schneider is the Theodore Y. Wu Professor of Environmental Science and Engineering at the California Institute of Technology. His research focuses on atmospheric dynamics across Earth and other planets, climate modeling innovations, and geophysical turbulence analysis. He contributes to the Climate Modeling Alliance (CliMA) and develops advanced computational tools for climate prediction. Albert-Ludwigs-Universität Freiburg (Vordiplom, 1993) Princeton University (M.Sc. 1997, Ph.D. 2001) University of Washington, Seattle (Visiting Graduate Student, 1994-1995) His research spans climate dynamics , atmospheric turbulence , and AI-enhanced climate modeling , addressing challenges in cloud dynamics, extreme weather patterns, and planetary climate systems. Current work emphasizes hybrid machine learning-physical models and computational acceleration for high-resolution simulations. Recent publications highlight trends in AI integration for climate science, with applications in hydrology , cloud microphysics , ocean circulation , snowpack modeling , and climate tipping points . His team develops open-source tools like ClimateMachine for GPU-accelerated simulations. Scientific Recognition: Fellow, American Geophysical Union (2022) Rosenstiel Award (2019) World Economic Forum Young Scientist (2012) David and Lucile Packard Fellow (2005-2010) Alfred P. Sloan Research Fellow (2004-2006) Tapio leads climate dynamics research at Caltech, directs the Linde Center for Global Environmental Science (2011-2012), and serves as Editor for the Journal of Advances in Modeling Earth Systems . His group collaborates with NASA Jet Propulsion Laboratory (2016-2024) and Google Research (2022-present).

John Lygerosمشاهده پروفایل

استاد

• Automatic Control
• Hybrid Systems
• Large-Scale Dynamical Systems
• +۴ مورد دیگر

John Lygeros is a Full Professor and Head of the Institute for Automatic Control at ETH Zurich's Department of Information Technology and Electrical Engineering. He received his B.Eng. (1990) and M.Sc. (1991) from Imperial College London, and Ph.D. (1996) from UC Berkeley. Before joining ETH Zurich in 2006, he held academic positions at the University of Cambridge and University of Patras. His research focuses on: Modeling and control of hierarchical hybrid systems Large-scale dynamical systems applied to biochemical networks Control of automated transportation systems via wireless networks Energy systems and advanced manufacturing control His research demonstrates strong emphasis on optimization methods, distributed control architectures, and machine learning applications in control systems, with significant contributions to real-time optimization algorithms and data-driven control methodologies. Major scientific awards include: HSCC Test of Time Award (2024) ERC Advanced Grant (2018) O. Hugo Schuck Best Paper Award (2018) IEEE George S. Axelby Paper Award (2016) Three Golden Owl teaching awards from ETH Zurich He leads the Automatic Control Laboratory at ETH Zurich and serves as Director of the National Centre of Competence in Research 'Dependable Ubiquitous Automation'. He has advised over 60 doctoral candidates since 2017, with research spanning optimization algorithms, power systems, autonomous systems, and machine learning applications.

• Optical Networks
• Data Center Networks
• Optical Interconnects
• +۷ مورد دیگر

Dr. Khurram Aziz is a Senior Instructor in the Faculty of Computer Science at Dalhousie University , Halifax, Canada. He is actively engaged in teaching and research, with a focus on optical networks, data center interconnects, and network performance modeling. Education: PhD in Electrical Engineering, Vienna University of Technology, Austria (2008) MSc in Electrical Engineering, National University of Singapore (2003) BSc (Hons) in Electrical Engineering, University of Engineering and Technology, Lahore, Pakistan (1998) His research interests include optical packet and burst switched networks , optical interconnects for data centers , analytical modeling and simulation , and network routing and switching . He has contributed extensively to the design and performance evaluation of scalable optical switches and hybrid switching systems. The recent publications reflect a strong trend in data center optical networks , focusing on performance, blocking probability, signal degradation, and architectural classification. His work bridges theoretical modeling with practical simulation frameworks, such as CloudNetSim++ in OMNeT++, contributing to cloud and high-capacity network research. Dr. Aziz has no listed scientific awards in the provided text. He teaches several core computer science courses including CSCI 2141: Intro to Database Systems , CSCI 3171: Network Computing , CSCI 3132: Object Orientation and Generic Programming , and CSCI 3120: Operating Systems . There is no mention of graduate student supervision or external research grants. He has co-authored book chapters in major handbooks on data centers and switched systems. Dr. Aziz has not listed any formal lab or research team affiliations in the provided content.

Subhasish Mitraمشاهده پروفایل

استاد

• Robust Computing
• NanoSystems
• Electronic Design Automation (EDA)
• +۳ مورد دیگر

Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.

CHAN Mun Choonمشاهده پروفایل

استاد

• Systems & Networking
• Computer Networking
• Mobile Computing
• +۳ مورد دیگر

CHAN Mun Choon is a Professor at the School of Computing, National University of Singapore (NUS) , where he directs the NUS-NCS Joint Laboratory for Cyber Security . He previously worked at Bell Labs (1997-2003) and holds a PhD from Columbia University (1997). His research spans systems and networking with specific interests in mobile computing, software-defined networking, and cyber-physical systems . PhD, Electrical Engineering (1997), Columbia University M.Phil., Electrical Engineering (1993), Columbia University MS, Electrical Engineering (1993), Columbia University BS, Computer & Electrical Engineering (1990), Purdue University His recent work focuses on 5G network architecture , data center fault debugging , and energy-efficient mobile sensing . He has published over 100 papers and holds 7 US patents , including cache-based compaction techniques with 210+ citations. His projects include fronthaul slicing for 5G, network-wide packet history frameworks, and participatory indoor localization. Scientific recognition includes: Best Paper Awards: IEEE ICNP 2019, ACM SOSR 2019, ICDCN 2016 Best Demo: IPSN 2016 Distinguished Member, INFOCOM TPC (2016, 2020, 2021) He serves as Vice-Dean, Graduate Studies and Vice-Dean, Academic Affairs at NUS Computing, and has graduated 21 PhD students . His lab develops solutions for network security , latency-sensitive applications , and mobile sensing .

Rakesh Kumarمشاهده پروفایل

استاد

• Computer Architecture
• System-Level Design Automation
• Low Power Computing
• +۳ مورد دیگر

Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.

Nate Fosterمشاهده پروفایل

استاد

• Programming Languages
• Networking
• Databases
• +۵ مورد دیگر

Nate Foster is a Professor of Computer Science at Cornell University and currently serves as the Associate Dean for Research in the Ann S. Bowers College of Computing and Information Science. He is also a Visiting Researcher at Jane Street and served as a Visiting Professor at École Polytechnique Fédérale de Lausanne during the 2023-24 academic year. His research uses ideas from programming languages to solve problems in networking, databases, and security. BA in Computer Science, Williams College (2001) MPhil in History and Philosophy of Science, University of Cambridge (2008, all work completed in 2003) PhD in Computer and Information Science, University of Pennsylvania (2009) Foster's research focuses on developing languages and tools that make it easy for programmers to build secure and reliable systems. His current work centers on the design and implementation of languages and tools for programmable networks, particularly using the P4 language. His past work includes bidirectional languages (also known as 'lenses'), database query languages, data provenance, type systems, mechanized proof, and formal semantics. His research group at Cornell has made significant contributions to network verification, software-defined networking, and formal foundations for programmable data planes. Analysis of Foster's recent publications reveals a strong focus on network verification and programming language foundations for networking. His work consistently applies formal methods to practical networking problems, with a particular emphasis on the NetKAT and P4 languages. Over the past five years, his research has evolved toward more complex network verification techniques, including infinite state verification, active learning of network models, and dependently-typed approaches to network programming. His work bridges theoretical computer science with practical networking systems, making formal methods accessible to network engineers. ACM Fellow (2025) ACM SIGPLAN Robin Milner Award (2023) ACM SIGCOMM Rising Star Award (2018) NSF CAREER Award (2013) Alfred P. Sloan Fellowship (2012) Multiple distinguished paper awards across top conferences including POPL, PLDI, and SIGCOMM Foster has advised numerous PhD and Master's students who have gone on to prominent positions in both industry and academia, with many continuing work in programming languages and networking. He has led multiple significant research grants including an NSF CAREER Award and has been involved in the P4 Language Consortium, serving as Chair of the P4 Language Governing Board. His work has been supported by various organizations including NSF, DARPA, and industry partners like Intel and Jane Street. Foster is also active in the programming languages research community, serving on numerous program committees and as Vice Chair of DARPA's Information Science and Technology (ISAT) study group. Foster leads a vibrant research group at Cornell focused on programming languages for networks, with collaborators from academia and industry. His group has developed several influential tools and frameworks including NetKAT, Petr4, and KATch. They maintain strong connections with the P4 community and work closely with industry partners to ensure their research has practical impact on real-world networking systems.

Gert Cauwenberghsمشاهده پروفایل

استاد

• Neuromorphic Engineering
• Biomedical Integrated Circuits
• Neural Interfaces
• +۷ مورد دیگر

Gert Cauwenberghs is a Professor of Bioengineering at the University of California San Diego (UCSD), affiliated with the Jacobs School of Engineering. He co-directs the Institute for Neural Computation and holds a visiting professorship at MIT. His research focuses on neuromorphic engineering, energy-efficient neural interfaces, and wearable biosensors. Key contributions include silicon-based adaptive neural circuits, implantable neural recording systems, and in-ear biosensing devices. Education: M.Eng. in Applied Physics (University of Brussels, 1988), M.S. and Ph.D. in Electrical Engineering (Caltech, 1989–1994). Prior roles include Professorships at Johns Hopkins University and Visiting Professor at MIT. Research Interests: Biomedical integrated circuits, neuromorphic computing, brain-machine interfaces, and energy-efficient neural systems. His work bridges neuroengineering and clinical applications, emphasizing adaptive intelligence and low-power designs. Recent Work: Development of femtojoule-efficient neural chips, high-density neural interfaces, and closed-loop wearable systems. Projects include neurobench benchmarking frameworks and RRAM-based neuromorphic hardware. Awards: NSF Career Award (1997), ONR Young Investigator (1999), PECASE (2000), IEEE Distinguished Lecturer (2003–2004). Grants & Labs: Active in NIH and DoD-funded projects, co-directs the UCSD Institute for Neural Computation. Collaborates with industry on neural interface technologies. Labs/Teams: Cauwenberghs Lab at UCSD focuses on integrated neuroengineering systems, including neural recording systems and neuromorphic computing architectures.

Michael O'Boyleمشاهده پروفایل

استاد

• Heterogeneous Code discovery and Optimisation
• Neural Machine Translation and Neural Synthesis
• Deep Neural Network system stack
• +۷ مورد دیگر

Michael O'Boyle is a Professor at the University of Edinburgh's School of Informatics, where he serves as Director of the ARM Research Centre of Excellence and the EPSRC Centre for Doctoral Training in Pervasive Parallelism. Holding an EPSRC Established Career Research Fellowship, he leads pioneering work in compiler technology for heterogeneous architectures, bridging theoretical advances with practical high-performance computing applications. Professor O'Boyle's research spans multiple cutting-edge areas including heterogeneous code discovery and optimization, neural machine translation for program synthesis, deep neural network system stack optimization, software-defined hardware, and compiler/architecture co-design. His approach integrates constraint analysis, program synthesis, and machine learning to address complex challenges in high-performance computing across diverse hardware platforms. His recent publications reveal a strong trend toward integrating machine learning with traditional compiler techniques, particularly in neural program synthesis, tensor optimization, and architecture-aware compilation. This work represents a paradigm shift in compiler design, moving from rule-based systems to learning-based approaches that can automatically adapt to diverse hardware targets. IEEE/ACM CGO 2025 Distinguished Paper Award for 'Tensorize: Fast Synthesis of Tensor Programs from Legacy Code' IEEE/ACM CGO 2024 Test of Time Award ACM GPCE 2023 Best Paper Award for 'C2TACO: Lifting Tensor Code to TACOM' ACM ASPLOS 2021 Distinguished Paper Award IEEE HPCA 2021 Best Paper Award for 'Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads' Professor O'Boyle has successfully mentored numerous PhD students who have secured prominent positions in academia (including at Cambridge, Edinburgh, Leeds, and McGill) and industry (including Meta, NVIDIA, Qualcomm, Huawei, and Microsoft). His research is supported by significant funding from EPSRC, ARM, and European projects including Bonseyes and Transmuter, demonstrating strong international recognition and industry impact. He leads the influential Compiler and Architecture Design (CArD) Group at the University of Edinburgh and is a founder of the HiPEAC Network of Excellence, which has grown into a major European initiative connecting researchers and practitioners in high-performance and embedded computing.