Christophe Jégo is a researcher specializing in hardware/software co-design for communication systems, with affiliations suggesting connections to Université de Bordeaux's College of Engineering. His core expertise spans error-correction coding (LDPC, polar, turbo codes), FPGA/ASIC implementations, and high-performance computing architectures for telecommunications. Research interests focus on: Hardware acceleration of communication algorithms (LDPC/polar decoders, FFT processors) Multicore/GPU optimization for real-time signal processing RTL design automation tools and high-level synthesis frameworks 5G physical layer implementations including MIMO detection Resource-constrained embedded systems for IoT and space applications Publication analysis reveals strong emphasis on: FPGA implementations of communication blocks (67% of recent works) Parallel processing techniques for LDPC/polar decoding (2014-2025) Open-source tool development for hardware design (AFF3CT, Odatix) Cross-layer optimization from algorithms to silicon implementation









