Sanjit A. Seshia is the Cadence Founders Chair Professor in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley . He is affiliated with the Group in Logic and the Methodology of Science and participates in centers like the Industrial Cyber-Physical Systems Center , Berkeley AI Research , and the Simons Institute for the Theory of Computing . Research interests include formal methods for automated verification and synthesis of dependable systems, with applications to cyber-physical systems , AI-based autonomy , and computer security . His work spans SMT solving, model counting, syntax-guided synthesis, and algorithmic improvisation, with tools like UCLID5 , VerifAI , and Scenic for verifying autonomous systems and educational platforms like CPSGrader . Students and collaborators include notable researchers such as Dorsa Sadigh (Stanford), Daniel Fremont (UC Santa Cruz), and Hazem Torfah (Chalmers). He has co-founded startups like Decyphir and 20ⁿ Labs based on his research.
François Guimbretière is a Professor in the Department of Information Science at Cornell University, with affiliations to the Department of Design & Technology. He holds a PhD in Computer Science from Stanford University and previously served on the faculty at the University of Maryland before joining Cornell in 2009. His research centers on human-computer interaction, human-robot interaction, and interface design, with a strong emphasis on hardware/software co-design to create seamless, sustainable, and innovative interactive systems. His work spans multiple domains including interactive fabrication, remote collaboration, and low-power interfaces. Guimbretière's recent research explores novel fabrication methods such as interactive printing and yarn-based electronics, as well as immersive remote embodiment systems that reduce reliance on physical travel. These efforts reflect a broader trend toward sustainable and accessible interaction technologies. His publications demonstrate consistent contributions to top-tier venues in HCI and ubiquitous computing, focusing on tangible, wearable, and environmentally conscious interfaces. Scientific Recognition: He advises graduate and undergraduate researchers in the development of next-generation interactive systems. His lab supports projects in digital fabrication, remote presence, and sustainable design, often involving interdisciplinary collaboration. While specific grants are not listed, his research trajectory suggests sustained funding in human-centered technology innovation. He leads a research group focused on building practical, user-centered systems that bridge the digital and physical worlds through creative engineering and design. The lab emphasizes hands-on prototyping, real-world deployment, and the integration of traditional craft with advanced technologies.
Professor Wayne Luk is a Professor of Computer Engineering at the Department of Computing, Faculty of Engineering, Imperial College London. He leads the Programming Languages and Systems Section and the Custom Computing Research Group, and directs the EPSRC Centre for Doctoral Training in High-performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. He previously served as a Visiting Professor at Stanford University from 2006 to 2009. His research spans FPGA acceleration, quantum computing, deep learning optimization, and algorithm-hardware co-design, with affiliations to the CRUK Convergence Science Centre and the Engineering Secure Software Systems group. His research interests include computational modeling for particle physics, causal discovery in agent-based systems, and high-throughput digital electronics. Notable contributions include FPGA-accelerated algorithms for neural networks, quantum circuit simulation, and Bayesian optimization frameworks. His work emphasizes practical applications of reconfigurable hardware in fields like medical imaging, high-energy physics, and financial systems. Professor Luk is a Fellow of the Royal Academy of Engineering, IEEE, and BCS. His publications focus on advancing hardware-aware machine learning, FPGA-based acceleration techniques, and scalable design methodologies. His research bridges theoretical computer science with applied engineering, addressing challenges in real-time systems, embedded computing, and next-generation computing architectures. His academic leadership includes directing interdisciplinary centers and training programs, fostering collaboration across computing, engineering, and physics. Current projects explore quantum computing tools, causal inference systems, and high-performance graph neural networks for particle physics applications.
Christina L. Garman is an Assistant Professor in the Department of Computer Science at Purdue University, where she joined in Spring 2018. Her research focuses on practical cryptography and cryptographic automation to make secure system development accessible to non-experts through error-resistant design methodologies. Her educational background includes: Bachelor of Science in Computer Science and Engineering from Bucknell University (2011) Bachelor of Arts in Mathematics from Bucknell University (2011) Master of Science in Engineering in Computer Science from Johns Hopkins University (2013) Doctor of Philosophy in Computer Science from Johns Hopkins University (2017) Professor Garman's work centers on real-world cryptographic system security, spanning protocol analysis (e.g., RC4 in TLS, Apple iMessage flaws), decentralized anonymous systems (Zerocash/ZCash), and cryptographic automation. She pioneered techniques for removing human error in cryptographic deployments through automated tools and frameworks. Her research bridges theoretical cryptography with practical implementation challenges in privacy-preserving technologies and secure infrastructure. Analysis of her 2021-2025 publications reveals expanding research horizons: hardware security vulnerabilities (Rowhammer, SGX), privacy network enhancements (Tor onion services), software supply chain security (SBOM tools), and advanced cryptographic protocols (zkSNARKs, MPC). This evolution demonstrates consistent focus on real-world security impact while diversifying into hardware-software cross-layer threats and formal verification methods for cryptographic implementations. Her major scientific recognitions include: NSF CAREER Award (2021) for cryptographic automation research ACM CCS Best Paper Award (2016) for iMessage security analysis IEEE Test of Time Award (2024) for foundational Zerocash work Professor Garman co-founded ZCash, a privacy-focused cryptocurrency based on her Zerocash protocol, and her NSF CAREER grant supports cryptographic automation development. Her research has received significant media coverage in The Washington Post, Wired, and The New York Times, highlighting real-world relevance. While specific student advising details aren't public, her active publication record indicates ongoing mentorship of graduate researchers in security and cryptography. Her work maintains strong industry connections through ZCash development and Tor network contributions, with recent projects like keyless CDNs demonstrating practical applications of cryptographic automation. She remains a leading voice in cryptographic research communities through conference participation and collaborative projects addressing evolving security challenges.
Professor Peter Y. K. Cheung is a Professor of Digital Systems at Imperial College London, holding dual affiliations within the Department of Electrical and Electronic Engineering and the Dyson School of Design Engineering. His work focuses on reconfigurable systems, FPGA architectures, and high-level synthesis tools. He co-founded one of the UK's leading FPGA research groups with Professor Wayne Luk, addressing challenges in variability mitigation, reliability, and application-specific FPGA deployments. His research spans Field-Programmable Gate Arrays (FPGAs) Reconfigurable computing Neural network acceleration Cryptographic protocols Embedded systems He has pioneered techniques such as logic shrinkage for FPGA-based neural networks and developed frameworks like LUTNet for efficient inference. His contributions also include fault-tolerant FPGA designs and methodologies for distributed computation protocols. Key collaborations include work with the Department of Computing on FPGA-based AI acceleration and cybersecurity applications. His recent work explores edge computing, secure decentralized systems, and pandemic modeling using adaptive control strategies. Notable projects include the DSCS protocol for secure distributed computation, acceleration of gravitational wave detection algorithms, and energy-efficient CNN implementations. His research bridges hardware-software co-design with real-world applications in healthcare, finance, and aerospace.
Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.
Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.
Kayvon Fatahalian is an Associate Professor in the Department of Computer Science at Stanford University. His research focuses on real-time graphics, high-efficiency simulation engines for entertainment and AI, and large-scale image/video analysis platforms. He explores intersections of computer graphics, machine learning, and high-performance computing to advance systems for interactive applications and AI-driven tasks. His work includes innovations in rendering pipelines, embodied AI simulations, and generative models for 3D content creation. Recent projects address challenges in multi-agent systems, motion synthesis, and scalable rendering architectures. Fatahalian’s contributions span technical systems, algorithmic frameworks, and foundational research in graphics and AI. Notable areas of exploration include: Real-time rendering optimizations for complex scenes AI-driven motion and style generation from sparse inputs Efficient simulation frameworks for deep reinforcement learning Weak supervision techniques for rare category detection His publications emphasize practical systems with theoretical grounding, often bridging hardware/software co-design principles with modern AI methodologies. Current work includes developing agile hardware accelerators and scalable architectures for next-generation interactive systems.
Jeremy Gibbons is a Professor of Computing at the University of Oxford, affiliated with the Department of Computer Science within the Faculty of Computer Science. He serves as Director of the Professional Programmes, overseeing part-time postgraduate degrees in Software Engineering. His roles include Chair of the Faculty of Computer Science (2012–2016), Director of the Software Engineering Programme, and Fellow of Kellogg College. Gibbons' research focuses on programming methodologies, particularly functional and object-oriented languages, with an emphasis on program calculation, design patterns, and bidirectional transformations. He leads the Algebra of Programming research group and is Editor-in-Chief of the Journal of Functional Programming and The Art, Science, and Engineering of Programming . Education includes a D.Phil. from Oxford University. His work spans formal methods, domain-specific modeling for clinical trials (e.g., CancerGrid project), and semantic frameworks for software systems. He has advised numerous students and contributed to open-access initiatives in publishing. Key collaborations include roles in ACM SIGPLAN and IFIP Working Groups 2.1 and 2.11. Research interests emphasize foundational aspects like profunctor optics, categorical programming, and algorithm design. Notable projects include datatype-generic programming and metadata-driven engineering for clinical trials. His work bridges theoretical computer science with practical applications in software architecture and system design.
Alastair Beresford is Professor of Computer Security and Head of the Department of Computer Science and Technology (The Computer Laboratory) at the University of Cambridge. He is also the Robin Walker Fellow in Computer Science at Queens' College, Cambridge. His leadership spans both academic administration and research innovation within one of the world's leading computer science departments. Professor Beresford's research focuses on the security and privacy of large-scale distributed computer systems, with particular emphasis on networked mobile devices such as smartphones, tablets, and laptops. His work examines both device-level security and the privacy implications of interactions between mobile devices and cloud-based services. His methodological approach combines critical evaluation of existing products, development of novel prototype technologies, and empirical measurement of human behavior in security contexts. His recent publications reveal a strong focus on confidentiality computing, anonymity networks, mobile security, and secure group communication. Notable projects include Pudding (private user discovery in anonymity networks), CoverDrop (secure whistleblower-journalist communication), and research on the practical viability of anonymity networks on smartphones. His work consistently bridges theoretical security concepts with practical implementations that have led to real-world security improvements in iOS, Android, and OpenSSH. Scientific Awards: Andreas Pfitzmann Best Student Paper Award (PETS 2022) for work on secure initial contact between whistleblowers and journalists Professor Beresford leads several major collaborative research initiatives including the Centre for Mobile, Wearable Systems and Augmented Intelligence (co-directed with Prof Cecilia Mascolo), the Cambridge Cybercrime Centre, and the Raspberry Pi Computing Education Research Centre. He also serves as technical director for the Isaac Learning Platform, which has supported over 500,000 users making more than 120 million question attempts since 2015. His research has practical impact, with findings leading to security fixes in major commercial products including iOS 12.2 (CVE-2019-8541), watchOS 5.2, Android 11, and OpenSSH 9.8 (CVE-2024-39894).
Danyang Zhuo is an Assistant Professor of Computer Science at Duke University, Trinity College of Arts & Sciences, with expertise in datacenter/cloud computing and machine learning systems. He joined Duke in 2020 after postdoctoral research at UC Berkeley under Ion Stoica and a PhD at the University of Washington advised by Tom Anderson and Arvind Krishnamurthy. Education: PhD in Computer Science (University of Washington, 2019) His research focuses on improving cloud infrastructure through systems like Phoenix (application-level abstractions) and Phantora (GPU cluster simulation). Recent work explores LLM verification, tensor compression via video codecs, and fairness in LLM serving. His 15 most recent publications span operating systems, machine learning, and networked systems conferences like HOTOS, NSDI, SIGCOMM, and OSDI. Scientific honors include NSF CAREER Award (2023), USENIX Security Distinguished Paper (2023), and multiple industry research awards. He has secured major NSF grants for projects including "OS-Managed Remote Procedure Call" and "Campus-level RDMA Networking." At Duke, he advises PhD students and teaches courses such as Introduction to Operating Systems (CompSci 310) and Systems for Machine Learning (CompSci 590.05). His work appears in leading conferences and journals, with collaborations across institutions including UC Berkeley, University of Washington, and industry partners.
Christopher Kruegel is a Professor in the Department of Computer Science at the University of California, Santa Barbara (UCSB), where he conducts research in systems security. He is affiliated with the International Secure Systems Lab (iSecLab) and was a co-founder of Lastline, Inc., which was acquired by VMware in 2020. His work focuses on creating practical security solutions that address real-world problems through system building and experimental validation. Professor Kruegel's research spans multiple areas of computer security including malware analysis, web security, network security, and vulnerability analysis. His work often involves developing systems that analyze programs for malicious behavior, scanning web applications for vulnerabilities, and improving privacy on social networks. He has made significant contributions to firmware security, smart contract analysis, and mobile security through his extensive publication record. His 15 most recent publications (2022-2023) demonstrate a strong focus on practical security solutions across diverse domains including firmware security (Shimware, Fuzzware), blockchain and smart contract security (Confusum Contractum, NFT security), mobile security (TEEzz, Columbus), and vulnerability detection techniques (Actor, Toss a Fault to Your Witcher). His research shows consistent innovation in security tools and methodologies with several papers receiving distinguished awards. Fellow of the Institute of Electrical and Electronics Engineers Outstanding Graduate Mentor Award, UCSB Academic Senate Distinguished Artifact Award for Fuzzware paper Distinguished Paper Award for Ramblr paper Best Student Paper Award for Detecting Spammers On Social Networks Professor Kruegel has advised numerous graduate students and collaborated extensively with researchers at UCSB and beyond. His work has been funded by various research grants supporting his security research initiatives. He is actively involved in the International Secure Systems Lab, which focuses on practical security solutions for real-world problems.
Prof. Dr.-Ing. Eric Sax is a Professor of Electronic Systems Engineering and Management at the Karlsruhe Institute of Technology (KIT), serving as Dean of the Department of Electrical Engineering and Information Technology (ETIT). He leads the Institut für Technik der Informationsverarbeitung (ITIV) and directs the Forschungszentrum Informatik ESS division . As Program Director of the Electronic Systems Engineering & Management (ESEM) master's program at the HECTOR School, he focuses on integrating academic and professional education. His research spans automotive systems engineering , self-learning functions , cybersecurity , and data-driven validation . Key themes include over-the-air updates, scenario-based testing, and the synergy between machine learning and automotive systems. His work addresses challenges in autonomous driving validation, software-defined mobility, and cyber-physical system security. Prof. Sax's contributions include frameworks for automotive software partitioning, cloud-enabled vehicle architectures, and methodologies for quantifying data quality impacts on perception systems. He actively collaborates with industry partners to bridge academic research with industrial application. His recent projects include OptiCAM (cloud/edge function offloading), Drive4C (autonomous driving benchmarking), and UNCOVER (data-driven security monitoring). He holds leadership roles in both KIT and the HECTOR School's technology business programs.
Austin Rovinski is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University’s Tandon School of Engineering. He specializes in chip design, electronic design automation (EDA), and open-source hardware methodologies. His research focuses on VLSI design, domain-specific accelerators, and chiplet-based systems. Prior to NYU, he held a postdoctoral position at Cornell University and earned all his degrees (Ph.D., M.S., and B.S.) from the University of Michigan. Education: Ph.D., Electrical Engineering, University of Michigan - Ann Arbor Master’s, Electrical Engineering, University of Michigan - Ann Arbor Bachelor’s, Electrical Engineering, University of Michigan - Ann Arbor Research Focus: Developing open-source EDA frameworks like OpenROAD Optoelectronic interconnect systems for 2.5D packaging Agile hardware design methodologies Reconfigurable sparse matrix accelerators RISC-V-based manycore processors (e.g., Celerity project) Key Contributions: Austin led the development of the OpenROAD RTL-to-GDS flow and contributed to the Sirius and Celerity projects. His work emphasizes reproducibility, democratizing chip design through open-source tools. Awards: IEEE Micro Top Picks (2015) Michigan EECS Outstanding Research Award (2016) NSF Graduate Research Fellowship Honorable Mention (2017, 2018) Advising & Grants: Actively mentors graduate students in chip design and EDA. His research is supported by NYU’s Tandon School of Engineering and collaborations with industry partners. Labs & Teams: Core contributor to the OpenROAD project, part of NYU’s hardware design and EDA initiatives, and collaborator on the Celerity manycore processor project.
Dr. Mahesh Tripunitara is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, serving as Associate Chair for Undergraduate Studies. He holds a PhD (2005) and Master's (1995) in Computer Science from Purdue University, along with a BSc (1993) in Computer Science from Dalhousie University. His research focuses on information security, authorization mechanisms, cryptographic key management, and hardware security, with industry experience at Motorola's R&D labs and Silicon Valley. His work spans theoretical advancements like access control policy analysis and practical applications such as secure payments systems and IoT device reliability. Notable awards include the Best Student Paper at Usenix Security 2013 and Best Paper at ACM SACMAT 2013. He actively serves on program committees for major security conferences including CCS, CODASPY, and SACMAT. Recent publications highlight innovations in cellular security (SUCI-Catchers defense), role-mining optimization, and blockchain smart contract auditing. Teaching includes advanced algorithm design courses (ECE 406/606) and digital computation (BME 121). His research emphasizes balancing security rigor with usability in authorization systems and hardware protection mechanisms.
