جست‌وجوی استاد و پژوهشگر

Michael O'Boyleمشاهده پروفایل

استاد

• Heterogeneous Code discovery and Optimisation
• Neural Machine Translation and Neural Synthesis
• Deep Neural Network system stack
• +۷ مورد دیگر

Michael O'Boyle is a Professor at the University of Edinburgh's School of Informatics, where he serves as Director of the ARM Research Centre of Excellence and the EPSRC Centre for Doctoral Training in Pervasive Parallelism. Holding an EPSRC Established Career Research Fellowship, he leads pioneering work in compiler technology for heterogeneous architectures, bridging theoretical advances with practical high-performance computing applications. Professor O'Boyle's research spans multiple cutting-edge areas including heterogeneous code discovery and optimization, neural machine translation for program synthesis, deep neural network system stack optimization, software-defined hardware, and compiler/architecture co-design. His approach integrates constraint analysis, program synthesis, and machine learning to address complex challenges in high-performance computing across diverse hardware platforms. His recent publications reveal a strong trend toward integrating machine learning with traditional compiler techniques, particularly in neural program synthesis, tensor optimization, and architecture-aware compilation. This work represents a paradigm shift in compiler design, moving from rule-based systems to learning-based approaches that can automatically adapt to diverse hardware targets. IEEE/ACM CGO 2025 Distinguished Paper Award for 'Tensorize: Fast Synthesis of Tensor Programs from Legacy Code' IEEE/ACM CGO 2024 Test of Time Award ACM GPCE 2023 Best Paper Award for 'C2TACO: Lifting Tensor Code to TACOM' ACM ASPLOS 2021 Distinguished Paper Award IEEE HPCA 2021 Best Paper Award for 'Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads' Professor O'Boyle has successfully mentored numerous PhD students who have secured prominent positions in academia (including at Cambridge, Edinburgh, Leeds, and McGill) and industry (including Meta, NVIDIA, Qualcomm, Huawei, and Microsoft). His research is supported by significant funding from EPSRC, ARM, and European projects including Bonseyes and Transmuter, demonstrating strong international recognition and industry impact. He leads the influential Compiler and Architecture Design (CArD) Group at the University of Edinburgh and is a founder of the HiPEAC Network of Excellence, which has grown into a major European initiative connecting researchers and practitioners in high-performance and embedded computing.

Jan Madsenمشاهده پروفایل

استاد

• Embedded Systems
• Cyber-Physical Systems
• Microfluidic Biochips
• +۵ مورد دیگر

Jan Madsen is a Professor at DTU Compute, Technical University of Denmark, and Head of the Embedded Systems Engineering section. His research focuses on system-level modeling and design of embedded computing systems, particularly cyber-physical systems, microfluidic biochips, and synthetic biology applications. Develops design automation tools and methodologies for embedded systems Supervises numerous PhD students and leads major research projects Research Interests Key areas include: Embedded systems-on-a-chip Cyber-Physical Systems (Internet-of-Things) Microfluidic Lab-on-Chip devices Synthetic biology with molecular computing Design, modeling, and optimization of complex systems Scientific Awards DATE Fellow (2019) IEEE CEDA Outstanding Recognition (2019) DTU Scientific Advise Award (2013) Best Paper Awards at MECO (2013) and CASES (2009) Jorck’s Foundation Research Award (1995) Publications His 14+ journal papers and 115+ conference papers demonstrate expertise in: SystemC-based modeling frameworks Energy-aware sensor networks Self-healing eDNA architectures Microfluidic biochip synthesis RTOS modeling and MPSoC exploration

James C. Hoeمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +۴ مورد دیگر

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

José F. Martínezمشاهده پروفایل

استاد

• Computer Architecture
• Microprocessor Design
• Multiprocessor and Multicore Architectures
• +۵ مورد دیگر

José F. Martínez holds the Lee Teng-hui Professorship of Engineering at Cornell University's College of Engineering, where he leads research in computer architecture and systems. His roles include Vice Chair of ACM SIGARCH, IEEE Fellow, and past leadership roles in ISCA, MICRO, and IEEE Computer Society journals. He has received prestigious awards such as the NSF CAREER Award, IBM/Qualcomm Faculty Awards, and multiple teaching accolades including Tau Beta Pi Professor of the Year (2011). Education: Licenciado en Informática de Sistemas (1996), Universidad Politécnica de Valencia M.S. (1999) and Ph.D. (2002) in Computer Science, University of Illinois at Urbana-Champaign His research focuses on computer architecture , including microprocessors, multiprocessors, memory subsystems, embedded systems, and processing-in-memory (PIM) innovations. He co-leads the DARPA/SRC ACE Center for Evolvable Computing and NSF's CROPPS Center, and previously co-founded Cornell's Institute for Digital Agriculture (CIDA). His work bridges hardware-software co-design and sustainable computing. Key Contributions: Advancing energy-efficient multiprocessor architectures Developing PIM frameworks like PUMICE and Membrane Market-based resource allocation systems (e.g., XChange, ReBudget) His advising spans over 15 graduate students and has guided Merrill Presidential Scholars. Current research explores evolvable computing paradigms and AI hardware acceleration, reflecting his dual focus on foundational architecture and applied systems innovation.

Brian Leeds DeMarcoمشاهده پروفایل

استاد

• Quantum Simulation
• Condensed Matter Physics
• Atomic, Molecular, and Optical Physics (AMO)
• +۴ مورد دیگر

Professor Brian Leeds DeMarco is a leading academic in the Department of Physics at the University of Illinois Urbana-Champaign (UIUC), serving as the IQUIST Director and Bardeen Faculty Scholar. He specializes in Atomic, Molecular, and Optical Physics, with a focus on quantum simulation using ultracold atoms in optical lattices to address problems in condensed matter physics. His research has led to groundbreaking discoveries, including the first quantum-degenerate Fermi gas and three-dimensional Anderson localization of matter, earning him prestigious awards like the NSF CAREER Award and Sloan Fellowship. DeMarco holds a B.A. in Physics from SUNY Geneseo (1996) and a Ph.D. from the University of Colorado Boulder (2001). His postdoctoral work at NIST with David Wineland advanced quantum computing with trapped ions. At UIUC since 2003, he has held roles such as Associate Head for Undergraduate Programs and currently chairs NASA's Fundamental Physical Sciences Standing Review Board. His research explores quantum simulation, quantum computing architectures, and ultracold matter. Notable achievements include identifying phase-slip crossover in optical lattices and pioneering 3D Anderson localization. He has published over 30 high-impact articles, with recent work focusing on quantum simulators and hybrid quantum systems. Awards: APS Fellow, University of Illinois Scholar, NASA Review Board Chair, Defense Sciences Study Group member. Grants: NSF, ONR, Sloan Foundation support for quantum simulation and ultracold atom research. DeMarco leads the DeMarco Group, advancing quantum technologies and training students in experimental physics. His lab’s work on quantum testbeds and trapped ion processors positions him at the forefront of quantum information science.

Rabi N. Mahapatraمشاهده پروفایل

استاد

• Embedded systems
• System-on-chip
• Reconfigurable architectures
• +۸ مورد دیگر

Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.

Thomas Wildمشاهده پروفایل

استاد

• Manycore system on chip (SoC) architectures
• Network processor (NPU) architectures
• On-chip communication architectures
• +۳ مورد دیگر

Dr.-Ing. Thomas Wild serves as an Academic Director at the Technical University of Munich (TUM), working within the TUM School of Computation, Information and Technology at the Chair of Integrated Systems. He maintains an active research and teaching role at the institution, with his office located in Building N1 (Theresienstr. 90), Room N2136 in Munich, Germany. Dr. Wild's research focuses on advanced computing architectures, with particular emphasis on manycore system on chip (SoC) architectures, network processor (NPU) architectures, on-chip communication architectures including networks on chip (NoC), and system level design methodologies. His work bridges theoretical research with practical implementation, often exploring design space exploration techniques to optimize system performance. The evolution of his research over two decades demonstrates a consistent focus on improving communication architectures and system-level design for embedded and high-performance computing platforms. His recent publications (2023-2025) reveal a growing integration of machine learning techniques with traditional hardware design, particularly in optimizing power-performance tradeoffs in embedded systems. There's a clear trend toward hardware-software co-design approaches, with significant work on SmartNICs, Linux system optimization, and network processing acceleration. His research shows strong interdisciplinary connections between computer architecture, networking, and machine learning. EUROPRACTICE representative for TUM city campus, facilitating access to commercial EDA tools for academic purposes Active collaborator with Professor Andreas Herkersdorf and other researchers at TUM Focus on practical implementations with FPGA-based prototyping and real system modifications Dr. Wild teaches several hardware design courses including VHDL Lab, SystemC Lab, and HW/SW Codesign, contributing to the education of next-generation computer engineers. His teaching directly complements his research in system design and hardware acceleration, providing students with hands-on experience in cutting-edge technologies.

Mohamed Hassanمشاهده پروفایل

استادیار

• Computer Architecture
• Embedded Systems
• Real-Time Systems
• +۱۲ مورد دیگر

Dr. Mohamed Hassan is an Assistant Professor in the Department of Electrical & Computer Engineering at McMaster University. His research focuses on Cyber-Physical Systems-on-Chip (iCPSoCs) , emphasizing design, analysis, and deployment for critical domains like Unmanned Aerial Vehicles (UAVs), Autonomous Cars, and healthcare systems. Key research areas include hardware/software codesign, real-time systems, embedded systems, and security. He teaches courses such as COMPENG 4DM4 (Computer Architecture) and COMPENG 4DS4 (Embedded Systems) . His work bridges foundational theories (e.g., scheduling, AI) with infrastructure-level innovations (e.g., compilers, memory systems). The Fanos Research Lab he leads explores interdisciplinary solutions for efficient CPS-on-Chip, addressing challenges in multicore predictability, memory latency, and edge computing. Recent contributions include frameworks for explainable memory-centric workloads and techniques to accelerate TinyML inference. Dr. Hassan serves on Technical Program Committees for conferences like RTAS and OSPERT, highlighting his role in advancing real-time embedded systems research.

Vincent John Mooney IIIمشاهده پروفایل

دانشیار

• Hardware-Software Co-Design
• Cyber Physical Systems Security
• System Level Design
• +۷ مورد دیگر

Vincent John Mooney III is an Associate Professor at the School of Electrical and Computer Engineering and an Adjunct Associate Professor at the School of Computer Science, Georgia Institute of Technology. His research focuses on Hardware-Software Co-Design , Cyber Physical Systems Security , and Low-Power Architectures . He has authored numerous publications on topics such as probabilistic computing, hardware security, and embedded systems design. Dr. Mooney has received prestigious awards including the NSF Career Award , National Semiconductor Fellowship , and ARCS Best Paper Award . Education: Ph.D. in Electrical Engineering (1998), Stanford University MA in Philosophy (1997), Stanford University MS in Electrical Engineering (1994), Stanford University Certificate of Graduate Study (1992), University of Navarra BS in Electrical Engineering and Computer Science (1991), Yale University Research interests span hardware/software codesign, cybersecurity in embedded systems, and synthesis of reconfigurable architectures. His recent work includes Gridtrust for decentralized supply chain cybersecurity and COPPER for computation obfuscation. Dr. Mooney has supervised numerous Ph.D. students and held leadership roles in conferences such as HOST and CASES . Scientific awards include NSF Career Award (2000) National Semiconductor Fellowship (1997-1998) AT&T Engineering Scholarship Program (1987-1991) NCAA Postgraduate Scholar (1991) Senior Member, IEEE (2003) ARCS 2012 Best Paper Award Advising and grants highlight his mentorship of students like Jun Cheol Park and Yudong Tan , along with grants such as the U.S. Air Force Summer Faculty Fellowship (2007). He leads the Hardware/Software Codesign for Security Group at Georgia Tech and has contributed to advancements in real-time operating systems and deadlock detection algorithms.

Trevor Brownمشاهده پروفایل

دانشیار

• Concurrent Data Structures
• Lock-Free Algorithms
• Transactional Memory
• +۴ مورد دیگر

Trevor Brown is an Associate Professor in the Computer Science department at the University of Waterloo, affiliated with the Cheriton School of Computer Science. He leads the Multicore Lab and specializes in concurrent data structures, non-blocking algorithms, and memory management. His research bridges theory and systems, focusing on practical implementations of lock-free trees, transactional memory, and techniques for non-uniform memory architectures. Education includes a PhD in Computer Science from the University of Toronto and a B.Sc. in Computer Science and Mathematics from York University. Research interests center on concurrent systems, with recent work exploring hardware-accelerated indexing, memory reclamation techniques, and performance anomalies in microbenchmarks. His publications demonstrate consistent innovation in parallel computing, with articles frequently appearing at top conferences like PPoPP, SPAA, and DISC. Sustainable energy research includes optimizing hybrid power systems and battery storage solutions. Awards include multiple best paper/artifact recognitions at SPAA and PPoPP, teaching excellence honors, and nominations for the Governor General’s Gold Medal. Extensive advising includes 13+ graduate students and PDFs, with research grants exceeding $965K from NSERC, Huawei, and CFI. He directs the Multicore Lab, developing open-source tools like SetBench for rigorous performance benchmarking.

John Wickersonمشاهده پروفایل

دانشیار

• Computer Hardware
• Electrical and Electronic Engineering
• Computer Software
• +۷ مورد دیگر

Dr. John Wickerson is an Associate Professor in the Circuits and Systems group at the Department of Electrical and Electronic Engineering, Imperial College London. His research focuses on improving the reliability of high-performance computing through formal methods, with contributions to high-level synthesis, memory models, and concurrency verification. He holds leadership roles including Course Director for the Electrical and Information Engineering degree and Deputy Tutor for PhD students. Research Interests: Formal Verification of Hardware/Software Systems High-Level Synthesis (HLS) and FPGA Compilation Weak Memory Models and Concurrency Semantics Fuzz Testing for Hardware Tools Compiler Optimization and Correctness Digit Elision and Arbitrary-Precision Arithmetic Notable Achievements: Best Paper Award at EuroSys 2024 (database isolation validation) Pioneered formal methods for HLS tools (e.g., QuteFuzz, C4) Co-developed the C4 C compiler concurrency checker Published over 60 peer-reviewed papers across top venues (ASPLOS, PLDI, FPGA) Lab/Team: Part of the Circuits and Systems group at Imperial College, collaborating with industry partners like Kaihong Yann and ARM.

Xin Fuمشاهده پروفایل

استاد

• Computer Architecture
• Machine Learning
• Energy-Efficient Computing
• +۲ مورد دیگر

Dr. Xin Fu is a Professor in Electrical and Computer Engineering at the University of Houston's Cullen College of Engineering, holding a PhD from the University of Florida. His research spans computer architecture, energy-efficient systems, machine learning acceleration, and hardware reliability, with applications in edge computing and quantum systems. Awarded the NSF CAREER Award and named Miller Scholar, he leads innovations in heterogeneous computing architectures. Research focuses on optimizing hardware-software co-design for AI workloads, with current projects in federated learning optimization, quantum computing reliability, and neural network acceleration. Recent publications demonstrate cross-cutting work in mobile AI deployment, adversarial defense mechanisms, and quantum error correction. Honors include: NSF Faculty Early CAREER Award (2014) Four-time recipient of competitive NSF research grants Miller Scholar recognition for teaching and research excellence

Nele Mentensمشاهده پروفایل

استاد

• Applied Cryptography
• Hardware Security
• Secure Coprocessor Design
• +۱۲ مورد دیگر

Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.

Heiner Giefersمشاهده پروفایل

استاد

• Cloud Computing
• Hardware Acceleration
• Field-Programmable Gate Arrays
• +۷ مورد دیگر

Heiner Giefers is a Professor for Cloud Computing at the Department of Computer Science and Natural Sciences at Southwestphalia University of Applied Sciences since 2018. Prior to this position, he worked as a Research Staff Member at IBM Research - Zürich (2013-2018), focusing on hardware acceleration in cloud environments, implementation of big data algorithms on FPGAs, and development of hardware platforms for approximate and in-memory computing. Dr. Giefers received his doctorate (Dr. rer. nat.) from Universität Paderborn in 2012 with a dissertation titled "Design and Programming of Reconfigurable Mesh based Many-Cores." His academic journey at Universität Paderborn includes serving as an Academic Council Member (Akademischer Rat a.Z.) from 2008-2013 and as a Scientific Staff Member from 2006-2012, where he taught digital technology and computer architecture. Professor Giefers' research focuses on energy-efficient computing, particularly through hardware acceleration using FPGAs for cloud and AI workloads. His work spans cloud computing infrastructure, hardware-software co-design, approximate computing, in-memory computing, and energy-efficient implementations of machine learning algorithms. He has made significant contributions to the field of reconfigurable hardware for high-performance computing applications. His recent publications show a strong trend toward applying hardware acceleration techniques to artificial intelligence and machine learning workloads, with a particular focus on energy efficiency. His work bridges the gap between theoretical computer science and practical hardware implementation, often resulting in patented technologies that address real-world computing challenges in cloud environments. Best Paper Award for "Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance" (2016) Best Paper Award Nomination for "Energy-Efficient Stochastic Matrix Function Estimator for Graph Analytics on FPGA" (2016) Best Paper Award Nomination for "Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system" (2014) Best Paper Award Nomination for "A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier" (2010) Professor Giefers actively supervises numerous Bachelor's and Master's students, with over 50 completed theses covering topics from machine learning and cloud computing to IoT systems and hardware acceleration. He leads the "Energy-efficient AI" project (eki), which aims to increase the energy efficiency of AI systems through approximation techniques for FPGA implementation. Additionally, he collaborates with Prof. Dr. Christian Plessl on the "Digital teaching materials with Jupyter Notebooks" project, creating interactive learning materials that integrate teaching content, program code, and results into a single document. His work extends to practical applications through multiple patents related to FPGA implementations, neural networks, and memory systems, demonstrating his commitment to translating research into real-world solutions.

• Computer Architecture
• Embedded Systems
• High-Performance Computing
• +۳ مورد دیگر

Zhiqiang Que is a Research Associate in the Department of Computing at Imperial College London, affiliated with the Faculty of Engineering and the Centre for High-Throughput Digital Electronics and Machine Learning. His research focuses on computer architecture, embedded systems, high-performance computing, and CAD tools for hardware design optimization. His research interests include FPGA-based acceleration of machine learning models, hardware-software co-design, and real-time signal processing for scientific applications such as particle physics and gravitational wave experiments. He has contributed to projects involving low-latency graph neural networks (GNNs), Bayesian neural networks, and efficient stream processing on FPGAs. Recent work includes advancements in trustworthy design flows for deep learning acceleration, reconfigurable architectures for recurrent neural networks, and optimizing FPGA-based systems for high-energy physics experiments at the HL-LHC.