Kaveh Razavi is an Assistant Professor at ETH Zurich in the Department of Information Technology and Electrical Engineering, supervising the Computer Security Group. He is also affiliated with the Department of Computer Science. Research focuses on commodity hardware and operating systems security Teaching: Computer Engineering (BSc 2022–2025), Hardware Security (MSc 2016–2025), Advanced Operating Systems (MSc 2016–2019) Research Interests: Razavi's work bridges computer systems and security, emphasizing microarchitectural vulnerabilities, hardware exploitation, and security verification. His group develops tools for analyzing hardware-software interactions and mitigating memory attacks like Rowhammer. Scientific Awards: Distinguished/Best Paper Awards at IEEE S&P, USENIX Security, MICRO Five Pwnies Awards for innovative research Dutch Veni Grant, ERC Starting Grant Jochen Liedtke Young Researcher Award Golden Owl Teaching Award (2022) ETH Medal, Intel Bounty Reward, BlackHat USA Recognition
Deian Stefan is an Associate Professor at the University of California San Diego (UCSD) in the Department of Computer Science and Engineering . His research spans security , programming languages , and systems , with a focus on building principled and practical secure systems. He has served as a co-founder and Chief Scientist at Intrinsic (acquired by VMWare) and contributed to standards bodies like the W3C WebAppSec and Node.js Security Working Groups . His research interests include: Secure Systems : Web frameworks, browser designs, sandboxing, runtime systems Language-Based Security : Constant-time programming, memory safety, information flow control Verification : Security verification, static/symbolic analysis tools WebAssembly and JavaScript JITs security Deian Stefan has received multiple scientific awards , including several Distinguished Paper Awards at venues like POPL, ICFP, and USENIX Security, as well as the IEEE Cybersecurity Award for Practice (2022) and CSAW 2020 First Place for Applied Research. He has taught courses on Computer Security (CSE 127, CSE 227) and advanced topics in Building Secure Systems (CSE 291) using Rust, WebAssembly, and blockchain security. His work has been supported by collaborations with industry and academia, including projects like RLBox and COWL .
Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.
Paolo Ienne is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), where he leads the Processor Architecture Laboratory (LAP) within the School of Computer and Communication Sciences. His research focuses on advancing reconfigurable computing systems through innovative FPGA architectures and high-level synthesis methodologies. His primary research domains include reconfigurable computing, FPGA architecture design, dynamically scheduled dataflow circuits, and hardware acceleration techniques. Recent work emphasizes memory system optimization for FPGAs, formal verification of circuit transformations, and rapid C-to-hardware compilation flows. He has pioneered approaches for handling thousands of outstanding memory misses in FPGA accelerators and developed novel techniques for switch-block exploration without explicit pattern enumeration. Analysis of his 2023-2025 publications reveals a strong trend toward practical FPGA deployment challenges, with increasing focus on HBM integration, virtual memory systems for PCIe-attached devices, and formally verified circuit transformations. His work consistently targets real-world bottlenecks in high-level synthesis toolchains while maintaining theoretical rigor in dataflow architecture design. Professor Ienne's laboratory receives support from the Swiss National Science Foundation and industry partners including Huawei, enabling cutting-edge research in FPGA-based acceleration. His collaborative network spans major semiconductor companies and academic institutions worldwide, with frequent co-authorship on conference proceedings and journal publications in IEEE and ACM venues.
Sanjit A. Seshia is the Cadence Founders Chair Professor in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley . He is affiliated with the Group in Logic and the Methodology of Science and participates in centers like the Industrial Cyber-Physical Systems Center , Berkeley AI Research , and the Simons Institute for the Theory of Computing . Research interests include formal methods for automated verification and synthesis of dependable systems, with applications to cyber-physical systems , AI-based autonomy , and computer security . His work spans SMT solving, model counting, syntax-guided synthesis, and algorithmic improvisation, with tools like UCLID5 , VerifAI , and Scenic for verifying autonomous systems and educational platforms like CPSGrader . Students and collaborators include notable researchers such as Dorsa Sadigh (Stanford), Daniel Fremont (UC Santa Cruz), and Hazem Torfah (Chalmers). He has co-founded startups like Decyphir and 20ⁿ Labs based on his research.
Prof. Dr. Sebastian Steinhorst is an Associate Professor (W3-level with tenure) at the Technical University of Munich (TUM) within the Embedded Systems and Internet of Things group at the TUM School of Computation, Information and Technology . His research focuses on advancing the security, predictability, reliability, and interoperability of smart connected and autonomous systems, particularly for applications in Internet of Things (IoT) , Industry 4.0 , and automotive systems . PhD in Computer Science (2011) from Goethe University Frankfurt Postdoctoral roles at TUMCREATE Singapore (2011-2016) and Aarhus University (2016) Joined TUM in 2016 as Rudolf Moessbauer Tenure Track Professor His research areas include decentralized embedded systems, hardware/software co-design, modeling and verification of cyber-physical systems, security protocols for automotive networks, and time-sensitive networking (TSN) for industrial applications. Recent work explores blockchain-based data sovereignty, zero-knowledge proofs for vehicle authentication, and resilient architectures for autonomous systems. Key scientific contributions include the 2019 ACM TODAES Best Paper Award and pioneering work on CyberSecDome , LeapChain , and Simutack frameworks. He serves on editorial boards and conference committees, including co-organizing the Autonomous Systems Design initiative at DATE. His teaching portfolio spans lectures on System Design for IoT , Software Architecture for Distributed Systems , and IoT Security across multiple semesters. He also leads advanced seminars on embedded systems and IoT.
Ardalan Amiri Sani is an Associate Professor in the Computer Science Department at the University of California, Irvine (UCI), affiliated with the Donald Bren School of Information & Computer Sciences. He leads the Trustworthy Systems Lab (TrussLab), focusing on secure and reliable mobile systems, operating systems, and virtualization. His research bridges mobile computing, security, and OS design, addressing challenges in I/O devices, kernel hardening, and verifiable provenance. Education: Ph.D. and M.Sc. from Rice University (ECE), B.Sc. from Sharif University of Technology. Awards include the NSF CAREER Award, Google ASPIRE Award, and UCI Dean's Mid-Career Research Award. He has advised numerous graduate and undergraduate students, many of whom now work in academia and industry. Research highlights include Tabellion (secure legal contracts on mobile devices), ProvCam (verifiable video provenance), and work on minimizing smartphone TCBs via hardware isolation. His grants include NSF funding for OS kernel security and NSA support for provenance systems. Education: Ph.D., Electrical and Computer Engineering, Rice University, 2014 B.Sc., Electrical Engineering, Sharif University of Technology Grants: $500K NSF Award (with UCR) for OS kernel security (2020) NSF SaTC Award for GPU security in browsers Google ASPIRE Award for Android system call filtering Labs/Teams: Trustworthy Systems Lab (TrussLab), collaborating with industry partners like Intel and Broadcom.
Vijay Laxmi is a Professor in the Department of Computer Science and Engineering at Malaviya National Institute of Technology (MNIT) Jaipur, India. With over a decade of active research publication from 2014-2024, Dr. Laxmi has established themselves as a prominent researcher in network security, Android security systems, and Network-on-Chip architectures. Their work demonstrates consistent collaboration with Manoj Singh Gaur and numerous doctoral students at MNIT Jaipur. Dr. Laxmi's research interests span Network Security, Android Security, Malware Analysis, Network-on-Chip Architectures, Routing Protocols, Side-Channel Attacks, Wireless Networks, and Mobile Security. Their work bridges theoretical security frameworks with practical implementations, particularly in mobile and embedded systems. Recent publications indicate a growing focus on AI-based security approaches including GAN applications for fuzzing and deep learning for image dehazing. The research trajectory shows increasing sophistication in security analysis techniques, evolving from basic malware detection to advanced side-channel attack analysis and sophisticated network security protocols. Recent publications demonstrate expertise in both theoretical frameworks and practical implementations with applications in real-world security challenges. Dr. Laxmi has mentored numerous graduate students including Vineeta Jain, Anugrah Jain, Sonal Yadav, Mohit Singh, and Gaurav Singal, who appear as co-authors across multiple publications. Their collaborative network extends to researchers at international institutions, indicating strong academic connections beyond their home institution.
Christina L. Garman is an Assistant Professor in the Department of Computer Science at Purdue University, where she joined in Spring 2018. Her research focuses on practical cryptography and cryptographic automation to make secure system development accessible to non-experts through error-resistant design methodologies. Her educational background includes: Bachelor of Science in Computer Science and Engineering from Bucknell University (2011) Bachelor of Arts in Mathematics from Bucknell University (2011) Master of Science in Engineering in Computer Science from Johns Hopkins University (2013) Doctor of Philosophy in Computer Science from Johns Hopkins University (2017) Professor Garman's work centers on real-world cryptographic system security, spanning protocol analysis (e.g., RC4 in TLS, Apple iMessage flaws), decentralized anonymous systems (Zerocash/ZCash), and cryptographic automation. She pioneered techniques for removing human error in cryptographic deployments through automated tools and frameworks. Her research bridges theoretical cryptography with practical implementation challenges in privacy-preserving technologies and secure infrastructure. Analysis of her 2021-2025 publications reveals expanding research horizons: hardware security vulnerabilities (Rowhammer, SGX), privacy network enhancements (Tor onion services), software supply chain security (SBOM tools), and advanced cryptographic protocols (zkSNARKs, MPC). This evolution demonstrates consistent focus on real-world security impact while diversifying into hardware-software cross-layer threats and formal verification methods for cryptographic implementations. Her major scientific recognitions include: NSF CAREER Award (2021) for cryptographic automation research ACM CCS Best Paper Award (2016) for iMessage security analysis IEEE Test of Time Award (2024) for foundational Zerocash work Professor Garman co-founded ZCash, a privacy-focused cryptocurrency based on her Zerocash protocol, and her NSF CAREER grant supports cryptographic automation development. Her research has received significant media coverage in The Washington Post, Wired, and The New York Times, highlighting real-world relevance. While specific student advising details aren't public, her active publication record indicates ongoing mentorship of graduate researchers in security and cryptography. Her work maintains strong industry connections through ZCash development and Tor network contributions, with recent projects like keyless CDNs demonstrating practical applications of cryptographic automation. She remains a leading voice in cryptographic research communities through conference participation and collaborative projects addressing evolving security challenges.
Vijay Kumar is the Nemirovsky Family Dean of Penn Engineering at the University of Pennsylvania, with faculty appointments in the Departments of Mechanical Engineering, Computer and Information Science, and Electrical and Systems Engineering. He is a leading figure in robotics and computer architecture research. Research Interests include robotics, particularly multi-robot systems and micro aerial vehicles (MAVs), as well as computer architecture innovations for machine learning, GPU acceleration, and datacenter efficiency. His work spans theoretical foundations and practical applications in autonomous systems and hardware optimization. Scientific Awards include: 1991 NSF Presidential Young Investigator Award 1996 Lindback Award for Distinguished Teaching 2012 ASME Mechanisms and Robotics Award 2014 Engelberger Robotics Award 2017 IEEE George Saridis Leadership Award Multiple best paper awards at DARS, ICRA, and RSS conferences Editorial Leadership includes serving as Editor of the ASME Journal of Mechanisms and Robotics and Advisory Board Member of AAAS Science Robotics Journal . His GRASP Lab team developed foundational frameworks for micro UAV testbeds and swarm robotics.
Justine Sherry is the A. Nico Habermann Associate Professor of Computer Science at Carnegie Mellon University, affiliated with the College of Engineering. She holds a PhD (2016) and MS (2012) from UC Berkeley and a BS/BA (2010) from the University of Washington. Her research focuses on networked systems, including middleboxes, cloud computing, congestion control, and hardware acceleration (e.g., SmartNICs/FPGAs). Notable projects include Pigasus (open-source 100Gbps IDS), APLOMB (cloud-based middlebox scaling), and BlindBox (encrypted traffic scanning). Her academic roles include serving on the SIGCOMM CARES Committee, DARPA ISAT Study Group, and ACM CoNEXT Steering Committee. Awards include the Alfred P. Sloan Fellowship, VMware Systems Award, and IETF Applied Networking Prize. She advises over 15 students and collaborates with industry partners like Intel and VMware. Research highlights include radical shifts in datacenter architectures (SmartNIC compute control), fairness in congestion algorithms (BBR analysis), and database-proxy innovations (Tigger with eBPF). Her teaching emphasizes systems as science labs, integrating experimental design and hypothesis testing into projects. Education: PhD UC Berkeley (2016), MS UC Berkeley (2012), BS/BA University of Washington (2010) Labs/Teams: CyLab, SNAP Research Group, CMU Portugal Collaboration Grants: NSF, Intel, Google Faculty Awards
Professor Peter Y. K. Cheung is a Professor of Digital Systems at Imperial College London, holding dual affiliations within the Department of Electrical and Electronic Engineering and the Dyson School of Design Engineering. His work focuses on reconfigurable systems, FPGA architectures, and high-level synthesis tools. He co-founded one of the UK's leading FPGA research groups with Professor Wayne Luk, addressing challenges in variability mitigation, reliability, and application-specific FPGA deployments. His research spans Field-Programmable Gate Arrays (FPGAs) Reconfigurable computing Neural network acceleration Cryptographic protocols Embedded systems He has pioneered techniques such as logic shrinkage for FPGA-based neural networks and developed frameworks like LUTNet for efficient inference. His contributions also include fault-tolerant FPGA designs and methodologies for distributed computation protocols. Key collaborations include work with the Department of Computing on FPGA-based AI acceleration and cybersecurity applications. His recent work explores edge computing, secure decentralized systems, and pandemic modeling using adaptive control strategies. Notable projects include the DSCS protocol for secure distributed computation, acceleration of gravitational wave detection algorithms, and energy-efficient CNN implementations. His research bridges hardware-software co-design with real-world applications in healthcare, finance, and aerospace.
David Lie is a Professor at the University of Toronto, jointly appointed in the Edward S. Rogers Department of Electrical and Computer Engineering, Department of Computer Science, and Faculty of Law. He directs the Schwartz Reisman Institute for Technology and Society, co-founded the IT3 Lab, and serves as Associate Director at the Data Sciences Institute. His research focuses on securing computer systems through operating systems, architecture, and formal verification approaches. B.A.Sc (University of Toronto, 1998) M.S. (Stanford, 2001) Ph.D. (Stanford, 2004) His research emphasizes building secure systems for mobile platforms and cloud computing, with significant contributions to trusted execution environments (XOM architecture precursor to Intel SGX/ARM TrustZone) and Android permission mapping (PScout tool). Recent work spans cryptographic side-channels, web tracking detection, and AI safety. Key honors include SOSP 2003 Best Paper, Ontario MRI Early Researcher Award (2008), Connaught Global Challenge Award (2017), and Canada Research Chairs (Tier 2 2013-2018, Tier 1 current). He has secured over $30M in research funding and served as General Chair for CCS 2018. Lie leads the IT3 Lab (Technology and Policy Integration), collaborates with industry leaders (Google, VMware, Telus), and mentors graduate students working on practical security implementations. He co-teaches ECE1724: Privacy Problems with Lisa Austin from the Faculty of Law, reflecting his technology-policy interests.
Mithuna S. Thottethodi is a Professor and Interim Associate Head of Teaching and Learning at the Elmore Family School of Electrical and Computer Engineering at Purdue University. He holds a B.Tech. from the Indian Institute of Technology, Kharagpur (1996), and a Ph.D. in Computer Science from Duke University (2002). His research focuses on computer architecture, interconnection networks, distributed systems, and security, with notable work on sparse tensor accelerators and processing-near-memory architectures. His work has been funded by the NSF, AT&T, and SK Hynix. Research interests include security, interconnection networks in multicores, storage performance optimization, and memory hierarchies. Notable contributions span hardware accelerators for machine learning, secure speculative execution, and datacenter network congestion control. He has advised over 20 graduate students, many of whom have joined top tech firms like Google, Microsoft, and Intel. Awards: NSF CAREER Award (2007) Wilfred Hesselberth Teaching Excellence Award (2021) Multiple Eta Kappa Nu Outstanding Professor Awards Teaching includes undergraduate courses like EE 437 (Computer Design) and graduate courses such as ECE 666 (Advanced Computer Architecture). He also advises VIP and EPICS student teams.
Callie Hao is an Assistant Professor in the Department of Electrical and Computer Engineering at the Georgia Institute of Technology since 2021, holding the ON Semiconductor Junior Professorship. Her research bridges hardware efficiency and algorithmic innovation with significant industry and federal recognition. Education: Ph.D. in Electrical Engineering, Waseda University (2017) M.S. and B.S. in Computer Science and Engineering, Shanghai Jiao Tong University Research Focus: Dr. Hao pioneers software/hardware co-design for edge AI, specializing in hardware-efficient machine learning algorithms, FPGA-based reconfigurable computing, graph neural networks, and electronic design automation (EDA). Her work emphasizes neural architecture search, high-level synthesis optimization, and memory-efficient systems for embedded and IoT applications, driven by the philosophy that "1 + 1 > 2" for transformative efficiency gains. Publication Impact: Her 15 most recent publications (2023-2026) reveal a strategic shift toward machine learning-driven EDA tools, with 60% focused on high-level synthesis frameworks and 40% on graph neural network acceleration. Key trends include simulation speed breakthroughs (LightningSim), automated accelerator generation (GNNBuilder), and cryptographic hardware innovations (Cryptonite), predominantly published in top-tier venues like MICRO, ICCAD, and DAC. Awards & Recognition: NSF CAREER Award (2024) and Intel Rising Star Faculty Award (2023) Best Paper Awards at MLCAD 2024 and GLSVLSI 2021 ON Semiconductor Junior Professorship (2025) and Sutterfield Family Early Career Professorship (2022) DAC-SDC competition championships (2018-2020) Mentorship & Funding: Dr. Hao advises 8+ Ph.D. students in the Sharc Lab, with Rishov Sarkar winning the Oscar P. Cleaver Award and Qualcomm Innovation Fellowship. Her research is funded by DARPA (2021) for ultra-light video intelligence systems and supported by industry awards from Amazon and Sony. She actively serves on program committees for DAC, ICCAD, and DATE conferences. Lab Leadership: As director of the Sharc Lab (Software/Hardware Co-design lab), she cultivates interdisciplinary research at the intersection of FPGA design, machine learning, and EDA, requiring expertise in Verilog/HLS, GNNs, and compiler technologies while maintaining strict focus on real-world hardware implementation.
