Christof Paar is a Professor of Embedded Security at Ruhr University Bochum's Faculty of Computer Science. His work focuses on hardware security, cryptography, and embedded systems security. He leads the Embedded Security Group within the CASE Cluster of Excellence (Cyber Security in the Age of Large-Scale Attacks), addressing cutting-edge challenges in hardware Trojans, side-channel attacks, and cryptographic engineering. His research spans FPGA and IoT security, with contributions to physical-layer security, wireless jamming defenses, and tamper-resistant systems. Research Interests: Paar's expertise lies in hardware-software co-design for security, with a focus on embedded systems. His work includes analyzing vulnerabilities in FPGAs, developing countermeasures against side-channel attacks, and exploring physical-layer security mechanisms. He also investigates the human factors in hardware reverse engineering and the implications of adversarial machine learning on security systems. Notable Work: Recent publications highlight breakthroughs in detecting hardware Trojans across CMOS generations, breaking industry-standard IP protection mechanisms (IEEE 1735), and proposing novel defenses like IRShield against adversarial wireless sensing. His group actively contributes to standards for secure embedded systems and IoT devices, emphasizing practical implementations.
Professor Dinusha Mendis is a leading academic in Intellectual Property and Innovation Law at Bournemouth University, where she serves as Director of the Centre for Intellectual Property Policy and Management (CIPPM). Her expertise bridges copyright law with emerging technologies like 3D printing, AI, blockchain, and the Metaverse, informed by extensive research and consultation with entities such as the European Parliament, UKIPO, and corporations like HP and Chanel. She holds a PhD from Edinburgh University and has authored seminal works on the intersection of technology and IP. BSc in Law from Aberdeen University LLM and PhD from Edinburgh University Called to the Bar of England and Wales Her research focuses on copyright challenges in immersive environments , AI-generated content regulation , and blockchain/NFTs . She led major studies for the European Commission and UKIPO , including the first peer-reviewed work on 3D printing and IP. Her 2019 co-edited book with Stanford and QUT scholars established foundational frameworks for additive manufacturing legal analysis. Recent publications highlight AI copyright disputes (2024 The Conversation ), NFT legal ambiguities (2022), and pandemic-era 3D printing (2020). Trends show increasing emphasis on decentralized IP systems and machine learning's impact on creative industries . Scientific Awards & Grants JSPS Visiting Professorship (2023) Daiwa Anglo-Japanese Foundation Grant (2024) EU Commission Research Funding (2020) AHRC Grant for 3D Jewellery Study (2017) As a PhD supervisor, she mentors researchers on AI copyright (Benjamin White), crypto-art (Bahar Dagli), and music creation law (Elizabeth Bailey). She contributes to global IP policy through the World Economic Forum's Metaverse Governance Team and EU IPR Enforcement Projects .
Timo Minssen is Professor of Law at the University of Copenhagen (UCPH) and the Founding Director of UCPH's Center for Advanced Studies in Bioscience Innovation Law (CeBIL). He also holds affiliations as an LML Research Affiliate at the University of Cambridge and an Inter-CeBIL Research Affiliate at Harvard Law School's Petrie-Flom Centre. With extensive expertise in Intellectual Property, Competition, and Regulatory Law, Minssen focuses on the legal aspects of emerging health and life science technologies, including genome editing, big data, artificial intelligence, and quantum technology. His educational background includes a German law degree (Staatsexamen) from Georg-August-University in Göttingen, and Swedish biotech & IPR related LL.M., LL.Lic., and LL.D. degrees from Lund University and Uppsala University. His PhD thesis on the patentability of biopharmaceutical technology in the US & Europe received the prestigious Swedish King Oscar award. 2024: TUM Global Visiting Professor, Technical University of Munich (Germany) 2016: Visiting Research Fellow, University of Cambridge (UK) 2014: Visiting Research Fellow, University of Oxford (UK) 2013-14: Visiting Scholar, Harvard Law School (US) 2012: LL.D. - Doctor of Laws (Swedish "juris doktor"), EU/US patent law, Lund University, Sweden Minssen's research spans AI & Big Data in Health & Life Sciences, Sustainable and responsible innovation & tech transfer, Pharmaceutical-, Life Science- & Biotech Law, Comparative European & US Patent Law, Intellectual Property Law & Open Innovation, and EU Competition- & US Antitrust Law. His work addresses legal issues throughout the lifecycle of health and life science products and processes, from R&D regulation to technology transfer and commercialization. His extensive publication record includes 7 books and over 200 articles and book chapters published in leading journals such as Science, Nature Biotechnology, JAMA, and Harvard Business Review. His research has been featured in The Economist, Financial Times, and other major media outlets. Minssen's recent work shows a strong focus on AI regulation, quantum technology law, and data governance in health contexts, reflecting the evolving landscape of technology and law. Scientific Awards and Recognition King Oscar award for best Jur. Dr. thesis (2014) Jorcks Fonds Forsknings Pris (Jorck's Foundation Research Prize) (2017) Awapatent Research Prize (2009) Max Planck Research Scholarship (2005) Visiting Scholar appointments at Harvard Law School, University of Oxford, and University of Cambridge Recipient of a Novo Nordisk Foundation Grant for a "Collaborative Research Program in Biomedical Innovation Law" (2018) As an advisor, Minssen serves international organizations including the WHO, WIPO, and EU Commission. He has supervised numerous PhD students in areas including pharmaceutical law, biotechnology patents, and antimicrobial resistance. His current research projects include the Novo Nordisk Foundation's International Collaborative Bioscience Innovation & Law (Inter-CeBIL) Programme (50 million DKK), CLASSICA: EU Horizon Project on AI-assisted surgery, and AI@Care: Law and Ethics and Algorithmic Bias in Healthcare. Minssen leads the Center for Advanced Studies in Bioscience Innovation Law (CeBIL), which serves as a hub for interdisciplinary research on the intersection of law, technology, and innovation in the health and life sciences. The center collaborates with institutions worldwide to address pressing legal challenges in emerging technologies.
Dr. Krishnendu Guha is an Assistant Professor and CONNECT Funded Investigator at the School of Computer Science and Information Technology, University College Cork. His research bridges embedded systems, cybersecurity, and quantum-safe hardware design with AI and bio-inspired strategies. PhD: University of Calcutta (Department of Science and Technology, Government of India) Postdoctoral: University of Florida Past Roles: Research Fellow at Intel India, Visiting Scientist at Indian Statistical Institute, Temporary Assistant Professor at NIT Jamshedpur His research focuses on embedded systems security , real-time security mechanisms , and quantum-safe hardware . He integrates AI (e.g., neural networks) and bio-inspired strategies (e.g., gecko crypsis behavior) into security frameworks for FPGAs and edge platforms. Recent publications highlight trends in blockchain for supply chains , quantum machine learning , secure FPGA architectures , and distributed AI systems . His work addresses energy efficiency, fault detection, and decentralized security in hardware. As a CONNECT Centre member, Dr. Guha contributes to advanced research in reconfigurable systems and cybersecurity. Grants and collaborations span quantum-safe design, cloud FPGA security, and hardware trojan mitigation.
Wenjing Rao is an Associate Professor at the Department of Electrical and Computer Engineering, College of Engineering, University of Illinois at Chicago (UIC). Her research focuses on VLSI test, fault-tolerance, reliability, and hardware security in emerging nanoelectronic systems. Education: Ph.D. in Computer Science from University of California, San Diego (2008) B.S. in Computer Science from Peking University (2001) Her work explores novel computation paradigms through physical unclonable functions (PUFs), defect-tolerant logic implementation, and scalable fault tolerance in many-processor arrays. Publications emphasize hardware security, reconfiguration strategies, and reliability challenges in nanoscale architectures. Notable honors include the 2017 Harold A. Simon Award for Excellence in Teaching and the 2012 NSF CAREER Award. She has contributed to key journals like IEEE Transactions on Computer-Aided Design and conferences including DATE, ASPDAC, and NANOARCH.
Andrea Fumagalli is a Professor in the Department of Electrical Engineering at the Erik Jonsson School of Engineering and Computer Science , The University of Texas at Dallas. He earned his Ph.D. (1992) and Laurea (1987) in Electrical Engineering from Politecnico di Torino, Italy. Research Interests: All-Optical Network Architectures, Photonic Slot Routing, Wavelength Routing and Protection, Sensor Networks, Cooperative Wireless Networks, Network Optimization, Next Generation Internet (NGI), and Multi-hop Optical Networks. Education: Ph.D., Electrical Engineering, Politecnico di Torino (1992) Laurea, Electrical Engineering, Politecnico di Torino (1987) Key Research Trends: His recent publications focus on 5G networking, optical network automation, elastic optical networks, network reliability, and cross-layer optimization. He explores FPGA acceleration in 5G Low-PHY functions, live migration of containerized network components, and spectral fragmentation mitigation in EONs. Scientific Awards: Best Teaching Award, Electrical Engineering, UTD (2002) Best Thesis Award for Ph.D. Advisee Isabella Cerutti (2002) IEEE ComSoc Distinguished Lecturer Tour (2000) Best Paper Award (1999): 'An Optimal Design Algorithm for Photonic Slot Routing Networks Migrating to Optical Packet Switching' Advising and Grants: He advised Ph.D. student Isabella Cerutti. In 2001, he secured a $300,000 grant from FUNDACAO CPqD for optical network reliability research. He leads the Optical Networking Advanced Research (OpNeAR) Lab at UTD, collaborating on international projects like the Italian government-funded grid computing initiative (2002) and the OMEGA Test-bed for differentiated reliability. Laboratories and Teams: He directs the OpNeAR Lab , which develops tools for optical network emulation and reliability testing. His projects involve partnerships with institutions in Brazil (Unicamp), Sweden (KTH), Italy (Politecnico di Torino, Scuola Superiore Sant'Anna), and CNR/CNIT.
Kimia Zamiri Azar serves as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Central Florida, focusing on hardware security and verification methodologies. Her research bridges theoretical formal methods with practical security implementations in semiconductor design and testing. Her educational background includes: Ph.D. in Electrical and Computer Engineering, George Mason University (2021) Postdoctoral Research, University of Florida Dr. Azar's research spans hardware security with emphasis on system-level verification, VLSI design-for-trust, and advanced IC testing. She pioneers techniques in logic locking, secure heterogeneous integration, and IC supply chain security, developing frameworks for authenticated encryption in Systems-in-Package and runtime security monitoring. Her work integrates formal verification with innovative testing methodologies to address hardware trust challenges across the semiconductor lifecycle. Analysis of her recent publications reveals two dominant trends: (1) Application of large language models (LLMs) to hardware design tasks including high-level synthesis code generation and RTL optimization, and (2) Advancement of secure heterogeneous integration techniques for System-in-Package architectures with focus on counterfeit prevention and split-test security protocols. These directions address critical gaps in hardware trustworthiness amid increasingly complex semiconductor supply chains. Her scientific contributions have earned significant recognition: Best Paper Award at ICCAD 2019 Best Paper Award at ISVLSI 2020 Best Paper Award at ICCAD 2020 Best Paper Award at IEEE DCAS 2020 Best Paper Award at HOST 2022 Best Paper Award at DATE 2023 Dr. Azar secures substantial research funding from premier agencies including NSF, SRC, DARPA, AFRL, DoD (NG), and Microsemi. Her grants support projects spanning hardware security validation frameworks, secure heterogeneous integration, and AI-augmented verification methodologies. She actively mentors students in her research group, guiding publications in top venues like IEEE D&T, IEEE TC, and DAC while fostering industry-academic collaborations. Her work directly impacts semiconductor security standards through patented innovations and open-source verification tools. As an active IEEE and ACM member, she contributes to community advancement through conference organization (HOST, DATE), journal editorial roles, and workshop leadership on hardware security standards. Her research group collaborates with semiconductor industry leaders to translate theoretical security frameworks into practical design-for-trust methodologies for next-generation integrated circuits.
Md Sakib Hasan is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Mississippi. He holds a Ph.D. in Electrical Engineering from the University of Tennessee-Knoxville (2017). His research focuses on hardware acceleration, neuromorphic computing, and memristor-based systems. Research interests span: AI hardware accelerators and energy-efficient computing Biomimetic systems and bio-inspired electronics Hardware security through chaotic systems and PUFs Recent publications demonstrate strong emphasis on: Neuromorphic architectures for computer vision and temporal processing Biomembrane-based computing systems Chaotic cryptography and secure hardware design
Jeyavijayan 'JV' Rajendran is an Associate Professor in the Department of Electrical and Computer Engineering at Texas A&M University, part of the College of Engineering. He is an ASCEND Fellow and leads the Secure and Trustworthy Hardware (SETH) Lab. His research focuses on hardware security, computer security, and novel applications of AI in secure hardware design. Education: PhD in Electrical Engineering (NYU 2015), MS in Computer Engineering (NYU Tandon 2010), BE in Electronics and Communication Engineering (Anna University 2008). Research Interests: Hardware Security, Computer Security, Logic Locking, Hardware IP Protection, and Reinforcement Learning for Security. He explores AI-driven approaches to detect vulnerabilities, protect intellectual property, and enhance secure hardware design through fuzzing, obfuscation, and formal verification. Notable Awards: 2022 Office of Naval Research Young Investigator Award, 2021 IEEE CEDA Ernest Kuh Early Career Award, 2017 NSF CAREER Award. Lab and Teams: The SETH Lab focuses on trustworthy hardware design, developing techniques to secure integrated circuits against reverse engineering and IP theft. Current projects include LLM-based hardware code generation, formal approaches for hardware fuzzing, and AI-driven vulnerability detection.
Farinaz Koushanfar is a Professor in the Department of Electrical and Computer Engineering at the Jacobs School of Engineering, University of California San Diego (UCSD) . She holds the Siavouche Nemat-Nasser Endowed Chair and serves as Founding Co-Director of the Center for Machine-Intelligence, Computing and Security . Her affiliations include NSF Trust-Hub (Co-PI) and NSF TILOS AI Institute . She also serves on the Editorial Board of The Proceedings of the IEEE . Research Focus: Prof. Koushanfar leads research in secure and efficient computing , including robust/safe AI , hardware/system security , AI-based optimization , and cryptographically secure privacy-preserving computing . Her work pioneered logic obfuscation/locking for chip security, automated co-design of AI systems , watermarking/tracing of deep learning models , and physical proofs of provenance . She explores co-design with cryptographic constructs for privacy preservation and manages nonlinearities in ciphertext domains. Article Trends: Recent publications show expertise in neural watermarking (deepfakes, media authentication), zero-knowledge proof frameworks , Trojan attack defenses in ML models, secure federated learning , and hardware acceleration of cryptographic protocols . Her work combines machine learning , cryptography , and physical design security across 2022-2025 publications. Scientific Awards: Fellow of ACM Fellow of IEEE Fellow of National Academy of Inventors (NAI) Fellow of Kavli Foundation of NAS Inducted to NAI 2024 Fellows Advising & Leadership: She has advised multiple PhD students who became faculty at top universities (e.g., Stanford, Purdue). She chairs conferences like ACM WiSec 2024 and co-led the NSF SaTC decadal review. Her lab ( ACES Lab ) produces award-winning graduates like Bita Rouhani (DAC Under-40 Innovators) and Shehzeen Hussain (UCSD Best Dissertation Award).
Dr. Ying He is a Senior Lecturer at the School of Electrical and Data Engineering, University of Technology Sydney (UTS). Her research focuses on wireless communication networks, particularly integrating machine learning with satellite and terrestrial systems. She holds a BEng from Beijing University of Posts and Telecommunications (2009) and a PhD from UTS (2017). Prior to her academic role, she worked on TD-LTE chip design at the Chinese Academy of Sciences. Affiliations : Faculty of Engineering and Information Technology Global Big Data Technologies Centre (GBDTC) Education : BEng in Telecommunications Engineering, Beijing University of Posts and Telecommunications (2009) PhD in Engineering (Telecommunications), UTS (2017) Her research interests include satellite communication (GEO-LEO integration), spectrum sharing, vehicular communication, and applying machine learning to physical layer algorithms. Notable contributions include optimizing beam design in LEO networks and developing secure IoT systems. She supervises PhD/Master’s students and teaches courses like CCNA and capstone projects. Funded projects span satellite networks, IoT security, and supply chain tracking. Recent grants include SmartSat CRC initiatives and collaborations with industry partners like Intel and Ericsson. Her work addresses challenges in 6G, UAV-enabled computing, and resilient quantum algorithms.
Siddharth Garg is the Institute Associate Professor of Electrical and Computer Engineering at NYU Tandon School of Engineering, leading the EnSuRe Research Group. He holds a Ph.D. from Carnegie Mellon University (2009) and a B.Tech. from IIT Madras. His research focuses on secure and energy-efficient computing systems, integrating machine learning, cybersecurity, and hardware design. He previously held roles as Assistant Professor at NYU Tandon (2014-2020) and the University of Waterloo (2010-2014). Key affiliations include NYU Center for Cybersecurity (CCS), NYU Wireless, and the Center for Advanced Technology in Telecommunications. His work has been recognized with prestigious awards like the NSF CAREER Award (2015) and inclusion in Popular Science’s 'Brilliant 10' (2016). Notable research includes private inference optimization, secure hardware IP protection, and adversarial machine learning defenses. Publications highlight advancements in zero-knowledge proofs, AI-driven chip design, and mitigating backdoor attacks in neural networks. His grants include funding from NYU Wireless and NSF initiatives like the Chips4All project. The EnSuRe group emphasizes bridging software and hardware design gaps using AI and fostering cybersecurity education.
Mohammed Y Niamat is a full-time Professor in the Department of Electrical Engineering and Computer Science at the University of Toledo's College of Engineering . His research focuses on hardware security, FPGA vulnerabilities, and blockchain applications in cybersecurity. Research Interests : Physical Unclonable Functions (PUFs), FPGA Security, Blockchain-based Security Frameworks, IoT Security, Smart Grid Authentication, Machine Learning Vulnerability Analysis Publications : Over 85 publications from 1986-2024, with recent works on integrations of blockchain and PUFs for secure supply chains, neural network modeling attacks on PUFs, and hardware Trojan detection techniques. Collaborations : Co-authored with Junghwan Kim (4), Weiqing Sun (2), Richard Molyet (1). Recent Article Trends : 2024 works on zero-trust architecture for FPGA supply chains using blockchain and ROPUFs; 2023 studies on IoT device authentication, hardware Trojan detection, and NFT-based IP protection; 2021-2019 research on machine learning attacks against PUFs, lightweight cryptographic designs for IoT, and BER optimization in wireless systems.
Maria Mushtaq is an Associate Professor at Telecom Paris , affiliated with the Information Processing and Communication Laboratory (LTCI) and the Secure and Safe Hardware (SSH) Lab . She received her PhD in Information Security from the University of South Brittany, France (2019) and completed 2 years of postdoctoral research at LIRMM, University of Montpellier under the CNRS excellence post-doc grant. Research Focus: Microarchitectural vulnerability assessment, runtime mitigation against side/covert-channel attacks, cryptanalysis, OS-based security primitives, and hardware-software interface security Technical Expertise: Cache timing attacks, transient execution attacks (Spectre/Meltdown), Hardware Performance Counter analysis, gem5 simulation Her recent work involves RISC-V security analysis using gem5 simulations and machine learning for attack detection. She serves as Guest Editor for the Journal of Applied Sciences special issue on Side Channel Attacks in Embedded Systems and has been on the Program Committee for the European Test Symposium (2020-2021). 2021 HiPEAC Collaboration Grant recipient Organized IP Paris Winter School on Microarchitectural Security (2022) Active in international conferences as panelist and keynote speaker
Mateo Valero Cortés is a renowned Professor of Computer Architecture at the Polytechnic University of Catalonia and Director of the Barcelona Supercomputing Center (BSC). He has held academic and leadership roles since 1974, advancing high-performance computing (HPC) and computer architecture research. His work includes pioneering contributions to vector architectures, multithreading, and instruction-level parallelism. Education includes a Telecommunications Engineering degree from the Polytechnic University of Madrid (1974) and a PhD in Telecommunications Engineering from the Polytechnic University of Catalonia (1980). His research spans over 700 publications, focusing on HPC systems, parallel computing, and supercomputing infrastructure. Key research interests include vector processing, super-scalar processors, and task-based programming models. Recent work emphasizes scalable architectures for exascale computing and energy-efficient hardware-software co-design. Notable achievements include the Eckert-Mauchly Prize (highest in computer architecture), Seymour Cray Award, and Charles Babbage Prize. He has led initiatives like the Spanish Supercomputing Network (RES) and PRACE (European HPC partnership). Academic affiliations include the Royal Academy of Engineering of Spain, ACM Fellow, and IEEE Fellow. He has received 13 honorary doctorates and awards such as Mexico’s Order of the Aztec Eagle. Current projects include the Mont-Blanc HPC prototype and ERC-funded research on multi-core chip design. His BSC oversees over 300 researchers and manages MareNostrum supercomputers.
