جست‌وجوی استاد و پژوهشگر

Antonio Gonzálezمشاهده پروفایل

استاد

• Computer Architecture
• Microarchitecture
• Compilers
• +۷ مورد دیگر

Antonio González is a full Professor at the Barcelona School of Informatics (FIB), Universitat Politècnica de Catalunya (UPC), where he is affiliated with the Department of Computer Architecture. He leads the Microarchitecture and Compilers (ARCO) research group, focusing on robust and energy-efficient computing systems, including general-purpose processors, GPUs, and cognitive computing architectures. His research spans computer architecture, microarchitecture, compilers, GPU design, and deep learning acceleration, with a strong emphasis on energy efficiency and memory optimization. His work integrates hardware and compiler techniques to enhance performance in modern computing systems. The recent publications highlight a strong trend in energy-efficient DNN acceleration, GPU microarchitecture, memory systems, and near-data processing. His team explores novel quantization methods, adaptive caching, and architectural extensions for vision and AI workloads, published in top-tier venues such as MICRO, ISCA, and IEEE/ACM journals. ACM Fellow (2020) ICREA Academia Award (2014, 2019, 2024) UPC Duran Farell Award (2008) HiPEAC 2024 Paper Award (twice) González has supervised several PhD students and leads competitive R&D+i projects, including those funded by ICREA and the European Research Council. His research group collaborates extensively within UPC and with international institutions. He is actively involved in advancing computer architecture through innovation in simulation, hardware design, and AI acceleration. He is a member of IEEE and ACM, and his work continues to influence both academic and industrial developments in high-performance and energy-efficient computing.

Anna Choromanskaمشاهده پروفایل

دانشیار

• Machine Learning
• Deep Learning
• Optimization
• +۶ مورد دیگر

Anna Choromanska is an Associate Professor in the Department of Electrical and Computer Engineering at NYU Tandon School of Engineering, with affiliations to NYU Center for Data Science (CDS), NYU Center for Urban Science and Progress (CUSP), NYU Center for Advanced Technology in Communications (CATT), and the C2SMART Center. Her research focuses on deep learning optimization, generalization, and applications in autonomous driving and large-scale data analysis. She holds an Alfred P. Sloan Fellowship and NSF CAREER Award, and her work impacts industries like NVIDIA and Facebook. She directs the Learning Systems Laboratory (LSL), emphasizing interdisciplinary experimental/theoretical work. Research Interests: Machine Learning fundamentals, DL optimization, continual learning, autonomous vehicle systems, large data analysis. Her lab explores DNN learning dynamics, training architecture design, and scalable algorithms. Professional Impact: Over 50 invited talks, workshop organization for top ML conferences, and contributions to open-source projects like Vowpal Wabbit. Her algorithms are deployed in production systems at Facebook and Baidu. Awards: NSF CAREER Award Alfred P. Sloan Fellowship IBM Global University Program Academic Award (2x) Columbia University Presidential Fellowship Advising & Labs: Leads LSL, supervising interdisciplinary projects in optimization and autonomy. Actively involved in NYU's Modern AI seminar series and industry partnerships through CATT. Personal Interests: Accomplished pianist, salsa dancer, and fashion design enthusiast with notable performances and certifications in dance and music.

Tulika Mitraمشاهده پروفایل

استاد

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +۷ مورد دیگر

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

• Computer Architecture
• Machine Learning
• Approximate Computing
• +۳ مورد دیگر

Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture

• Computer Hardware
• FPGA Acceleration
• Artificial Intelligence
• +۸ مورد دیگر

Professor Wayne Luk is a Professor of Computer Engineering at the Department of Computing, Faculty of Engineering, Imperial College London. He leads the Programming Languages and Systems Section and the Custom Computing Research Group, and directs the EPSRC Centre for Doctoral Training in High-performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. He previously served as a Visiting Professor at Stanford University from 2006 to 2009. His research spans FPGA acceleration, quantum computing, deep learning optimization, and algorithm-hardware co-design, with affiliations to the CRUK Convergence Science Centre and the Engineering Secure Software Systems group. His research interests include computational modeling for particle physics, causal discovery in agent-based systems, and high-throughput digital electronics. Notable contributions include FPGA-accelerated algorithms for neural networks, quantum circuit simulation, and Bayesian optimization frameworks. His work emphasizes practical applications of reconfigurable hardware in fields like medical imaging, high-energy physics, and financial systems. Professor Luk is a Fellow of the Royal Academy of Engineering, IEEE, and BCS. His publications focus on advancing hardware-aware machine learning, FPGA-based acceleration techniques, and scalable design methodologies. His research bridges theoretical computer science with applied engineering, addressing challenges in real-time systems, embedded computing, and next-generation computing architectures. His academic leadership includes directing interdisciplinary centers and training programs, fostering collaboration across computing, engineering, and physics. Current projects explore quantum computing tools, causal inference systems, and high-performance graph neural networks for particle physics applications.

Brandon Luciaمشاهده پروفایل

استاد

• computer architecture
• computer systems
• programming languages
• +۸ مورد دیگر

Brandon Lucia is a Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University's College of Engineering. He holds the Kavčić-Moura Professorship and leads the Abstract research group. As CEO and co-founder of Efficient Computer Corp., he bridges academic research with commercial applications in energy-efficient computing. Dr. Lucia received his Ph.D. in Computer Science and Engineering from the University of Washington in 2013, following an MS from the same institution in 2010 and a BS in Computer Science from Tufts University in 2007. His research focuses on the intersection of computer architecture, computer systems, and programming languages, particularly in energy-constrained environments. His primary research interests include intermittent computing, energy harvesting computers, orbital edge computing, and parallel computing systems. Lucia's work addresses fundamental challenges in creating programmable, reliable computing devices that operate without batteries by harvesting energy from their environments, with applications in sensing, medical implants, and space systems. He also investigates software systems and architectures for making parallel computing correct, reliable, and efficient in the post-Moore's Law era. Lucia's publication record shows a clear trajectory toward orbital edge computing and nanosatellite systems, with recent work focusing on computational constellations, visual navigation for satellites, and energy-efficient processing in space. His research spans both theoretical foundations of intermittent computing and practical implementations in hardware and software. 2021 Sloan Research Fellowship 2018 NSF CAREER Award 2018 ASPLOS Best Paper Award IEEE MICRO Top Picks in Computer Architecture (2009, 2010, 2016) 2015 OOPSLA Best Paper Award 2019 IEEE TCCA Young Computer Architect Award 2022 Engineering Faculty Award As an advisor, Lucia has mentored numerous graduate students including Brad Denby, Zhuo Cheng, and Kyle McCleary, many of whom have become co-authors on his significant publications. His lab developed the world's first batteryless PocketQube nanosatellite (Tartan-Artibeus-1), which was deployed to low-Earth orbit aboard the SpaceX Transporter-3 Rocket. Lucia's research has received funding from sources including NSF, DARPA, Google, and VMware, supporting both fundamental research and practical implementations of energy-harvesting computing systems.

Justine Sherryمشاهده پروفایل

استادیار

• Computer Networking
• Networked Systems
• Middleboxes
• +۵ مورد دیگر

Justine Sherry is the A. Nico Habermann Associate Professor of Computer Science at Carnegie Mellon University, affiliated with the College of Engineering. She holds a PhD (2016) and MS (2012) from UC Berkeley and a BS/BA (2010) from the University of Washington. Her research focuses on networked systems, including middleboxes, cloud computing, congestion control, and hardware acceleration (e.g., SmartNICs/FPGAs). Notable projects include Pigasus (open-source 100Gbps IDS), APLOMB (cloud-based middlebox scaling), and BlindBox (encrypted traffic scanning). Her academic roles include serving on the SIGCOMM CARES Committee, DARPA ISAT Study Group, and ACM CoNEXT Steering Committee. Awards include the Alfred P. Sloan Fellowship, VMware Systems Award, and IETF Applied Networking Prize. She advises over 15 students and collaborates with industry partners like Intel and VMware. Research highlights include radical shifts in datacenter architectures (SmartNIC compute control), fairness in congestion algorithms (BBR analysis), and database-proxy innovations (Tigger with eBPF). Her teaching emphasizes systems as science labs, integrating experimental design and hypothesis testing into projects. Education: PhD UC Berkeley (2016), MS UC Berkeley (2012), BS/BA University of Washington (2010) Labs/Teams: CyLab, SNAP Research Group, CMU Portugal Collaboration Grants: NSF, Intel, Google Faculty Awards

Ozcan Ozturkمشاهده پروفایل

استاد

• Heterogeneous Computing
• Hardware Accelerators
• GPU Computing
• +۷ مورد دیگر

Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.

Mirjana Stojilovicمشاهده پروفایل

پژوهشگر

• Field-programmable technology
• Electronic design automation (EDA)
• Hardware security
• +۵ مورد دیگر

Mirjana Stojilovic is a Researcher at École Polytechnique Fédérale de Lausanne (EPFL) in the School of Computer and Communication Sciences (IC), specifically within the Institute of Computer Engineering (IINFCOM) and the Parallel Systems Architecture Laboratory (PARSA). She also serves as a Lecturer in the SSC - Teaching department at EPFL. Her office is located at INJ 235, Station 14, 1015 Lausanne, Switzerland. Mirjana Stojilović received her Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. Her academic journey includes collaborating with the Processor Architecture Laboratory at EPFL as a Guest Researcher from 2010 to 2013, working at the University of Applied Sciences Western Switzerland as a senior researcher from 2013 to 2016, and joining the Parallel Systems Architecture Lab at EPFL in October 2016. Dr. Stojilovic's research spans field-programmable technology, electronic design automation (EDA), and electrical-level attacks and countermeasures for reconfigurable hardware. Her work bridges the gap between hardware design and security, with a particular focus on vulnerability analysis and protection mechanisms for FPGA-based systems in cloud environments. She has made significant contributions to understanding side-channel attacks, fault injection techniques, and secure multi-tenancy solutions for shared hardware resources. Her extensive publication record reveals a clear research trajectory from traditional FPGA design and EDA topics toward increasingly security-focused investigations. Recent work demonstrates deep expertise in power analysis attacks, hardware trojans, and countermeasures for cloud-based FPGA systems, reflecting the growing importance of hardware security in distributed computing environments. Scientific Awards and Recognitions: Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016) Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016) Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012) EPFL School of Computer and Communication Sciences (IC) Teaching Award (2015) Nominated for Best Paper Award at the International Conference on Field-Programmable Technology (FPT) (2020) Dr. Stojilovic has advised numerous PhD students including Coulon Louis, Pirayadi Rouzbeh, and Shrivastava Shashwat, along with past EPFL PhD students Glamocanin Ognjen and Mahmoud Dina. She has supervised dozens of semester and diploma projects focusing on hardware security, FPGAs, design automation, side-channel attacks, and cloud computing. Her service to the academic community includes serving on program committees for FPGA, FCCM, FPL, and DATE conferences, reviewing for multiple IEEE and ACM journals, and acting as associate editor for IEEE ESL and ACM TRETS. As a member of the Parallel Systems Architecture Laboratory at EPFL, Dr. Stojilovic leads research projects investigating security aspects of reconfigurable hardware systems. Her team works at the intersection of computer architecture, electronic design automation, and hardware security, with particular emphasis on vulnerabilities and protections for shared FPGA resources in cloud environments.

Kyle C. Haleمشاهده پروفایل

دانشیار

• Operating Systems
• High-Performance Computing
• Computer Architecture
• +۴ مورد دیگر

Kyle C. Hale is an Associate Professor at Oregon State University's School of Electrical Engineering and Computer Science (College of Engineering). He holds a Ph.D. and M.S. from Northwestern University (2016, 2013) and a B.S. in Computer Science from UT Austin (2010). Prior to joining Oregon State in 2024, he served as an Associate Professor at Illinois Tech in Chicago. His research spans operating systems, high-performance computing (HPC), virtualization, computer architecture, and system security. Current work focuses on specialized system software stacks for emerging computing paradigms like memory disaggregation and parallelism optimization. He leads the HExSA Lab and collaborates with the HiPCastor group. Scientific Awards: NSF CAREER Award (2023-2028) Illinois Tech College of Computing Excellence in Research (2023) Illinois Tech College of Computing Excellence in Teaching (2021) Illinois Tech Department of Computer Science Teacher of the Year (2020) EuroSys '22 Best Artifact Award Recent Research Trends: His publications emphasize compiler techniques for memory-disaggregated systems, optimizing parallel runtimes through hardware-software integration, virtualization at fine granularities, and accelerating machine learning workloads via system-level innovations. Keywords include HPC, virtualization, parallelism, and secure execution contexts. Teaching: Courses taught include Computer Architecture (CS/ECE 472), System Security (CSP 544), Operating Systems (CS 450), and advanced topics in serverless/edge computing. He actively recruits PhD students to the HExSA Lab.

• Database Systems
• Data Management
• GPU Acceleration
• +۶ مورد دیگر

Anastasia Ailamaki is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), renowned for her work in database systems and data management . Her research focuses on optimizing query processing for modern hardware, particularly GPUs and heterogeneous systems, and advancing cloud data analytics with serverless architectures like PixelDB . She has co-authored influential frameworks for adaptive query optimization , hardware-conscious database engines , and model-relational data management . Key research areas: GPU acceleration , HTAP , query approximation , spatial data processing , and cloud-native databases . Recent work emphasizes cross-task optimizations in distributed environments, efficient sampling , and context-aware joins integrating vector embeddings. In 2023, she contributed to adaptive recursive query optimization and speculative K-means clustering, while 2024 publications addressed proportional caching (HPCache) and model-relational systems . Her collaborations span institutions such as MIT, Microsoft, and ETH Zurich, with publications in top venues like SIGMOD , VLDB , and ICDE .

Henry Hoffmannمشاهده پروفایل

استاد

• Self-aware & Adaptive Computing
• Computer Systems
• Computer Architecture
• +۶ مورد دیگر

Henry Hoffmann is a Professor and Liew Family Chair in the Department of Computer Science at the University of Chicago. His research focuses on self-aware computing systems that adapt to meet goals like power efficiency, performance, and security. He leads the SEEC project and has contributed to advancements in computer architecture, embedded systems, and quantum computing. Hoffmann received the PECASE (2019), DOE Early Career Award (2015), and was inducted into the Samsung Hall of Fame for discovering vulnerabilities in SmartTVs. He holds a PhD from MIT (2013) and has co-founded Config Dynamics (2019). His work bridges control theory, machine learning, and traditional computer systems to create adaptive solutions for modern computing challenges. Education: PhD in Electrical Engineering and Computer Science from MIT (2013), SM (2003), and B.S. (1999) with highest honors from UNC Chapel Hill. Professional experience includes roles at Tilera Corporation and MIT Lincoln Laboratory. Research Interests: Self-aware systems, adaptive resource management, quantum computing optimization, and cybersecurity. His SEEC framework enables systems to autonomously adapt to constraints like energy and performance. Recent work explores applying adaptive techniques to AI/ML models for energy-efficient inference and security. Awards: Over $19M in research funding, 100+ publications, and leadership roles in NSF Expedition EPiQC (quantum computing). Named Chair of UChicago CS Department (2023-2024). Labs/Teams: Systems Group, EPiQC (quantum computing), and CERES (unstoppable computing systems). Current students include Jerry Ding and Ryien Hosseini. Notable alumni include Yi Ding (now faculty at Purdue) and Nikita Mishra.

Mehmet Esat Belviranliمشاهده پروفایل

استادیار

• Heterogeneous Architectures
• Runtime Systems
• Performance Modeling
• +۵ مورد دیگر

Mehmet Esat Belviranli is an Assistant Professor in the Computer Science Department at the Colorado School of Mines, where he directs the High Performance Systems and Software Lab (HyperSys). His research focuses on increasing resource utilization in heterogeneous architectures through runtime systems, scheduling algorithms, and performance modeling, with publications in top venues including MICRO, PPoPP, and SC. Education: Ph.D. in Computer Science, University of California, Riverside (2016) M.S. in Computer Science, Bilkent University (2009) B.S. in Computer Science, Bilkent University (2006) Belviranli's research spans heterogeneous architectures, runtime systems, performance modeling, parallel programming, autonomous computing, deep learning acceleration, cyber-physical systems, and edge-cloud platforms. His work develops analytical models and programming abstractions to address resource management, scheduling, and security challenges in diversely heterogeneous systems, with applications in edge computing, autonomous systems, and machine learning acceleration. Recent projects emphasize real-world constraints and security implications. His publication trends reveal increasing focus on edge-cloud resource management (e.g., HARNESS), security vulnerabilities in heterogeneous systems (e.g., MC3), and deep learning acceleration under resource constraints. Key themes include memory contention modeling, scheduling for cyber-physical systems, and concurrent DNN execution, reflecting a shift toward practical deployment in security-sensitive edge environments. Scientific Awards: U.S. Air Force Research Lab Summer Faculty Fellowship Award (2022) U.S. Air Force Research Lab Summer Faculty Fellowship Award (2021) Oak Ridge National Laboratory Significant Event Award (2019) Best Paper Finalist, IEEE HPEC 2018 Outstanding Paper Award, DATE 2024 Belviranli mentors Ph.D. students Ismet Dagli (MLCommons Rising Star 2024, CGO'24 SRC finalist) and Justin Davis (DATE'24 Outstanding Paper Award winner). He has secured $2M+ in funding from NSF, DoE, and SRC, including an NSF-SaTC grant on mobile security (2024), a DoE grant on superconductive systems (2023), and an NSF FuSe grant on graphene nanoribbons (2023), often leading multi-institutional teams from Rochester, Virginia, Arizona, and Minnesota. The HyperSys Lab develops ecosystems for high-performance heterogeneous systems, with recent projects including HARNESS for edge-cloud resource management and MC3 for mobile SoC security. The lab has received equipment donations from Google Coral.ai and Xilinx, and collaborates with national labs on security challenges and next-generation semiconductor technologies.

• High-Performance Computing
• Reconfigurable Computing
• FPGA Acceleration
• +۷ مورد دیگر

Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.

David I. Augustمشاهده پروفایل

استاد

• Compilers
• Computer Architecture
• Parallel Processing
• +۴ مورد دیگر

David I. August is a Professor of Computer Science at Princeton University, affiliated with the Department of Electrical Engineering. He earned his Ph.D. from the University of Illinois at Urbana-Champaign in 2000. His research focuses on compilers and computer architecture, emphasizing synergistic design between compilers and microarchitecture. He leads the Liberty Research Group, which explores topics such as automatic parallelization, memory profiling, and speculative execution. August joined Princeton in 1999 as a lecturer, advancing to full professor in 2012. He has served as program chair for MICRO 2009 and on committees for ISCA, PLDI, and ASPLOS. His notable accolades include the IEEE Fellow designation, Best Paper Awards at PLDI and CGO, and teaching awards from Princeton's School of Engineering. His work spans compiler optimizations, hardware-software co-design, and security architectures like TrustGuard. Recent research includes GPU scheduling (GhOST), memory profiling frameworks (PROMPT), and instruction prefetching (PDIP). He advises over 20 graduate students, many now leading roles at tech companies and academia. August teaches courses such as COS-126 (Intro to CS), COS-375 (Computer Architecture), and graduate seminars. His projects often bridge theory and practice, with tools like NOELLE and Liberty Research Group initiatives advancing compiler infrastructure and parallelism extraction.