Dr. Arkaprava Basu is an Associate Professor at the Indian Institute of Science (IISc), Bangalore. He received the ACM India Early Career Researcher (ECR) Award 2024 for his innovative contributions to efficient memory management in GPUs and CPUs through cross-stack software-hardware research. Affiliation: Indian Institute of Science (2018–present) Prior Roles: Full-time Research Staff at AMD Research (Austin, USA, 2014–2018) Education: PhD in Computer Science from University of Wisconsin-Madison (2013) His research focuses on optimizing AI hardware systems by integrating compiler, runtime, and OS design with hardware architecture. Collaborations include long-term consultancy with tech giants, emphasizing practical implementations of his theoretical work. Recognitions: ACM India ECR Award (2024) for "creative and impactful contributions toward efficient memory management for GPUs and CPUs"
Swiss Federal Institute of Technology in LausanneSwitzerland
Babak Falsafi is a Full Professor at the School of Computer and Communication Sciences (IC) at EPFL, leading the Parallel Systems Architecture Laboratory (PARSA). He is a renowned expert in computer architecture, datacenter systems, and cloud-native server design. His research focuses on post-Moore era computing, emphasizing heterogeneous architectures, energy efficiency, and scalable IT infrastructure. Falsafi is the founder of EcoCloud, an EC-sponsored industrial-academic consortium investigating sustainable information technology. He holds ACM and IEEE fellowships, a Sloan Research Fellowship, and has contributed to major projects like Optimus Prime (data transformation acceleration), AstriFlash (flash-based online service systems), and Midgard (virtual memory re-design). His work spans hardware-software co-design, memory systems, and security. Falsafi advises numerous PhD students and collaborates with industry partners such as Google and Cavium. Key achievements include pioneering scalable multiprocessor architectures, snoop filters in IBM BlueGene, and spatial memory streaming in ARM cores. His lab develops open-source tools like QFlex for server simulation. He frequently presents at top conferences (HPCA, ISCA, MICRO) and chairs workshops on post-Moore infrastructure. Teaching roles include leading courses in computer architecture and parallel systems across multiple EPFL departments (SIN, EDIC, SSC, SMA). His work addresses datacenter challenges like the 'data tax' and mitigating latency through specialized accelerators.
Antonio González is a full Professor at the Barcelona School of Informatics (FIB), Universitat Politècnica de Catalunya (UPC), where he is affiliated with the Department of Computer Architecture. He leads the Microarchitecture and Compilers (ARCO) research group, focusing on robust and energy-efficient computing systems, including general-purpose processors, GPUs, and cognitive computing architectures. His research spans computer architecture, microarchitecture, compilers, GPU design, and deep learning acceleration, with a strong emphasis on energy efficiency and memory optimization. His work integrates hardware and compiler techniques to enhance performance in modern computing systems. The recent publications highlight a strong trend in energy-efficient DNN acceleration, GPU microarchitecture, memory systems, and near-data processing. His team explores novel quantization methods, adaptive caching, and architectural extensions for vision and AI workloads, published in top-tier venues such as MICRO, ISCA, and IEEE/ACM journals. ACM Fellow (2020) ICREA Academia Award (2014, 2019, 2024) UPC Duran Farell Award (2008) HiPEAC 2024 Paper Award (twice) González has supervised several PhD students and leads competitive R&D+i projects, including those funded by ICREA and the European Research Council. His research group collaborates extensively within UPC and with international institutions. He is actively involved in advancing computer architecture through innovation in simulation, hardware design, and AI acceleration. He is a member of IEEE and ACM, and his work continues to influence both academic and industrial developments in high-performance and energy-efficient computing.
Amro Awad is an Associate Professor in the Department of Electrical and Computer Engineering (ECE) at North Carolina State University's College of Engineering. He previously served as an Assistant Professor at the University of Central Florida and as a Senior Member of Technical Staff at Sandia National Laboratories. Dr. Awad earned his Ph.D. and Master's in Computer Engineering from NC State and a Bachelor's from Jordan University of Science and Technology. Research Focus His research spans computer architecture and security, emphasizing secure hardware systems , memory security , and integration of emerging technologies . Key contributions include novel approaches to secure and efficient GPU memory management, FPGA resource scheduling, and DRAM simulation. Publications & Awards Dr. Awad's work appears in top-tier venues like ISCA, MICRO, ASPLOS, and HPCA. He holds six U.S. patents and received the prestigious R. Ray Bennett Faculty Fellow Award and recognition as a Goodnight Early Career Innovator . Funding & Collaborations His research group has been supported by DARPA , Sandia National Laboratories , NSF , Naval Surface Warfare Center , and Air Force Research Lab . Collaborations include AMD Research, Los Alamos National Lab, HP Labs, and Air Force Research Laboratory.
Timothy Rogers is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University, located in West Lafayette. His research focuses on GPU architecture, parallel processing, and simulation frameworks, with particular emphasis on optimizing hardware acceleration, memory systems, and concurrency management. He holds an office at BHEE 326A and can be reached at timrogers@purdue.edu. His work spans GPU performance modeling, SIMT architecture analysis, and energy-efficient computing. Recent contributions include frameworks like ThreadFuser for MIMD program analysis, CRISP for concurrent rendering, and Simr for data center microservices. He has also contributed to hardware ray tracing units and RISC-V core integration studies. Rogers has been active in conference leadership, serving as General Chair for ISPASS 2024 and securing NSF travel grants for student participation. His research bridges theoretical architecture design with practical implementation, addressing challenges in modern massively parallel systems.
Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.
Bo Wu is an Associate Professor in the Department of Computer Science at Colorado School of Mines. His research focuses on compilers and programming systems, particularly program optimizations for heterogeneous computing and emerging architectures, with applications in machine learning and graph processing. He joined Mines in 2014 after earning a Ph.D. from The College of William and Mary and earlier degrees from Central South University in China. Education : B.S. in Computational Science and Technology (Central South University, 2005) M.S. in Computer Science (Central South University, 2008) Ph.D. in Computer Science (The College of William and Mary, 2014) Research Interests : Wu's work emphasizes enhancing data locality in heterogeneous systems, GPU scheduling, and optimizing applications for emerging architectures. His contributions include frameworks like GraphZero for efficient graph mining and FLEP for GPU preemption. Awards & Grants : NSF SPX Award (2018) NSF CAREER Award (2018) Supercomputing Best Paper Award (2015) Multiple NSF grants for GPU-related research Advising & Grants : Wu has led several NSF-funded projects and actively participates in conference program committees (e.g., PPoPP, SC, ICS). His research spans compiler optimizations, parallel computing, and high-performance systems. Labs & Teams : While specific labs aren’t named, his work involves collaborations on GPU-based systems, graph processing frameworks, and compiler toolchains.
Dr. John Wickerson is an Associate Professor in the Circuits and Systems group at the Department of Electrical and Electronic Engineering, Imperial College London. His research focuses on improving the reliability of high-performance computing through formal methods, with contributions to high-level synthesis, memory models, and concurrency verification. He holds leadership roles including Course Director for the Electrical and Information Engineering degree and Deputy Tutor for PhD students. Research Interests: Formal Verification of Hardware/Software Systems High-Level Synthesis (HLS) and FPGA Compilation Weak Memory Models and Concurrency Semantics Fuzz Testing for Hardware Tools Compiler Optimization and Correctness Digit Elision and Arbitrary-Precision Arithmetic Notable Achievements: Best Paper Award at EuroSys 2024 (database isolation validation) Pioneered formal methods for HLS tools (e.g., QuteFuzz, C4) Co-developed the C4 C compiler concurrency checker Published over 60 peer-reviewed papers across top venues (ASPLOS, PLDI, FPGA) Lab/Team: Part of the Circuits and Systems group at Imperial College, collaborating with industry partners like Kaihong Yann and ARM.
Dr. Shuangshuang Jin is an Associate Professor in the School of Computing with a joint appointment in the Department of Electrical and Computer Engineering at Clemson University's College of Engineering, Computing and Applied Sciences. Previously, she served as a Senior Research Scientist at Pacific Northwest National Laboratory. Her educational background includes a Ph.D. in Computer Science (2007), M.S. in Computer Science (2003) from Washington State University, and a B.S. in Computer Science (2001) from Wuhan University. Ph.D., 2007 - Washington State University, Computer Science M.S., 2003 - Washington State University, Computer Science B.S., 2001 - Wuhan University, Computer Science Dr. Jin specializes in high-performance computing (HPC), distributed and parallel computing, general-purpose computation on graphical processing units (GPGPU), and HPC-based big data analysis, machine learning, scientific computation, and visualization. Her research focuses on applying these technologies to electrical engineering (power and energy systems, power electronics), automotive engineering, systems biology, and computer graphics. She leads the High-Performance Computing Enabled Science and Engineering (HPCeSE) Lab, where she supervises six PhD students working on HPC implementations for power system dynamic simulation, GridPACK application development, data-driven model-based smart control of power electronics converters, and other cutting-edge projects. Her recent publications demonstrate expertise in accelerating power system simulations, PV inverter reliability assessment, edge computing for power systems, and virtual prototyping of vehicle powertrain systems. The research trends show increasing focus on GPU acceleration, real-time simulation capabilities, and integration of HPC with emerging power system challenges. Junior Faculty Excellence in Teaching award (2021) Churchill Carter Fellowship (2022-2023) Zucker Graduate Education Center PhD Grant (2023) Doctoral Dissertation Completion Award (2023-2024) Outstanding Masters Student in Computer Science award (2022) Dr. Jin has successfully secured multiple grants from DOE, DOD, and other agencies for projects including 'Vehicle Propulsion Digital Twins', 'GridPACK-Wind', and 'Tool for Reliability Assessment of Critical Electronics in PV (TRACE-PV)'. She has advised numerous PhD and Master's students who have gone on to positions at national laboratories and industry. Her HPCeSE Lab maintains strong connections with Pacific Northwest National Laboratory, Fermi National Accelerator Laboratory, and other research institutions, providing students with valuable internship opportunities. Dr. Jin leads the High-Performance Computing Enabled Science and Engineering (HPCeSE) Lab at Clemson University, which focuses on developing optimized HPC-based parallel programming algorithms and architectures to solve complex scientific and engineering domain problems. The lab works on smart grid modeling and simulation, power electronics reliability assessment, ground vehicle systems prototyping, and advanced grid analytics, utilizing OpenMP, MPI, Pthreads, and CUDA/OpenCL on various computing platforms.
Swiss Federal Institute of Technology in LausanneSwitzerland
David Atienza is a Professor in the Department of Electrical Engineering at the School of Engineering, Swiss Federal Institute of Technology in Lausanne (EPFL), renowned for pioneering embedded systems education and research in ultra-low power computing. His innovative teaching methods, including using Nintendo DS consoles and smartphones to teach embedded systems, earned him the 2015 EPFL Teaching Award in Electrical Engineering. His research focuses on Embedded Systems , Edge AI , and Wearable Healthcare , with breakthroughs in energy-efficient hardware-software co-design for biomedical applications. Key contributions include open-source platforms like X-HEEP and HEEPocrates for ultra-low power edge computing, and frameworks like SzCORE for seizure detection benchmarking. His work bridges computer architecture with real-world healthcare challenges, emphasizing privacy-preserving algorithms and sustainable computing. Recent publications (2023-2025) reveal a dominant trend toward biomedical edge AI and sustainable computing , with 70% of articles targeting healthcare wearables (seizure detection, cough monitoring) and 30% addressing energy efficiency in data centers and edge devices. His research consistently integrates open-hardware principles (RISC-V) with novel algorithm-hardware co-design. Awards include: 2015 EPFL Teaching Award in Electrical Engineering section While specific advising details are unreported, his extensive publication record and leadership in multi-partner projects like Sustainable Textile Electronics (STELEC) indicate active graduate supervision and significant research funding. His group develops open-source hardware frameworks used globally in academia and industry. He leads the Embedded Systems Laboratory at EPFL, driving projects in ultra-low power RISC-V architectures, biomedical wearables, and sustainable computing. Current initiatives include carbon-aware data center frameworks and multi-modal health monitoring systems deployable on commercial wearables.
Jaechun No is a Professor at the Department of Computer Science and Engineering, College of Engineering, Sejong University. With a Ph.D. from Syracuse University (1999), he previously served as a Researcher at Argonne National Laboratory (1999-2001) and Hewlett Packard HPDC Laboratory (2001-2003) before joining Sejong University in 2003. Education: B.S., Ewha Womans University (1985) M.S., Western Illinois University (1993) Ph.D., Syracuse University (1999) His research focuses on Cloud/Edge computing , NVMe SSD technologies , and large-scale distributed/parallel storage systems . Key achievements include optimizing KVM/QEMU and Docker I/O virtualization, developing machine learning-based server failure prediction systems, and advancing NVMe/NAND flash memory I/O caching mechanisms for hybrid file systems. Recent publications highlight his work on virtualized I/O performance control (L-DTC, 2025), GPU Direct I/O classification (e-CLAS, 2024), Kubernetes resource provisioning (2024), and virtual storage resource redistribution (vThrot, 2024). These reflect trends in virtualization optimization, machine learning integration, and distributed resource management. Jaechun No's research has been cited extensively, with 148 Scopus h-index and over 8,000 citations. His collaborations span multiple countries and institutions, focusing on I/O virtualization, storage technologies, and distributed computing environments. Professional Affiliations: Current Professor at Sejong University (2003-present) Researcher at Argonne National Laboratory (1999-2001) Researcher at Hewlett Packard HPDC Laboratory (2001-2003)
Fan Yao is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Central Florida's College of Engineering and Computer Science. She received her Ph.D. in Computer Engineering from The George Washington University in 2018 and currently leads the Computer Architecture and Systems Research (CASR) lab. Her research focuses on the intersection of computer architecture, security, and machine learning, with particular emphasis on hardware-based security vulnerabilities and defenses. Dr. Yao's research interests span computer architecture, hardware and system security, AI security, energy-efficient computing, and cloud computing. Her work addresses critical security challenges in modern computing systems, particularly focusing on microarchitecture attacks, hardware-based model tampering in deep learning systems, and information leakage threats in emerging non-volatile memory systems. She has developed innovative defense mechanisms against cache timing channels, branch predictor vulnerabilities, and GPU-based side channels. Her recent publications demonstrate a strong focus on AI security (particularly Deep Neural Network vulnerabilities), hardware security (including cache and branch predictor attacks), and secure memory architectures. The research shows an evolution from traditional computer architecture topics toward the security implications of AI hardware and emerging memory technologies, with increasing emphasis on practical attacks and defenses in real-world systems. NSF GW I-Corps Site Grant Award, 2018 Best Dissertation Award, GWU, 2018 The Norris & Betty Hekimian Engineering Endowment Fellowship, GWU, 2017 Top Picks in Hardware and Embedded Security, 2019 NSF CAREER project award, 2024 Dr. Yao currently leads multiple NSF-funded research projects including 'Understanding and Taming Deterministic Model Bit Flip Attacks in Deep Neural Networks' (NSF SaTC, 2020-2023), 'Towards Secure-By-Design Integration of Emerging Non-Volatile Memory in Future System' (NSF CNS, 2020-2023), and 'Architecting Secure-by-Design Memristor-Based Memories' (NSF CNS, 2019-2022). She has successfully mentored numerous PhD students, many of whom appear as first authors on top-tier conference publications, demonstrating her commitment to graduate education and research mentorship. As the leader of the CASR lab, Dr. Yao oversees a vibrant research group focused on building secure-by-design, efficient, and advanced future systems through novel techniques spanning hardware, computer architecture, and systems. The lab actively publishes at top computer architecture and security conferences including ISCA, MICRO, HPCA, IEEE S&P, and USENIX Security, with multiple papers accepted to these venues annually. The group has developed several influential tools and frameworks for security analysis, including proof-of-concept code for BranchSpec exploits that has been widely cited in the hardware security community.
Antonio Plaza is a Full Professor at the University of Extremadura, Spain, and Head of the Hyperspectral Computing Laboratory. With over 600 publications, he is a leading expert in hyperspectral data processing and parallel computing of remote sensing data. He serves as IEEE Fellow and has received numerous accolades, including the 2019 Excellent Teaching Award and multiple Highly Cited Researcher recognitions. Research Interests : His work bridges Hyperspectral Image Analysis , Medical Imaging , and High-Performance Computing . Recent projects focus on 3D anatomical modeling, AI-driven surgical tools, and deep learning applications for aortic dissection segmentation. Scientific Awards : 2019 Highly Cited Researcher (Geosciences) 2015 IEEE Fellow 2019 Excellent Teaching Award 2018 Highly Cited Researcher (Cross-Field) 2002 Best PhD Dissertation, University of Extremadura Editorial Leadership : Served as Editor-in-Chief of IEEE Transactions on Geoscience and Remote Sensing (2013–2017) and held multiple committee roles in IEEE GRSS. His articles reflect a shift from remote sensing to medical imaging, with a focus on Aortic Dissection Segmentation , Skull Reconstruction , and AI-driven Medical Tools .
Antonio Maria Gonzalez Colas is a Full Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture within the Faculty of Computer Science of Barcelona (FIB). He leads the ARCO research group focused on Microarchitecture and Compilers and is actively engaged in high-impact research in computer architecture, GPUs, and energy-efficient computing. His collaborations extend to the Barcelona Supercomputing Center and various national and European research initiatives. Research Interests: His primary research areas include computer architecture, microarchitecture, compilers, GPUs, and processor design. He focuses on energy-efficient computing, deep neural network (DNN) accelerators, GPU simulation and optimization, memory systems, and architectural support for machine learning and autonomous systems. His work often integrates compiler techniques with hardware design for performance and efficiency. Scientific Production Trends: His recent publications demonstrate a strong focus on energy-efficient hardware for AI workloads, particularly DNN and speech recognition acceleration, GPU architectural innovations, memory optimization, and real-time rendering. He frequently publishes in top-tier venues such as ISCA, MICRO, HPCA, and IEEE/ACM journals. ICREA Academia Award 2024 HiPEAC 2024 Paper Award ACM Senior Member (2020) Advising and Grants: He has advised numerous PhD students whose theses cover topics like energy-efficient architectures for autonomous driving, speech recognition, and neural networks. He leads competitive R&D projects, including an ERC Advanced Grant and projects funded by the Spanish National Program and the ICREA Academia program, focusing on domain-specific architectures and cognitive computing units. Labs and Teams: He is the principal investigator of the ARCO (Microarchitecture and Compilers) research group at UPC, a leading team in computer architecture research in Spain. The group is part of a larger collaborative network within UPC and with international partners.
Henry Kang is an Associate Professor in the Department of Computer Science at the University of Missouri–St. Louis, College of Arts and Sciences. His expertise spans computer graphics, data visualization, and computational art, with extensive experience in full-stack web development and programming frameworks. Education: Ph.D. in Computer Science, Korea Advanced Institute of Science and Technology (2002) Research Interests: Kang's work focuses on computer graphics, non-photorealistic rendering, and data visualization. Key projects include coherence-enhancing filtering, stereoscopic 3D line drawing, and emotion-driven image recoloring. He integrates machine learning and GPU computing for real-time scene navigation and artistic effects. Publication Trends: His research emphasizes texture filtering, computational art, and perceptual modeling. Recent work includes Gaussian image binarization (2021) and coherence-enhancing GPU filtering (2018), while earlier contributions explore stereoscopic depth perception (2013) and directional stippling (2011). Contact: Email: kangh@umsl.edu Phone: (314) 516-5841 Office: 318 ESH
