جستجوی استاد راهنمای دانشگاهی

• Computer Architecture
• Operating Systems
• Hardware/Software Co-Design
• +۳ مورد دیگر

Lars Nolte is a Researcher at the Chair of Integrated Systems (Lehrstuhl für Integrierte Systeme) at the Technical University of Munich, where he conducts cutting-edge research in computer architecture and operating systems with a focus on hardware acceleration for Linux kernel mechanisms using FPGA platforms. His primary research areas include Computer Architecture, Operating Systems, Hardware/Software Co-Design, Embedded Systems, FPGA Acceleration, and Linux Kernel Development. He investigates hardware-assisted solutions for inter-process communication, event notification, and thread synchronization to reduce latency in real-time systems, primarily through the PASSTA project which develops FPGA-based accelerators for Linux syscall optimization. Nolte's recent publications demonstrate a clear trend toward hardware-software co-design for Linux performance enhancement, with 10 publications since 2019 focusing on FPGA-accelerated kernel features like futex, epoll, and IPC. His work bridges computer architecture and systems software, targeting embedded and high-performance computing applications. He actively supervises student research, having guided numerous Bachelor's, Master's, and research internships on topics including hardware-accelerated Linux mechanisms, network processing, and tracing systems. Notable advisees include Maximilian Grözinger (Hardware Assisted Futex) and Jonas Kirf (Inter-Process Communication survey). The Chair of Integrated Systems, led by Prof. Andreas Herkersdorf, provides Nolte's collaborative research environment focused on integrated systems for cellular communications and embedded applications, with facilities including FPGA labs and Gem5 simulation infrastructure.

Kevin Skadronمشاهده پروفایل

استاد

• Computer Architecture
• Memory Architecture
• Processing in Memory (PIM/PNM)
• +۷ مورد دیگر

Kevin Skadron is the Harry Douglas Forsyth Professor of Computer Science at the University of Virginia's School of Engineering and Applied Science, where he has been faculty since 1999. He previously served as department chair from 2012-2021 and has made significant contributions to computer architecture research. Dr. Skadron received his B.S. in Electrical and Computer Engineering and B.A. in Economics from Rice University in 1994, and his Ph.D. in Computer Science from Princeton University in 1999. He spent the 2007-08 academic year on sabbatical at NVIDIA Research. His research focuses on computer architecture, particularly novel heterogeneous processor organizations, accelerator architecture, processing in memory, and automata processing. He has pioneered work in processing-in-memory (PIM) architectures, automata processing for pattern matching, and heterogeneous computing systems. His work addresses critical challenges in thermal management, power delivery, process variations, and wear-out in modern computing systems. Current projects include Fulcrum, Gearbox, Sieve, and DRAM-CAM architectures, along with the development of the PIMeval simulation framework and PIMbench benchmark suite. Skadron's recent publications reveal a strong focus on processing-in-memory architectures, with numerous papers on PIM design, benchmarking, and applications. His research also emphasizes automata processing for pattern matching, with contributions to FPGA-based implementations and programming models. Many of his recent works address graph processing acceleration, bioinformatics applications, and memory system optimization, demonstrating the practical impact of his theoretical contributions. Dr. Skadron has received numerous accolades including the 2023 SRC/SIA University Research Award for lifetime research contributions to the U.S. semiconductor industry, the 2011 ACM SIGARCH Maurice Wilkes Award, and is a Fellow of both IEEE and ACM. He was also named a University of Virginia Teaching Fellow for 2003-04. Skadron has advised numerous graduate students, with recent PhD graduates now working at leading companies like IBM, AMD, Apple, and Black Sesame. His research has been supported by the National Science Foundation, Semiconductor Research Corporation, DARPA, and industry partners including NVIDIA, Intel, and Micron. He co-founded IEEE Computer Architecture Letters and served as editor-in-chief from 2010-2012. He is actively involved in the UVA Center for Automata Processing (CAP) and has served as director for the SRC JUMP 1.0 Center for Research on Intelligent Storage and Processing in Memory (CRISP). He is currently a member of the SRC JUMP 2.0 Center for Research on Processing in Storage and Memory (PRISM).

• Artificial Intelligence
• Computer Science
• Genomics
• +۱۱ مورد دیگر

Nikolaos Alachiotis is an Associate Professor at the Digital Society Institute, specializing in Artificial Intelligence, Field-Programmable Gate Arrays (FPGA), and Genomics. His work bridges Hardware Acceleration with Bioinformatics , focusing on scalable solutions for genomic analysis and evolutionary biology. Research Themes: AI Hardware, FPGA Optimization, Population Genetics Key Collaborations: Delft University of Technology, Zenodo, Frontiers in High-Performance Computing Research Focus Alachiotis develops deep learning and FPGA-based tools for selective sweep detection and phylogenetic inference , enabling faster genomic analyses. His work spans convolutional neural networks , spiking networks , and adaptive computing for bioinformatics and radio astronomy. Recent articles highlight trends in AMD Versal SoC applications, deep learning for natural selection , and scalable genomic pipelines . Scientific Awards Outstanding Student Paper Award (2023) Supervised Work His supervised projects include Accelerating Selective Sweep Detection and Effective Data Preprocessing Techniques , often in collaboration with institutions like Zenodo and Frontiers journals.

Robert Rinkerمشاهده پروفایل

دانشیار

• Computer Architecture
• Reconfigurable Computing
• Embedded Systems Security
• +۳ مورد دیگر

Robert Rinker, Ph.D., is an Associate Professor and Associate Chair in the Department of Computer Science at the University of Idaho, part of the College of Engineering. His office is located in Hedlund Building 202D, and he can be reached at rinker@uidaho.edu. Rinker holds a Ph.D. in Computer Science from Colorado State University, and both Master's and Bachelor's degrees in Electrical Engineering from the University of Idaho. His teaching responsibilities include courses such as Computer Science I (CS 120), Computer Organization and Architecture (CS 150), System Software (CS 270), Advanced Computer Architecture (CS 451/551), and Real-Time Operating Systems (CS 452/552). His research focuses on reconfigurable computing, embedded systems security, computational biology pipelines, and hardware compilation techniques. Specific contributions include work on FPGA-based systems, resilient multi-core architectures, and formal verification methodologies. Rinker’s research trends emphasize the intersection of hardware-software co-design and cybersecurity, with notable contributions to VANET security and computational density optimization in embedded systems. His publications span topics from workflow automation in bioinformatics to compiler-driven FPGA optimization strategies. While no formal awards or grants are listed, his extensive academic service as Associate Chair highlights his leadership in departmental operations. He advises courses but no listed students or active lab teams are mentioned in the provided materials.

Arindam Mukherjeeمشاهده پروفایل

دانشیار

• Internet of Things (IoT)
• Fog Computing
• Real-Time Systems
• +۴ مورد دیگر

Dr. Arindam Mukherjee serves as an Associate Professor in the Department of Electrical and Computer Engineering at the University of North Carolina at Charlotte, College of Engineering. His office is located in EPIC 2336, and he can be reached at amukherj@charlotte.edu or by phone at 704-687-8417. His educational qualifications are as follows: Ph.D. from the University of California at Santa Barbara (2002) M.S. from the University of California at Santa Barbara (2000) B.Tech. from Jadavpur University, India (1996) Dr. Mukherjee's research spans Smart System Architectures, Internet of Things (IoT), and Fog Computing. He investigates cooperative and autonomous mobile systems, real-time system software, and database management for Big Data. His work includes scheduling algorithms for IoT systems and the integration of edge, fog, and cloud computing paradigms for real-time applications in the Big-Squared Data space. His publication record from 2003 to 2018 shows an evolution from VLSI design and bioinformatics to contemporary IoT and fog computing. Early work focused on logic synthesis, biochip testing, and FPGA-based bioinformatics implementations, while recent contributions address power management in heterogeneous processors, energy-efficient communications for smart buildings, and the synergistic integration of edge, fog, and cloud computing for real-time IoT data processing. No scientific awards are mentioned in the provided text. There is no information available regarding students advised or research grants. Similarly, no specific research labs or collaborative teams are described in the source material.

• Computer Architecture
• Memory Systems
• Reconfigurable Computing
• +۶ مورد دیگر

Ronald Dreslinski is a Professor in the Department of Computer Science and Engineering at the University of Michigan, College of Engineering. His work focuses on computer architecture, memory systems, and reconfigurable computing, with applications in machine learning, wireless communication, and autonomous systems. Research spans hybrid memory systems, fault-tolerant networks, and low-power processors Key technologies include PIM (Processing-in-Memory), systolic arrays, and Galois field accelerators His publications highlight trends in adapting reconfigurable architectures for sparse data, optimizing wireless communication decoders, and integrating neural networks with traditional circuit design. He mentors PhD students through weekly 1-on-1 meetings, project-specific sessions, and group presentations. The department emphasizes broadening participation in computing and student support through community initiatives.

Vladimir Milovanovićمشاهده پروفایل

دانشیار

• Electrical Engineering
• Computer Science
• Signal Processing
• +۷ مورد دیگر

Dr. Vladimir Milovanović is an Associate Professor at the Faculty of Engineering, University of Kragujevac, Serbia, holding a position as Chair of the Department of Electrical Engineering and Computer Sciences. His academic career is anchored in interdisciplinary research at the intersection of electrical engineering, computer science, and biomedical applications. His research focuses on hardware design, radar sensor systems, biomedical signal processing, and machine learning applications. Notable areas include CMOS circuit design, FPGA-based implementations, and parameterizable hardware generators for signal processing tasks. He also explores medical imaging analysis using deep learning techniques for conditions like disc hernia diagnosis. Recent work emphasizes radar technology (FMCW transceivers, signal processing architectures), embedded systems (FPGA development, IP core utilization), and high-performance streaming data algorithms. His publications span over two decades, demonstrating expertise in analog/digital circuit design, comparative classifier analysis in biomedical contexts, and hardware-software co-design methodologies. Dr. Milovanović collaborates with industry on energy-efficient MIMO arrays and semiconductor gas sensors. His contributions include open-source HDL models for digital signal processors and comparator circuits optimized for low-power and high-speed applications.

Vadim Geurkovمشاهده پروفایل

دانشیار

• Built-In Self-Test and Self-Repair in Reconfigurable Computing Systems
• Digital and Mixed-Signal Systems Testing and Testable Design
• Self-Diagnosis in Microprocessor Based Measurement Instruments
• +۲ مورد دیگر

Vadim L. Geurkov is an Associate Professor at the Department of Electrical and Computer Engineering, Toronto Metropolitan University. He earned an M.A.Sc. in Electrical Engineering from Georgian Technical University (1981) and a Ph.D. in Computer Engineering from the Institute of Control Sciences, Moscow (1993). Research Focus: Specializes in digital and mixed-signal systems testing, with expertise in built-in self-test/repair mechanisms, fault tolerance, error-control codes, and self-diagnosis in reconfigurable computing systems. His work bridges theoretical and applied aspects of hardware reliability. Industry Collaborations: Led projects with OCE-CCIT, MDA Space Missions Inc., NSERC, and other partners on reconfigurable processors, FPGA self-restoration, and error-control applications. Professional Affiliations: Senior IEEE member, ACM member, and licensed with the Ontario Society of Professional Engineers.

Dustin Richmondمشاهده پروفایل

استادیار

• Computer Architecture
• FPGA
• RISC-V
• +۴ مورد دیگر

Dustin Richmond is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. His work focuses on secure, usable hardware systems with applications in FPGA acceleration, RISC-V architectures, and side-channel analysis. Email: drichmond@ucsc Office: Engineering 2, Room 221 Research Interests: Secure hardware systems FPGA-based computing Manycore processors High-level synthesis Side-channel vulnerabilities Notable Article Trends: Recent publications emphasize cloud FPGA security, manycore design optimization, and hardware security. Earlier works focus on RISC-V acceleration, OpenCL compiler enhancements, and heterogeneous computing systems. GitHub Contributions: Maintains open-source projects like RISC-V-On-PYNQ and PYNQ-HLS, addressing FPGA programming challenges and RISC-V integration. Active in resolving community issues related to toolchain compatibility and hardware-software interfaces.

Andrew Nelsonمشاهده پروفایل

استادیار

• Embedded Systems
• Real-Time Control
• Multi-Sensor Fusion
• +۴ مورد دیگر

Andrew Nelson is a part-time Assistant Professor at the Electronic Systems department, College of Engineering , Eindhoven University of Technology . He also serves as a founder and R&D lead at Verintec Solutions B.V. . Research Focus : Predictable and composable embedded systems, real-time robotics, multi-sensor fusion for industrial positioning, multi-core processor optimization. Key Contributions : Development of the CompSOC platform, CompROS architecture for ROS2, and novel multi-rate control strategies. Recent Article Trends : His work emphasizes predictable execution on multi-core platforms, sensor fusion techniques (linear encoders + vision systems), and real-time robotics. Articles span 2015–2025, highlighting collaborations with institutions like TU/e and ECSEL JU grant projects IMOCO4.E (2021–2023) and COMP4DRONES (2021).

Johannes Pfauمشاهده پروفایل

پژوهشگر

• FPGA Architecture
• Reconfigurable Computing
• Digital Beamforming
• +۳ مورد دیگر

Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.

François-Raymond Boyerمشاهده پروفایل

دانشیار

• Computer Architecture
• VLSI Systems
• Microelectronics
• +۴ مورد دیگر

François-Raymond Boyer is an Associate Professor in the Department of Computer Engineering and Software Engineering at Polytechnique Montréal. He holds a B.Sc. and Ph.D. from Université de Montréal and teaches courses in programming and digital audio. His research spans: Computer architecture and VLSI systems Network processing and traffic management Digital audio signal processing Hardware acceleration and optimization He is affiliated with ReSMiQ (Strategic Cluster for Microsystems) and OICRM (Music Research Observatory). Recent publications focus on 5G network processing, modular programming frameworks, and high-speed traffic management architectures, primarily in IEEE Access and IEEE Transactions on VLSI Systems. Professor Boyer has supervised 3 PhD and 6 Master's students, with research topics including network architecture, audio processing, and hardware design. No scientific awards are mentioned in the available records.

• Reconfigurable Computing
• High-Performance Computing
• Field-Programmable Gate Arrays (FPGAs)
• +۳ مورد دیگر

Carl-Johannes Johnsen is a Ph.D. student and Guest Researcher in the Department of Computer Science at the University of Copenhagen, specializing in reconfigurable computing and machine learning acceleration for X-ray food inspection systems. His research integrates FPGA-based hardware acceleration with compiler design for high-performance computing, focusing on programming models for Field-Programmable Gate Arrays and optimization of machine learning pipelines. Additional interests include concurrent and distributed programming education methodologies that prioritize conceptual understanding over formal proofs. Publication analysis (2019-2022) reveals consistent contributions to FPGA acceleration of scientific workloads (molecular dynamics), novel compiler vectorization techniques, and minimalist hardware implementations. His work bridges computer architecture, parallel computing, and practical applications in food safety inspection through cross-disciplinary collaboration. No scientific awards were documented in the source material. As an active doctoral candidate, Johnsen has no advisory responsibilities. Research grant details were not specified in the provided information. He operates within the Programming Languages and Theory of Computation research environment at the Department of Computer Science, engaging in international collaborations focused on hardware-software co-design as indicated by network analysis metrics.