Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.



