جستجوی استاد راهنمای دانشگاهی

Soheil Salehiمشاهده پروفایل

استادیار

• Hardware Security
• AI-Enabled Security
• Internet of Things (IoT) Security
• +۱۵ مورد دیگر

Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.

Baker Mohammadمشاهده پروفایل

استاد

• Very-Large-Scale Integration (VLSI)
• Hardware Accelerators for Artificial Intelligence
• Hardware Security
• +۷ مورد دیگر

Prof. Baker Mohammad serves as Professor and Director of the System on Chip Lab in the Department of Computer and Information Engineering at Khalifa University. With over 15 years of industrial experience at Intel and Qualcomm designing microprocessors and DSP chips, he bridges academic research with real-world engineering challenges in high-performance computing and low-power systems. His educational background includes: Ph.D. in Electrical and Computer Engineering, University of Texas at Austin (2008) M.S. in Electrical and Computer Engineering, Arizona State University B.S. in Electrical Engineering, University of New Mexico Dr. Mohammad's research spans cutting-edge domains where VLSI design converges with AI acceleration and emerging memory technologies . His work pioneers Memristor applications in environmental sensing (radiation, vacuum, glucose) and neuromorphic computing, while advancing energy harvesting systems for wearable electronics. The integration of in-memory computing with security primitives represents a paradigm shift in hardware design, moving beyond traditional CMOS limitations. His publication trajectory reveals accelerating focus on self-powered neuromorphic systems and RRAM-based architectures, with recent work (2021-2023) emphasizing hardware-software co-design for edge AI. Over 75% of his recent publications involve cross-disciplinary collaborations spanning materials science, chemistry, and biomedical engineering. Notable scientific recognition includes: IEEE TVLSI Best Paper Award 2016 IEEE MWSCAS Myrill B. Reed Best Paper Award Qualcomm Qstar Award for Performance Leadership KUSTAR IP Excellence Award Multiple SRC Techon Best Session Papers As a dedicated mentor, he has supervised over 15 graduate students while securing competitive funding from Khalifa University, ADEK, Qualcomm, Tii, and UAE space agencies. His grant portfolio demonstrates exceptional translational impact, converting fundamental research in memristive devices into drone flight computers and medical sensors. Current projects integrate academic rigor with industrial deployment timelines. The System on Chip Lab operates as a multidisciplinary hub where semiconductor physicists collaborate with AI researchers to develop RISC-V-based secure processors and piezoelectric nanogenerator systems. Recent expansions include partnerships with Tii for aerospace applications and medical device startups for glucose monitoring technology.

Tulika Mitraمشاهده پروفایل

استاد

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +۷ مورد دیگر

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

• Computer Architecture
• Machine Learning
• Approximate Computing
• +۳ مورد دیگر

Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture

• Computer Hardware
• FPGA Acceleration
• Artificial Intelligence
• +۸ مورد دیگر

Professor Wayne Luk is a Professor of Computer Engineering at the Department of Computing, Faculty of Engineering, Imperial College London. He leads the Programming Languages and Systems Section and the Custom Computing Research Group, and directs the EPSRC Centre for Doctoral Training in High-performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. He previously served as a Visiting Professor at Stanford University from 2006 to 2009. His research spans FPGA acceleration, quantum computing, deep learning optimization, and algorithm-hardware co-design, with affiliations to the CRUK Convergence Science Centre and the Engineering Secure Software Systems group. His research interests include computational modeling for particle physics, causal discovery in agent-based systems, and high-throughput digital electronics. Notable contributions include FPGA-accelerated algorithms for neural networks, quantum circuit simulation, and Bayesian optimization frameworks. His work emphasizes practical applications of reconfigurable hardware in fields like medical imaging, high-energy physics, and financial systems. Professor Luk is a Fellow of the Royal Academy of Engineering, IEEE, and BCS. His publications focus on advancing hardware-aware machine learning, FPGA-based acceleration techniques, and scalable design methodologies. His research bridges theoretical computer science with applied engineering, addressing challenges in real-time systems, embedded computing, and next-generation computing architectures. His academic leadership includes directing interdisciplinary centers and training programs, fostering collaboration across computing, engineering, and physics. Current projects explore quantum computing tools, causal inference systems, and high-performance graph neural networks for particle physics applications.

Oliver Diesselمشاهده پروفایل

دانشیار

• Reconfigurable Hardware
• Computer Architecture
• Digital Systems
• +۶ مورد دیگر

Associate Professor Oliver Diessel is a faculty member at the University of New South Wales (UNSW) within the School of Computer Science and Engineering. He has been actively teaching and conducting research at UNSW since at least 2000, with teaching experience spanning various computer architecture and digital systems courses. Dr. Diessel completed his education at the University of Newcastle, Australia, earning a B.E. (Computer, Hons) and B.Math. in 1991, followed by a PhD in 1998. His academic career has focused on reconfigurable computing systems and computer architecture. His primary research interests center around the design, test, and implementation of digital systems in reconfigurable logic devices called Field-Programmable Gate Arrays (FPGAs). Specifically, he focuses on dynamically reconfigurable digital systems where circuits can be modified while the system is operational. His work aims to develop architectures, design methods, and tools that enhance the benefits and reduce the costs of reconfigurable systems. Current research projects include fault-tolerant FPGA-based systems for space applications and fine-grained accelerators for heterogeneous devices. Dr. Diessel has published extensively with 2 books, 1 book chapter, 16 journal articles, 67 conference papers, 1 edited conference proceedings, and 7 conference presentations to his credit. His publications reflect a strong emphasis on reconfigurable technology, computer architecture, and electronic design automation. As a supervisor, Dr. Diessel currently mentors two MPhil students: Tong Wu working on Runtime reconfiguration and Junning Fan working on Fault-tolerance of FPGA-based applications. He has previously supervised six students to completion. His supervision interests include reconfigurable technology and systems, electronic design automation, and computer architecture. Dr. Diessel is an active member of the professional community, serving on the Editorial Board of ACM Transactions on Reconfigurable Technology and Systems and as an IEEE Member. He has taught numerous courses including Configurable Systems (COMP4601), Computer Architecture (COMP3211, COMP4211), Digital Systems (COMP3222), and FPGA Implementation of Digital Systems using Verilog.

Debjit Palمشاهده پروفایل

پژوهشگر ارشد

• Machine Learning for Electronic Design Automation (EDA)
• System-on-Chip (SoC) Verification
• Hardware Verification
• +۶ مورد دیگر

Debjit Pal is a Post-Doctoral Associate at the School of Electrical and Computer Engineering, Cornell University, and a member of the Computer Systems Laboratory. His research focuses on machine learning techniques for hardware verification, SoC validation, and FPGA optimization. Education: Ph.D. in Computer Engineering (University of Illinois at Urbana-Champaign, 2019) M.S. in Computer Science (IIT Kharagpur, 2012) B.E. in Electronics Engineering (Jadavpur University, 2008) Research Interests: Machine Learning for Electronic Design Automation (EDA) System-on-Chip (SoC) Verification Edge Intelligence as a Service Compiler Optimizations for Reconfigurable and High-Performance Computing Scientific Awards: IEEE CEDA Student Research Award (2016) Best Paper Nomination (ICCAD 2015, DAC 2018, ASP-DAC 2019) E. J. McCluskey Best Doctoral Thesis Competition Semi-Finalist (2020) Travel Grants for ICCAD/DAC/ASPDAC (2018-2019) Professional Roles: Technical Program Committee Member (DAC, VLSID), Reviewer (IEEE TVLSI, DATE, ICCAD). Collaborates with researchers like Zhiru Zhang and Shobha Vasudevan.

• Radiation Biology
• Radiation Carcinogenesis
• Radiation Applications in Medicine
• +۳ مورد دیگر

John Ford is an Associate Professor in the Department of Nuclear Engineering at Texas A&M University. His research focuses on radiobiology, radiation carcinogenesis, and medical applications of radiation. He holds academic appointments within the College of Engineering and contributes to the Health Physics, Radiation Biology & Medical Physics research group. Education includes a B.S. and M.S. in Nuclear Engineering from Mississippi State University (1982, 1986), a Ph.D. in Biomedical Sciences from the University of Tennessee (1992), and postdoctoral training at Oak Ridge National Laboratory (1992–1993). His work emphasizes understanding radiation effects on biological systems, with notable contributions to radiation dosimetry, bystander signaling mechanisms, and dietary modulation of radiation damage. Recent studies explore space radiation monitoring technologies and therapeutic applications of radiation. Awards include the BP Award for Teaching Excellence (2007) and ARRO Educator of the Year (2013–2014). Research spans interdisciplinary areas such as radiation-induced cancer mechanisms, nutritional interventions to mitigate radiation effects, and advanced radiation detection instrumentation. He has advised numerous projects in radiation safety curriculum development and collaborated on NASA-funded studies modeling radiation impacts on astronauts.

Tobi Delbruckمشاهده پروفایل

استاد

• Neuromorphic Engineering
• Event-Based Vision Systems
• Silicon Retinas
• +۶ مورد دیگر

Tobi Delbruck is a titular professor of physics and electrical engineering at ETH Zurich, where he leads the Sensors Group at the Institute for Neuroinformatics (INI) in Zurich, Switzerland. He collaborates closely with Shih-Chii Liu and Giacomo Indiveri as part of the 'hardware groups' at INI. Delbruck has also served as visiting faculty at Caltech and is a Fellow of the IEEE. His work focuses on bio-inspired and neuromorphic event-based sensory processing systems. Professor Delbruck's research spans multiple areas of neuromorphic engineering, with particular emphasis on event-based vision systems and low-power analog VLSI circuits. His work has significantly advanced the field of Dynamic Vision Sensors (DVS), which mimic the human retina's response to changes in brightness rather than capturing full frames. This approach enables extremely low-latency vision processing with minimal power consumption, making it ideal for high-speed applications and robotics. His research has applications in robotics, autonomous systems, and low-power embedded vision. Delbruck is an active contributor to the neuromorphic engineering community, co-organizing the annual Telluride Workshop on Neuromorphic Engineering and serving in leadership roles with IEEE. He has authored numerous influential publications and co-authored books including "Event-Based Neuromorphic Systems" and "Analog VLSI: Circuits and Principles." His jAER (Java Address-Event Representation) project provides open-source tools for real-time event-based sensory processing. Analysis of his recent publications shows a clear trend toward integrating event-based vision with deep learning techniques and applying these systems to practical robotics problems. His scientific achievements have been recognized with multiple awards including: IEEE Fellow Winner of Best Live Demonstration award at ISCAS 2012 Honorable Mention Award from Sensory Systems Technical Committee at ISCAS 2012 Overall Best Student Paper Award and Best Paper Award from Sensory Systems Technical Committee at ISCAS 2010 Winner of the 2006 ISSCC Jan Van Vessem Outstanding European Paper Award Professor Delbruck actively mentors students and has supervised numerous PhD and Master's theses in the areas of neuromorphic engineering and event-based vision systems. His group has secured significant research funding from various sources to support their innovative work in bio-inspired sensory processing. He teaches courses on "Electronics for Physicists II (Digital)" and "Neuromorphic Engineering," helping to train the next generation of researchers in this field. The Sensors Group at INI, which Delbruck leads, operates state-of-the-art facilities for designing and testing neuromorphic vision systems. The group maintains close collaborations with researchers worldwide and has developed several important open-source resources including the jAER project and bias generator design kits. Their work continues to push the boundaries of what's possible with event-based sensory processing, with applications ranging from high-speed robotics to low-power embedded vision systems.

Justine Sherryمشاهده پروفایل

استادیار

• Computer Networking
• Networked Systems
• Middleboxes
• +۵ مورد دیگر

Justine Sherry is the A. Nico Habermann Associate Professor of Computer Science at Carnegie Mellon University, affiliated with the College of Engineering. She holds a PhD (2016) and MS (2012) from UC Berkeley and a BS/BA (2010) from the University of Washington. Her research focuses on networked systems, including middleboxes, cloud computing, congestion control, and hardware acceleration (e.g., SmartNICs/FPGAs). Notable projects include Pigasus (open-source 100Gbps IDS), APLOMB (cloud-based middlebox scaling), and BlindBox (encrypted traffic scanning). Her academic roles include serving on the SIGCOMM CARES Committee, DARPA ISAT Study Group, and ACM CoNEXT Steering Committee. Awards include the Alfred P. Sloan Fellowship, VMware Systems Award, and IETF Applied Networking Prize. She advises over 15 students and collaborates with industry partners like Intel and VMware. Research highlights include radical shifts in datacenter architectures (SmartNIC compute control), fairness in congestion algorithms (BBR analysis), and database-proxy innovations (Tigger with eBPF). Her teaching emphasizes systems as science labs, integrating experimental design and hypothesis testing into projects. Education: PhD UC Berkeley (2016), MS UC Berkeley (2012), BS/BA University of Washington (2010) Labs/Teams: CyLab, SNAP Research Group, CMU Portugal Collaboration Grants: NSF, Intel, Google Faculty Awards

Mirjana Stojilovicمشاهده پروفایل

پژوهشگر

• Field-programmable technology
• Electronic design automation (EDA)
• Hardware security
• +۵ مورد دیگر

Mirjana Stojilovic is a Researcher at École Polytechnique Fédérale de Lausanne (EPFL) in the School of Computer and Communication Sciences (IC), specifically within the Institute of Computer Engineering (IINFCOM) and the Parallel Systems Architecture Laboratory (PARSA). She also serves as a Lecturer in the SSC - Teaching department at EPFL. Her office is located at INJ 235, Station 14, 1015 Lausanne, Switzerland. Mirjana Stojilović received her Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. Her academic journey includes collaborating with the Processor Architecture Laboratory at EPFL as a Guest Researcher from 2010 to 2013, working at the University of Applied Sciences Western Switzerland as a senior researcher from 2013 to 2016, and joining the Parallel Systems Architecture Lab at EPFL in October 2016. Dr. Stojilovic's research spans field-programmable technology, electronic design automation (EDA), and electrical-level attacks and countermeasures for reconfigurable hardware. Her work bridges the gap between hardware design and security, with a particular focus on vulnerability analysis and protection mechanisms for FPGA-based systems in cloud environments. She has made significant contributions to understanding side-channel attacks, fault injection techniques, and secure multi-tenancy solutions for shared hardware resources. Her extensive publication record reveals a clear research trajectory from traditional FPGA design and EDA topics toward increasingly security-focused investigations. Recent work demonstrates deep expertise in power analysis attacks, hardware trojans, and countermeasures for cloud-based FPGA systems, reflecting the growing importance of hardware security in distributed computing environments. Scientific Awards and Recognitions: Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016) Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016) Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012) EPFL School of Computer and Communication Sciences (IC) Teaching Award (2015) Nominated for Best Paper Award at the International Conference on Field-Programmable Technology (FPT) (2020) Dr. Stojilovic has advised numerous PhD students including Coulon Louis, Pirayadi Rouzbeh, and Shrivastava Shashwat, along with past EPFL PhD students Glamocanin Ognjen and Mahmoud Dina. She has supervised dozens of semester and diploma projects focusing on hardware security, FPGAs, design automation, side-channel attacks, and cloud computing. Her service to the academic community includes serving on program committees for FPGA, FCCM, FPL, and DATE conferences, reviewing for multiple IEEE and ACM journals, and acting as associate editor for IEEE ESL and ACM TRETS. As a member of the Parallel Systems Architecture Laboratory at EPFL, Dr. Stojilovic leads research projects investigating security aspects of reconfigurable hardware systems. Her team works at the intersection of computer architecture, electronic design automation, and hardware security, with particular emphasis on vulnerabilities and protections for shared FPGA resources in cloud environments.

• Electrical and Electronic Engineering
• Computer Hardware
• Computer Software
• +۷ مورد دیگر

Professor Peter Y. K. Cheung is a Professor of Digital Systems at Imperial College London, holding dual affiliations within the Department of Electrical and Electronic Engineering and the Dyson School of Design Engineering. His work focuses on reconfigurable systems, FPGA architectures, and high-level synthesis tools. He co-founded one of the UK's leading FPGA research groups with Professor Wayne Luk, addressing challenges in variability mitigation, reliability, and application-specific FPGA deployments. His research spans Field-Programmable Gate Arrays (FPGAs) Reconfigurable computing Neural network acceleration Cryptographic protocols Embedded systems He has pioneered techniques such as logic shrinkage for FPGA-based neural networks and developed frameworks like LUTNet for efficient inference. His contributions also include fault-tolerant FPGA designs and methodologies for distributed computation protocols. Key collaborations include work with the Department of Computing on FPGA-based AI acceleration and cybersecurity applications. His recent work explores edge computing, secure decentralized systems, and pandemic modeling using adaptive control strategies. Notable projects include the DSCS protocol for secure distributed computation, acceleration of gravitational wave detection algorithms, and energy-efficient CNN implementations. His research bridges hardware-software co-design with real-world applications in healthcare, finance, and aerospace.

Westley Weimerمشاهده پروفایل

استاد

• Automated Program Repair
• Software Engineering
• Programming Languages
• +۱۸ مورد دیگر

Westley Weimer is a Professor in the Department of Electrical Engineering and Computer Science (EECS) at the University of Michigan, College of Engineering. He teaches advanced courses such as EECS 590 (Advanced Programming Languages) and EECS 481 (Software Engineering), and has previously taught at the University of Virginia. His research integrates software engineering, programming languages, and cognitive science, focusing on automated program repair, program analysis, and the neuroscience of code comprehension. University: University of Michigan School: College of Engineering Department: Department of Electrical Engineering and Computer Science Academic Rank: Professor His research interests include automated program repair (e.g., GenProg), software quality, cognitive modeling of programming, neuroimaging studies of code review, and the application of medical imaging to software engineering. He explores deep questions at the intersection of consciousness, time, and computation, advocating for interdisciplinary approaches to understanding the mind through programming behavior. The most recent publications reflect a trend toward empirical and cognitive studies in software engineering, combining automated repair with human factors, neuroimaging (fMRI, TMS), and real-world software challenges. Themes include bias in code review, programming under cognitive influences, and the neurological basis of code comprehension. His work increasingly bridges computer science with psychology, neuroscience, and social science. Scientific awards include multiple Distinguished Paper Awards at ICSE, FSE, and ESEC/FSE, Best Paper and Runner-up awards, and several 10-Year Most Influential Paper Awards from ASE, GECCO, POPL, and ASPLOS, recognizing the lasting impact of his contributions to automated software repair and program analysis. He has advised numerous PhD and Master’s students, many of whom have gone on to faculty positions or industry research roles. He contributes to academic service through organizing diversity and inclusion initiatives, maintaining graduate career resources, and promoting ethical and inclusive practices in computing. He leads a vibrant research group focused on improving software quality through both technical and human-centered innovations, with ongoing projects in automated repair, cognitive modeling, and secure systems.

• Electrical Engineering
• Power Systems
• Renewable Energy
• +۵ مورد دیگر

Professor Grahame Holmes is an Honorary Professor in the School of Engineering at RMIT University, Australia. His expertise spans electrical energy conversion, smart energy systems, renewable energy integration, power electronics, and grid infrastructure. He focuses on advancing technologies for sustainable energy storage, grid stability, and high-efficiency power conversion. Research Interests : Electrical and Electronic Engineering, Communications Technologies, Power Electronics, Renewable Energy Systems, and Grid Integration Solutions. His work emphasizes practical applications such as hydrogen energy storage systems, grid-interactive inverters, and modular multilevel converters. Recent Contributions : Prof. Holmes has published extensively on topics like advanced PWM techniques, resonant current controllers, and DC transformer designs. His research bridges theoretical advancements with real-world implementations, addressing challenges in smart grid stability and high-frequency power conversion. Advising & Grants : Supervised projects include 'Hydrogen Energy Storage System for Nanogrid' (2015) and 'Synchronised Control of Grid-Interactive Inverters' (2015). While specific grant details are not listed, his work aligns with major themes in sustainable energy research. Labs & Collaborations : Engages in collaborative research through RMIT's facilities, focusing on hardware-software co-simulation frameworks and FPGA-based real-time systems.

Callie Haoمشاهده پروفایل

استادیار

• Software/Hardware Co-design
• Reconfigurable Computing
• Graph Computing
• +۵ مورد دیگر

Callie Hao is an Assistant Professor in the Department of Electrical and Computer Engineering at the Georgia Institute of Technology since 2021, holding the ON Semiconductor Junior Professorship. Her research bridges hardware efficiency and algorithmic innovation with significant industry and federal recognition. Education: Ph.D. in Electrical Engineering, Waseda University (2017) M.S. and B.S. in Computer Science and Engineering, Shanghai Jiao Tong University Research Focus: Dr. Hao pioneers software/hardware co-design for edge AI, specializing in hardware-efficient machine learning algorithms, FPGA-based reconfigurable computing, graph neural networks, and electronic design automation (EDA). Her work emphasizes neural architecture search, high-level synthesis optimization, and memory-efficient systems for embedded and IoT applications, driven by the philosophy that "1 + 1 > 2" for transformative efficiency gains. Publication Impact: Her 15 most recent publications (2023-2026) reveal a strategic shift toward machine learning-driven EDA tools, with 60% focused on high-level synthesis frameworks and 40% on graph neural network acceleration. Key trends include simulation speed breakthroughs (LightningSim), automated accelerator generation (GNNBuilder), and cryptographic hardware innovations (Cryptonite), predominantly published in top-tier venues like MICRO, ICCAD, and DAC. Awards & Recognition: NSF CAREER Award (2024) and Intel Rising Star Faculty Award (2023) Best Paper Awards at MLCAD 2024 and GLSVLSI 2021 ON Semiconductor Junior Professorship (2025) and Sutterfield Family Early Career Professorship (2022) DAC-SDC competition championships (2018-2020) Mentorship & Funding: Dr. Hao advises 8+ Ph.D. students in the Sharc Lab, with Rishov Sarkar winning the Oscar P. Cleaver Award and Qualcomm Innovation Fellowship. Her research is funded by DARPA (2021) for ultra-light video intelligence systems and supported by industry awards from Amazon and Sony. She actively serves on program committees for DAC, ICCAD, and DATE conferences. Lab Leadership: As director of the Sharc Lab (Software/Hardware Co-design lab), she cultivates interdisciplinary research at the intersection of FPGA design, machine learning, and EDA, requiring expertise in Verilog/HLS, GNNs, and compiler technologies while maintaining strict focus on real-world hardware implementation.