Michael Carbin is an Associate Professor at MIT in the Department of Electrical Engineering and Computer Science (EECS), where he leads the Programming Systems Group at the Computer Science and Artificial Intelligence Laboratory (CSAIL). His research centers on developing programming systems that handle uncertainty through probabilistic programming, quantum computing, and neural networks. Carbin's work spans programming languages, systems, and machine learning, with themes including uncertainty management, efficiency optimization, and formal verification. His publications demonstrate a strong focus on probabilistic inference methods, neural network optimization, and quantum programming frameworks. Awards and Honors: Sloan Research Fellowship (2020) Multiple Best Paper Awards (OOPSLA 2013, 2014; ICLR 2019) NSF CAREER Award (2018) Google Faculty Research Award (2018) As the head of the Programming Systems Group, he advises 10+ graduate students and postdocs, focusing on cutting-edge systems research. He has secured grants including Facebook Research Awards and NSF funding.
Stefanos Gritzalis is a Professor of Information and Communication Systems Security at the University of Piraeus, Greece (2019+), leading the Lab. of Systems Security. Previously, he served as Rector of the University of the Aegean (2014-2018) and held academic roles at the University of the Aegean, including Professor and Head of the Department of Information and Communication Systems Engineering. His expertise spans cybersecurity, privacy, and regulatory compliance, particularly in cloud computing and IoT. He is a member of the Hellenic Authority for Communication Security and Privacy and the National Commission for Human Rights (2024+). Education includes a BSc in Physics, MSc in Electronic Automation, and PhD in Information and Communications Security from the University of Athens. His research focuses on cybersecurity, privacy preservation, and GDPR compliance, with over 336 publications, including 14 books and 37 chapters. He has an h-index of 55 and is ranked in the top 2% of global ICT researchers (Elsevier, 2024). He serves as Area Editor for IEEE Communications Surveys and Tutorials , and has edited 35 journals. He has supervised 17 PhD theses and over 150 Master’s and 300 BSc theses. His work includes designing privacy-aware systems and frameworks for cloud forensics, with grants exceeding €6 million. He advises on EU-funded projects and evaluates proposals for global research bodies like the ERC and Swiss National Science Foundation. His contributions to policy include co-creating Greece’s Open Government Partnership National Action Plan and advising on digital transformation strategies. He promotes cybersecurity education through gamification and has published on privacy literacy initiatives.
Wei Yang is an Associate Professor in the Department of Computer Science at the University of Texas at Dallas, actively contributing to software engineering research through program committee roles at ICSE, FSE, ASE, and ISSTA conferences since 2015. His research focuses on software testing innovation , particularly in mobile security, GUI testing, and AI-driven test automation. Key contributions include frameworks for malware analysis (MalScan), UI exploration (Guardian, Vet), and neural network testing (DeepPerform, EREBA), addressing critical challenges in test oracle generation, flaky tests, and resource-constrained environments. Recent work demonstrates a strategic shift toward LLM and foundation model applications for testing, with 2023-2026 publications exploring vision-language models for GUI testing, parameter ownership in collaborative AI development, and instruction alignment in large language models. This evolution reflects the field's broader trajectory toward AI-integrated quality assurance.
Michael F. P. O'Boyle is a Professor of Computer Science at the University of Edinburgh's School of Informatics. He is a leading researcher in compiler technology, specializing in optimizing compilation, machine learning for compilation, and heterogeneous systems. His work addresses the critical challenges of compiling software for increasingly diverse hardware architectures in the post-Moore's Law era. Professor O'Boyle's research interests focus on: Optimizing compilation techniques Machine learning applications in compilation Heterogeneous computing systems Program synthesis Neural machine translation for code Hardware/software co-design His recent publications demonstrate a strong focus on tensor optimization, compiler infrastructure for heterogeneous systems, and machine learning applications in program analysis and transformation. O'Boyle's work bridges traditional compiler techniques with modern AI-driven approaches to code optimization, addressing the growing complexity of hardware-software interfaces. Professor O'Boyle has received several notable honors and awards: ACM CGO Test of Time award (2017) Senior EPSRC Research Fellow Fellow of the British Computer Society (BCS) He holds significant leadership roles including Director of the ARM Research Centre of Excellence at Edinburgh and Director of the EPSRC Centre for Doctoral Training in Pervasive Parallelism. O'Boyle is also a founding member of HiPEAC, a European network for high-performance and embedded architecture and compilation, and has delivered keynote addresses at major conferences including PPoPP 2019 where he presented his vision for "Rethinking Compilation in a Heterogeneous World."
Sotirios Xydis is an Assistant Professor in the Division of Computer Science at the School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), with prior faculty appointment at Harokopion University of Athens (2020-2023). He maintains ongoing collaboration with the Institute of Communication and Computer Systems (ICCS) since 2014 and previously served as an engineer at HEDNO (2015-2018) and postdoctoral researcher at Politecnico di Milano (2011-2013). His academic credentials include: BSc in Electrical and Computer Engineering, NTUA (2005) MSc in Techno-Economic Systems, NTUA (2011) PhD in Electrical and Computer Engineering, NTUA (2011) Dr. Xydis specializes in hardware/software co-design , energy-efficient hardware acceleration , and memory management for embedded and cloud-edge systems. His research bridges low-power circuit design , heterogeneous architecture optimization , and resource management frameworks , with particular emphasis on AI workloads and serverless infrastructures. Current projects target Edge AI accelerators (CONVOLVE), disaggregated memory systems, and LLM inference optimization through hardware-aware algorithms. Analysis of his 2023-2025 publications reveals three dominant trends: (1) Energy-efficient hardware accelerators for Edge AI using approximate computing techniques, (2) Memory/resource management innovations for disaggregated serverless environments, and (3) GPU/FPGA optimization for LLM inference through dynamic frequency scaling and predictive throttling. These works consistently address the power-performance tradeoffs in heterogeneous computing systems. His scientific recognition includes: Best Paper Award, IEEE/NASA/ESA AHS (2007) Best Paper Award, ACM PARMA (2013) Best Paper Award, ACM Computing Frontiers (2020) Hipeac Award at DAC (2019, 2020) Dr. Xydis has secured over 15 European/national research grants as Principal Investigator and Technical Coordinator, focusing on hardware acceleration frameworks and energy-efficient computing. His advising encompasses graduate research in hardware design and optimization, though specific student names aren't publicly listed. Current projects include CONVOLVE for Edge AI and CollectiveHLS for collaborative hardware synthesis. He is a core member of NTUA's Microelectronics Laboratory (Microlab) and collaborates with ICCS on hardware acceleration projects. His team develops frameworks like CollectiveHLS and throttLL'eM, with active participation in DATE, DAC, and ISCA conference communities.
Dr. Zhenman Fang is an Associate Professor in the School of Engineering Science (Computer Engineering Option) and Associate Member in the School of Computing Science at Simon Fraser University, Canada. He founded and directs the HiAccel Lab, focusing on accelerator-rich architectures. His PhD (2014) is from Fudan University, China, with 15 months spent at the University of Minnesota. Prior to SFU, he was a Staff Software Engineer at Xilinx (2017-2019) and a postdoc at UCLA (2014-2017). His research spans: Hardware acceleration for ML, big data, genomics, and HPC FPGA-based customizable computing and near-data processing Compiler/runtime systems for heterogeneous platforms Performance/reliability optimization of accelerator-rich systems His recent publications (2024-2025) focus on FPGA acceleration for machine learning (e.g., on-device training, quantization), computational chemistry, image/video compression, database systems, and reconfigurable computing, demonstrating cross-domain applications of specialized hardware. Awards & Honors: Best Paper Awards: FPL 2024, MEMSYS 2017, TCAD 2019 Best Paper Nominations: ICCAD 2025, FCCM 2025, HPCA 2017, ISPASS 2018 SFU Research Excellence Horizon Award (2025) NSERC Alliance, CFI JELF, and Xilinx University Awards He advises 20+ PhD/Master's students in HiAccel Lab, focusing on accelerator design. Major grants include NSERC Alliance (2020) and CFI JELF (2019). The lab operates a 10-node cluster with FPGA/GPU infrastructure.
Fabrice Rastello is a leading researcher at Inria, France, where he serves as the leader of the CORSE (Compiler Optimization and Runtime SystEms) research team. His expertise spans automatic parallelization and compiler back-end optimization, with significant contributions to Static Single Assignment (SSA) form theory and register allocation techniques. Affiliated with University Grenoble Alpes - Inria - CNRS - Grenoble INP - LIG, he maintains an active research profile with continuous publications in top-tier conferences including PLDI, CGO, and PPoPP. His research interests focus on combining theoretical foundations with practical applications in compiler design. Key areas include automatic parallelization techniques (building on his PhD work on tiling as a loop transformation), compiler back-end optimization, and the emerging field of hybrid compilation that bridges static compilation with runtime techniques. He has made significant contributions to register allocation for JIT compilation in the context of SSA properties, advising three PhD students on related topics. Analysis of his recent publications reveals a strong trend toward data movement optimization, with numerous papers on I/O complexity bounds, cache modeling, and microarchitectural performance analysis. His work spans both theoretical computer science and practical applications, including contributions to healthcare technology during the pandemic with the eSpiro ventilator project. He has also explored intersections between compiler techniques and machine learning, particularly in using ML for performance modeling. Fabrice Rastello serves on program committees for major conferences in the field, including PLDI, CGO, and CC, demonstrating his standing in the research community. His 2022 book 'SSA-based Compiler Design' as editor further establishes his authority in compiler theory and practice. His recent work shows continued innovation in compiler techniques, with publications in 2024 demonstrating ongoing research activity across multiple domains including cache modeling, program analysis, and machine learning applications.
Panagiotis Alefragis is an Associate Professor at the Department of Electrical Engineering and Electronics, University of Peloponnese. He holds a diploma and PhD from the Electrical and Computer Engineering Department of the University of Patras. With 25+ years of experience, his expertise spans software engineering, optimization algorithms, parallel processing, and compiler design. Research interests include optimization algorithms, parallel/distributed systems, programming languages, combinatorial optimization, metaheuristics, and high-speed digital infrastructures for IoT/smart cities. He led projects like FP7 ALMA and H2020 ARGO, and managed Lyseis Ltd, a software firm for airline optimization solutions (clients: Lufthansa AG, AIMS). Publications focus on AI-driven labor market analysis, job posting classification, and acoustic modeling. He has contributed to over 50 peer-reviewed articles and actively participates in EU research programs.
David Gregg is a Professor in the Department of Computer Science at Trinity College Dublin's School of Computer Science and Statistics, where he serves as Global Director for Computer Science (since 2020) and previously as Head of the Discipline of Software and Systems (2018-2022). His research focuses on software performance optimization and embedded systems, with particular expertise in accelerating deep neural networks on resource-constrained platforms. He teaches Systems Programming (CS2014/5) and Concurrent Systems I (CS3014). Gregg's research spans multiple areas of computer systems including: Compiler optimization and program analysis Processor microarchitecture and parallelism (multi-core, vector, instruction-level) Computer arithmetic and domain-specific languages Low-energy embedded systems and FPGA implementations Deep neural network acceleration He has served on numerous program committees including PACT, PLDI, CC, and other major computer systems conferences, and has been on the Board of Distinguished Reviewers for ACM TACO multiple times. Professor Gregg has advised numerous PhD and MSc students, many of whom have gone on to prominent positions at companies like Intel-Movidius, Google, Amazon, and Synopsys. He leads the triNNity project which includes optimized libraries and compilers for implementing convolutional neural networks on CPUs.
P. (Saday) Sadayappan is a Professor at the University of Utah's School of Computing, specializing in high-performance computing and compiler optimizations. His research focuses on performance optimization for parallel systems, particularly for tensor computations, sparse matrix operations, and machine learning workloads. He leads multiple NSF and DARPA-funded projects focused on GPU optimization, tensor computations, and scalable machine learning frameworks. Research Interests: Dr. Sadayappan's work spans compiler optimizations for high-performance systems, optimization of sparse/dense matrix/tensor computations, scalable machine learning, and algorithm-architecture co-design. His recent projects include developing performance-portable frameworks for tensor applications and optimizing data locality for scientific computing. Publication Trends: His recent publications (2020-2022) predominantly focus on GPU acceleration of machine learning workloads (especially CNNs), automated I/O complexity analysis, and optimization techniques for sparse matrix/tensor operations. Earlier work (2018-2019) established foundations in GPU code generation for tensor contractions and cache optimization. Awards and Honors: ACM SIGPLAN Most Influential PLDI Paper Award (2018) for A Practical Automatic Polyhedral Parallelizer and Locality Optimizer Active Grants and Projects: NSF: A Comprehensive Framework for Efficient, Scalable, and Performance-Portable Tensor Applications (2022-2027) NIH SBIR: Enabling next generation machine learning for large scale image analysis (2023-2025) NSF: AI Institute for Intelligent CyberInfrastructure (ICICLE) (2021-2026) NSF: Data Locality Optimization for Sparse Matrix/Tensor Computations (2020-2024) DARPA SBIR: Performance Portable Framework for Developing Graph Applications (2017-2022) Teaching: He currently teaches CS 4230/6230 (Parallel and High-Performance Computing) at the University of Utah.
George Manis is an Associate Professor in the Department of Computer Science and Engineering at the School of Engineering, University of Ioannina, Greece. He is a member of the IPAN lab and serves as a Guest Editor for a special issue on 'Entropy in Biomedical Engineering' in the journal Entropy . His research bridges biomedical engineering and computational systems, with a strong focus on entropy-based methods and machine learning for physiological signal analysis. PhD in Computer Science, National Technical University of Athens (1993–1997) MSc in Advanced Methods in Computer Science, Queen Mary, University of London (1992–1993) Diploma in Electrical and Computer Engineering, National Technical University of Athens (1987–1992) His primary research interests include Biomedical Engineering , Entropy Analysis (especially Bubble Entropy), Fast Computation Algorithms , Biomedical Data Classification , Heart Rate Analysis , and Computing Systems with emphasis on parallelization. He teaches postgraduate courses in data analysis and biomedical data processing, and undergraduate courses in compilers. The analysis of his recent publications reveals a consistent trend in developing computationally efficient and robust methods for entropy estimation and classification in biomedical contexts. His work on Bubble Entropy eliminates the need for scale parameters and enhances stability, while his improvements to Random Forests and Support Vector Machines target enhanced diagnostic accuracy in diseases like Alzheimer’s and heart conditions. In computing systems, he has pioneered compiler technologies for parallelizing recursive functions and optimizing runtime scheduling. No scientific awards are explicitly mentioned in the provided text. George Manis has advised or collaborated with several researchers, including Evanthia Tripoliti, Dimitrios Fotiadis, Petros Arsenos, Argyro Kampouraki, and others, indicating active supervision and research leadership. He is currently involved in funded projects such as Palimpsest , an interactive museum system, and Homore , a smart monitoring system for elderly individuals. These projects reflect his interest in applying advanced computing to real-world biomedical and societal challenges. He is affiliated with the IPAN lab and contributes to the development of innovative algorithms for entropy computation and parallel processing. His work on the C2μTC/SL compiler and Ariadne system demonstrates deep expertise in compiler design for specialized architectures like the SVP processor.
Yufei Ding is an Associate Professor in the Computer Science & Engineering Department at the University of California, San Diego (UCSD), where she leads the PICASSO Lab. Her research spans domain-specific language design, architecture and compiler optimization, and hardware acceleration, with current focus on developing high-performance, energy-efficient, and high-fidelity programming frameworks for quantum computing and machine learning. Dr. Ding received her Ph.D. in Computer Science from North Carolina State University and a B.S. in Physics from the University of Science and Technology of China. Her interdisciplinary background bridges physics and computer science, enabling her to tackle challenges in emerging computing paradigms. Her research interests focus on Compiler Technology, Machine Learning, and Quantum Computing , with specific expertise in domain-specific language design, architecture and compiler optimization, and hardware acceleration. Dr. Ding's work addresses critical challenges in programming frameworks for emerging technologies, particularly in making quantum computing more accessible and efficient through innovative compiler techniques and runtime systems. Dr. Ding's scientific contributions have been recognized with prestigious awards including the NSF CAREER Award (2020) and the IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High-Performance Computing (2019) . As an active researcher and educator, Dr. Ding serves on program committees for major conferences including PLDI, PPoPP, and SPLASH. She currently has Ph.D. openings in quantum computing and machine learning systems research, as well as a postdoc position in quantum computing for physics Ph.D. candidates with relevant background. Dr. Ding founded and leads the PICASSO Lab at UCSD, which focuses on developing innovative solutions for programming emerging computing technologies. The lab's work bridges theoretical foundations with practical implementations to address real-world challenges in high-performance computing.
Fredrik Kjolstad is an Assistant Professor in the Department of Computer Science at Stanford University, specializing in compilers and programming models for sparse computing and performance engineering. His research focuses on separating algorithms from data representations to enable portable applications across diverse hardware platforms. His research interests span compilers, programming models, performance engineering, and computer architecture, with particular emphasis on sparse tensor algebra, compiler design for heterogeneous systems, and high-performance computing. He has pioneered frameworks like TACO, Simit, and Distal that enable efficient sparse computations across CPUs, GPUs, and specialized accelerators. Dr. Kjolstad's publications demonstrate expertise in compiler optimization techniques for sparse data structures, tensor algebra, and distributed systems. His work consistently addresses the challenge of bridging high-level programming abstractions with efficient hardware execution across diverse architectures. MIT EECS First Place George M. Sprowls PhD Thesis Award NSF CAREER Award Rosing Award Adobe Fellowship Google Research Scholarship Best Paper Awards at EuroMPI 2013, OOPSLA 2017, and OOPSLA 2021 ISCA Distinguished Artifact Award PLDI and OOPSLA Distinguished Paper Awards He advises multiple PhD students including James Dong, Olivia Hsu, and Rohan Yadav, while leading research on compiler technologies that have received significant grant support. His group develops practical tools like the TACO compiler and Legate Sparse that are used in both academic and industrial settings. Current projects focus on programmable accelerators for sparse tensor algebra, distributed sparse computing, and compiler support for emerging hardware architectures.
Jaejin Lee is a Professor in the Department of Computer Science and Engineering at Seoul National University (SNU) and serves as the Director of the Center for Manycore Programming and Multicore Computing Research Laboratory. He holds a BS in Physics from SNU (1991), an MS in Computer Science from Stanford University (1995), and a PhD in Computer Science from the University of Illinois at Urbana-Champaign (1999), where his research was supported by IBM and Korea Foundation for Advanced Studies fellowships. Research Focus: His work centers on heterogeneous computing systems with expertise in GPU/FPGA programming, deep learning compiler architectures, PyTorch/TensorFlow optimization, and quantum computing simulation environments. Key areas include parallelization techniques and performance enhancement for machine learning frameworks. Publications: His research output demonstrates consistent focus on GPU efficiency, compiler-directed optimizations, and distributed computing, with recent emphasis on deep learning acceleration and error resilience in heterogeneous architectures. Awards & Honors: IEEE Fellow IBM Graduate Fellowship Korea Foundation for Advanced Studies Graduate Fellowship Leadership: Directs the Multicore Computing Research Laboratory and Center for Manycore Programming, focusing on next-generation parallel computing architectures.
Fernando Magno Quintão Pereira is an Associate Professor at the Federal University of Minas Gerais (UFMG), Brazil, specializing in compiler design and program analysis. His academic journey began with a Ph.D. from UCLA in 2008 under Jens Palsberg's supervision, establishing his foundation in compiler research. His research focuses on compilers , with core expertise in code generation , compiler optimizations , and static program analyses . Recent work explores quantum compilation, binary analysis, and security-aware compilation techniques. His publications reveal consistent contributions to major conferences including PLDI, CGO, and SPLASH, with emphasis on practical optimization frameworks and theoretical compiler advancements. Analysis of his 15 most recent publications (2020-2026) shows dominant themes in binary optimization (e.g., AnghaBench), security-aware compilation (e.g., Memory-Safe Elimination of Side Channels), and emerging architecture support (e.g., Quantum Computing Compilation). His work bridges theoretical compiler principles with real-world systems challenges. He actively contributes to the academic community through: Program committees for PLDI (2020-2025), CGO (2021-2026), and SPLASH conferences Leadership roles including CGO Finance Chair (2026) and PLDI Diversity & Inclusion Co-Chair (2023-2024) Organizing JENSFEST 2024 and serving on multiple conference steering committees Pereira maintains an active research group evidenced by continuous publication output and conference leadership, with his personal website ( homepages.dcc.ufmg.br/~fernando/ ) serving as a hub for his academic activities.
