جست‌وجوی استاد و پژوهشگر

Xiangyu Zhangمشاهده پروفایل

استاد

• AI Security
• Software Engineering
• Programming Languages and Compilers
• +۵ مورد دیگر

Xiangyu Zhang is the Samuel D. Conte Professor of Computer Science at Purdue University. He specializes in AI security, software analysis, and cyber forensics, with a focus on detecting vulnerabilities in traditional software and AI systems. His research includes dynamic slicing, program profiling, and securing AI models against backdoors. He has led projects funded by DARPA, IARPA, NSF, and industry, securing over $13 million in grants. He has mentored 30+ PhD students and postdocs, many of whom hold academic positions or industry roles. His work has been recognized with awards like the ACM SIGPLAN Distinguished Dissertation Award and NSF Career Award. Education: PhD, Computer Science, University of Arizona (2006) MS & BS, Computer Science, University of Science and Technology of China (2000 & 1998) Research Interests: AI Security: backdoor detection, adversarial attacks, model integrity Program Analysis: dynamic slicing, static/dynamic debugging Cyber Forensics: log analysis, attack investigation Software Reliability: fault localization, vulnerability detection Key Projects: DARPA V-SPELLS: domain-specific program analysis IARPA TrojAI: AI backdoor detection competitions NSF-funded research on model debugging and co-reasoning of software/NL artifacts Awards & Recognition: Top performer in IARPA TrojAI competitions (13/18 rounds) ACM SIGPLAN Distinguished Dissertation Award (2006) NSF Career Award (2009) Ranked 8th globally in systems research productivity (2024) Career Contributions: Secured over $13M in research funding Guided 25 PhDs and 8 postdocs Published 89+ top-tier papers (2014–2024)

James C. Hoeمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +۴ مورد دیگر

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

Zhonghai Luمشاهده پروفایل

استاد

• Computer Architecture
• Embedded Systems
• Network-on-Chip (NoC)
• +۷ مورد دیگر

Zhonghai Lu is a Professor of Electronic Systems Design (specializing in Dependable and Autonomous Systems) at KTH Royal Institute of Technology, part of the Department of Electrical Engineering in the School of Electrical Engineering and Computer Science (EECS). He serves as Program Director for KTH's Embedded Systems master's program and Director of Studies at the Division of Electronics and Embedded Systems. His research focuses on Network-on-Chip (NoC), computer architecture, embedded systems, and Prognostics and Health Management (PHM) of power electronics. He leads a research group exploring in-network processing and embedded intelligence, transforming passive networks into active computational frameworks. Lu holds a BSc from Beijing Normal University (1989), MSc and PhD from KTH (2002, 2007), and an MBA in Innovation and Growth from the University of Turku (2012). He has authored over 240 scientific papers, including journal articles and peer-reviewed conferences, with notable recognitions such as Best Paper Awards at NOCS’2015 and EU HiPEAC, and a Featured Paper in IEEE Transactions on Computers (2020). He serves as Associate Editor for ACM Transactions on Architecture and Code Optimization (TACO) and has chaired major conferences like HiPEAC’2017 and NOCS’2018. His research group’s recent work includes integrating AI into hardware acceleration, fault-tolerant neural networks, and RUL estimation for power electronics using recurrent neural networks. Lu has secured grants from the Swedish Research Council and Intel Corporation and developed courses like IL2230 (Hardware Architectures for Deep Learning) and IL2233 (Embedded Intelligence), pioneering embedded AI education at KTH. Education: BSc (Beijing Normal University), MSc/PhD (KTH), MBA (University of Turku) Awards: Best Paper Awards (NOCS, EU HiPEAC), Swedish Research Council Grants, Intel Research Gifts Labs/Teams: Research Group on In-Network Processing and Embedded Intelligence

Zhenman Fangمشاهده پروفایل

دانشیار

• Customizable Computing
• Heterogeneous Computing
• FPGA Acceleration
• +۸ مورد دیگر

Dr. Zhenman Fang is an Associate Professor at the School of Engineering Science , Simon Fraser University (SFU) , where he founded and directs the HiAccel Lab . He also holds an associate membership in the School of Computing Science at SFU. His research focuses on customizable computing with software-defined hardware acceleration , addressing performance, energy-efficiency, and reliability in post-Moore’s law computing across domains like machine learning , big data analytics , quantum chemistry , and precision medicine . Education: Ph.D. in Computer Science from Fudan University (2014), with a visit to University of Minnesota during his studies. Postdoctoral Work: University of California, Los Angeles (UCLA) (2014-2017). Industry Experience: Staff Software Engineer at Xilinx (2017-2019). Dr. Fang’s research spans the entire computing stack , including application characterization , accelerator-rich architecture design , and programming/tool support . He has developed frameworks like HiSpMV , SyncNN , and SQL2FPGA , emphasizing FPGA acceleration for vision transformers , quantum chemistry , and spiking neural networks . His work has been recognized with 3 best paper awards (FPL 2024, TCAD 2019, MEMSYS 2017) and 3 best paper nominees (FCCM 2025, HPCA 2017, ISPASS 2018). Recent publications highlight trends in low-precision machine learning ( ShiftQuant , ESRU ), quantum chemistry acceleration ( SERI ), and vision transformer optimization ( Quasar-ViT ). His HiAccel Lab actively mentors PhD and MASc students , with notable graduates like Alec Lu (PhD 2024, now at Meta) and Philip Stachura (MASc, now with BC Graduate Scholarship). Scientific Awards: Inaugural SFU Research Excellence Award - Horizon Award (2025) FPL 2024 Stamatis Vassiliadis Best Paper NSERC Alliance Award (2020) CFI JELF Award (2019) Xilinx University Program Award (2019) IEEE Senior Member (2023) Grants: NSERC Discovery Grant (2019) CFI JELF Funding (2019) Huawei and Xilinx sponsorships Dr. Fang leads open-source initiatives like SyncNN , PASTA , and SQL2FPGA , and serves as General Chair for ASAP 2025 and Program Co-Chair for RAW 2025 . His lab collaborates globally with institutions such as UCLA , Northeastern University , and Xidian University .

Joey Paquetمشاهده پروفایل

دانشیار

• Design and implementation of programming languages
• Context-driven computing
• Demand-driven computing

Dr. Joey Paquet is a Tenured Associate Professor and Department Chair in the Department of Computer Science and Software Engineering at Concordia University in Montreal, Canada. He holds a PhD and specializes in research areas including Design and Implementation of Programming Languages, Context-Driven Computing, and Demand-Driven Computing. His work focuses on advancing programming paradigms and their applications in cybersecurity, distributed systems, and autonomic computing. Dr. Paquet is actively involved in thesis supervision across Computer Science and Software Engineering programs at both master's and doctoral levels. Research interests are centered around programming language design, particularly in demand-driven and context-aware systems. His contributions include frameworks like GIPSY and OpenISS, enabling scalable data processing and forensic computing. Recent work explores autonomic intent-driven networking, real-time gesture recognition, and IoT forensics. These efforts highlight his expertise in both theoretical constructs and practical implementations. His advising role supports students in MCompSc, MASc, and PhD programs. While specific grants are not detailed, his projects often involve interdisciplinary collaboration. Dr. Paquet is affiliated with platforms like LinkedIn and ResearchGate, reflecting an active academic presence. Key technical contributions include pioneering work on forensic computing backends, intent expression languages, and multimodal interaction systems. His research addresses challenges in cybersecurity, distributed systems, and service composition, with a focus on resilience and scalability.

Marco Platznerمشاهده پروفایل

استاد

• Reconfigurable Computing
• Approximate Computing
• Self-Aware Computing
• +۷ مورد دیگر

Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.

Tulika Mitraمشاهده پروفایل

استاد

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +۷ مورد دیگر

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

• Computer Architecture
• Machine Learning
• Approximate Computing
• +۳ مورد دیگر

Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture

• Computer Hardware
• FPGA Acceleration
• Artificial Intelligence
• +۸ مورد دیگر

Professor Wayne Luk is a Professor of Computer Engineering at the Department of Computing, Faculty of Engineering, Imperial College London. He leads the Programming Languages and Systems Section and the Custom Computing Research Group, and directs the EPSRC Centre for Doctoral Training in High-performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. He previously served as a Visiting Professor at Stanford University from 2006 to 2009. His research spans FPGA acceleration, quantum computing, deep learning optimization, and algorithm-hardware co-design, with affiliations to the CRUK Convergence Science Centre and the Engineering Secure Software Systems group. His research interests include computational modeling for particle physics, causal discovery in agent-based systems, and high-throughput digital electronics. Notable contributions include FPGA-accelerated algorithms for neural networks, quantum circuit simulation, and Bayesian optimization frameworks. His work emphasizes practical applications of reconfigurable hardware in fields like medical imaging, high-energy physics, and financial systems. Professor Luk is a Fellow of the Royal Academy of Engineering, IEEE, and BCS. His publications focus on advancing hardware-aware machine learning, FPGA-based acceleration techniques, and scalable design methodologies. His research bridges theoretical computer science with applied engineering, addressing challenges in real-time systems, embedded computing, and next-generation computing architectures. His academic leadership includes directing interdisciplinary centers and training programs, fostering collaboration across computing, engineering, and physics. Current projects explore quantum computing tools, causal inference systems, and high-performance graph neural networks for particle physics applications.

Andrew Riceمشاهده پروفایل

استاد

• Programming Languages
• Machine Learning
• Artificial Intelligence
• +۴ مورد دیگر

Andrew Rice is a Professor of Computer Science at the University of Cambridge's Department of Computer Science and Technology, and holds the Hassabis Fellowship in Computer Science. He is also the Director of Studies in Computer Science at Queens' College. His research focuses on programming languages, software engineering, and machine learning applications in software development. He leads projects like Isaac Computer Science and ALTA (Automated Language Teaching and Assessment), advancing adaptive learning technologies. His work includes static analysis tools such as Error Prone at Google, energy efficiency studies in computing infrastructure, and contributions to the Computing for the Future of the Planet initiative. His teaching emphasizes practical skill development through flipped classrooms and video lectures, earning him the 2014 Pilkington Prize for teaching excellence. He has held visiting roles at Google and collaborated on energy consumption research for mobile devices and data centers. His research spans systems, networking, and natural language processing, with a strong focus on applying computational methods to real-world challenges. Key Projects: Isaac Physics/Computer Science, ALTA, Error Prone Static Analysis Research Themes: Programming Languages, Machine Learning, Energy Efficiency Awards: Pilkington Prize (2014)

Jason Congمشاهده پروفایل

استاد

• Electronic Design Automation
• VLSI CAD
• FPGA Synthesis
• +۶ مورد دیگر

Jason Cong is the Volgenau Chair for Engineering Excellence and Distinguished Chancellor's Professor in the Computer Science Department at UCLA's Samueli School of Engineering. He directs the Center for Domain-Specific Computing (CDSC) and the VLSI Architecture, Synthesis, and Technology (VAST) Laboratory, and serves as Associate Vice Provost for Internationalization and Co-Director of UCLA/PKU Student and Scholar Program. Dr. Cong's research spans electronic design automation, customizable computing for machine learning and big-data applications, quantum computing, and highly scalable algorithms. His work has produced over 500 publications with more than 41,000 citations and an H-index of 106. His recent work focuses on quantum computing compilation, domain-specific acceleration for AI workloads, and high-level synthesis optimization techniques that leverage machine learning. His publication trend shows a strong emphasis on quantum computing and machine learning acceleration in recent years, with numerous papers on quantum layout synthesis, LLM acceleration, and high-performance FPGA implementations. His team has developed frameworks like TAPA for task-parallel dataflow programming and RapidStream for automated parallel implementation of FPGA designs. Member of National Academy of Engineering (2017) IEEE Robert N. Noyce Medal recipient (2022) Phil Kaufman Award recipient (2024) ACM Chuck Thacker Breakthrough Award recipient (2024) 18 Best Paper Awards across major conferences Multiple 10-Year Retrospective Most Influential Paper Awards Dr. Cong has graduated 50 PhD students, many of whom are now faculty at major research universities or hold key positions at leading tech companies. He has led over 100 research projects funded by DARPA, NSF, SRC, and industry sponsors. His entrepreneurial activities include founding three successful companies (Aplus Design Technologies, AutoESL, and Falcon Computing Solutions), all acquired by major EDA players. His VAST Laboratory continues to push boundaries in domain-specific computing, with active research in quantum computing, AI acceleration, and high-performance FPGA implementations.

Callie Haoمشاهده پروفایل

استادیار

• Software/Hardware Co-design
• Reconfigurable Computing
• Graph Computing
• +۵ مورد دیگر

Callie Hao is an Assistant Professor in the Department of Electrical and Computer Engineering at the Georgia Institute of Technology since 2021, holding the ON Semiconductor Junior Professorship. Her research bridges hardware efficiency and algorithmic innovation with significant industry and federal recognition. Education: Ph.D. in Electrical Engineering, Waseda University (2017) M.S. and B.S. in Computer Science and Engineering, Shanghai Jiao Tong University Research Focus: Dr. Hao pioneers software/hardware co-design for edge AI, specializing in hardware-efficient machine learning algorithms, FPGA-based reconfigurable computing, graph neural networks, and electronic design automation (EDA). Her work emphasizes neural architecture search, high-level synthesis optimization, and memory-efficient systems for embedded and IoT applications, driven by the philosophy that "1 + 1 > 2" for transformative efficiency gains. Publication Impact: Her 15 most recent publications (2023-2026) reveal a strategic shift toward machine learning-driven EDA tools, with 60% focused on high-level synthesis frameworks and 40% on graph neural network acceleration. Key trends include simulation speed breakthroughs (LightningSim), automated accelerator generation (GNNBuilder), and cryptographic hardware innovations (Cryptonite), predominantly published in top-tier venues like MICRO, ICCAD, and DAC. Awards & Recognition: NSF CAREER Award (2024) and Intel Rising Star Faculty Award (2023) Best Paper Awards at MLCAD 2024 and GLSVLSI 2021 ON Semiconductor Junior Professorship (2025) and Sutterfield Family Early Career Professorship (2022) DAC-SDC competition championships (2018-2020) Mentorship & Funding: Dr. Hao advises 8+ Ph.D. students in the Sharc Lab, with Rishov Sarkar winning the Oscar P. Cleaver Award and Qualcomm Innovation Fellowship. Her research is funded by DARPA (2021) for ultra-light video intelligence systems and supported by industry awards from Amazon and Sony. She actively serves on program committees for DAC, ICCAD, and DATE conferences. Lab Leadership: As director of the Sharc Lab (Software/Hardware Co-design lab), she cultivates interdisciplinary research at the intersection of FPGA design, machine learning, and EDA, requiring expertise in Verilog/HLS, GNNs, and compiler technologies while maintaining strict focus on real-world hardware implementation.

• High-Performance Computing
• Reconfigurable Computing
• FPGA Acceleration
• +۷ مورد دیگر

Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.

Stephen W. Kecklerمشاهده پروفایل

استاد مدعو

• Computer Architecture
• Deep Learning Accelerators
• GPU Computing
• +۴ مورد دیگر

Stephen W. Keckler is an Adjunct Professor at the Department of Computer Science , The University of Texas at Austin , and serves as Vice President of Architecture Research at NVIDIA . He is an ACM Fellow , IEEE Fellow , and Sloan Foundation Research Fellow . Education: BS in Electrical Engineering, Stanford University (1990) SM in Computer Science, Massachusetts Institute of Technology (1992) PhD in Computer Science, MIT (1998) Research Interests focus on computer architecture for deep learning , GPU computing , and energy-efficient systems . His work explores memory compression , network-on-chip designs , and heterogeneous computing . Publication Trends highlight advancements in deep learning accelerators , GPU memory systems , and energy-efficient architectures . Notable themes include sparsity exploitation , multi-chip modules , and fault-tolerant GPU pipelines . Scientific Recognition : ACM Fellow IEEE Fellow Sloan Foundation Research Fellow Best Paper Awards at ASPLOS 2009 and ISPASS 2011 Laboratory Affiliations : Computer Architecture and Technology Laboratory (CART) TRIPS Project (Tera-Op Reliable Intelligently adaptive Processing System) NVIDIA Research

• Energy Efficiency in Software
• Multicore Memory Systems
• Hardware/Software Co-Design
• +۳ مورد دیگر

Arrvindh Shriraman is an Associate Professor and Program Director of Software Systems at Simon Fraser University's School of Computing Science in Surrey. His research focuses on energy-efficient software, multicore memory systems, and optimizing hardware/software interfaces for parallel programming. He holds a Ph.D. (2010) and M.S. (2006) in Computer Science from the University of Rochester, and a B.Eng. (2004) from the University of Madras. He teaches courses on parallel programming and energy-conscious software design. His research interests include synchronization mechanisms for domain-specific architectures, cache optimization, and FPGA-based acceleration. He has contributed to frameworks like Mu-grind for HLS-generated RTL instrumentation and TAPAS for parallel accelerator generation. Notable projects include RANGE-BLOCKS for synchronization in domain-specific systems and TapeFlow for gradient computation in neural networks. His work emphasizes real-time verification of autonomous systems and safety-critical trajectory planning for underwater vehicles. Shriraman collaborates closely with the Tangent Lab, exploring cutting-edge solutions in hardware-software co-design and embedded systems. His teaching and research bridge theoretical computer science with applied engineering challenges, addressing scalability, efficiency, and safety in modern computing systems.