Jae-sun Seo is an Assistant Professor at Arizona State University's School of Electrical, Computer and Energy Engineering (ASU), joining in 2014. He previously worked at IBM T. J. Watson Research Center (2010-2013) and held internships at Intel and Sun Microsystems during his graduate studies. His research focuses on machine learning hardware , neuromorphic algorithms , and power management , with expertise in FPGA acceleration and VLSI design. Key research themes: Hardware acceleration of deep learning via FPGAs Neuromorphic computing with CMOS and resistive devices Energy-efficient integrated circuits for AI Power management techniques in high-performance processors His awards include the Samsung Scholarship (2004-2009), IBM Technical Achievement Award (2012), and NSF CAREER Award (2017). He has served on program committees for ISLPED, ISOCC, and ICCD, and reviewed for ISCAS.
David Greaves serves as a University Senior Lecturer in the Department of Computer Science and Technology at the University of Cambridge, where he conducts research and teaches undergraduate courses including Databases (Part IA) and Programming in C and C++ (Part IB). His academic work focuses on bridging hardware and software systems through innovative compilation techniques and architectural design. His research spans computer architecture, programming languages, semantics and verification, and systems and networking, with particular emphasis on hardware-software co-design, memory safety mechanisms, and FPGA-based acceleration. Greaves has developed specialized compiler frameworks like Kiwi for translating high-level programs into hardware implementations, and created security models such as FRAMER for capability-based memory protection. Analysis of his recent publications reveals a consistent focus on compiler infrastructure for hardware acceleration, with significant contributions to Bluespec Verilog compilation, dataflow intermediate representations, and cache-friendly security models. His work demonstrates strong interdisciplinary connections between formal methods, hardware design, and systems security, often targeting practical implementations in FPGA environments. Greaves maintains active involvement in hardware description language development and power analysis tools, as evidenced by his contributions to TLM Power and other electronic design automation frameworks. His research approach consistently emphasizes practical toolchain development alongside theoretical foundations.
Thomas Reps is a Professor at the University of Wisconsin-Madison 's Computer Sciences Department. He has held the J. Barkley Rosser Professor and Rajiv and Ritu Batra Chair since joining in 1982. His research spans program analysis , model checking , abstract interpretation , computer security , and quantum computing . Ph.D. in Computer Science from Cornell University (1982), ACM Doctoral Dissertation Award winner Co-founder of GrammaTech, Inc. (1988) Held visiting positions at INRIA (France), University of Copenhagen (Denmark), CNR (Italy), and University Paris Diderot (France) Research Interests include program slicing, interprocedural dataflow analysis, pointer analysis, software model checking, and code instrumentation. His recent work focuses on quantum circuit verification , CFLOBDDs , and unrealizability logic . His scientific awards include: ACM Fellow (2005) Foreign Member, Academia Europaea (2013) ACM SIGPLAN Achievement Award (2017) He has advised Ph.D. students like Akash Lal (SIGPLAN Dissertation Award) and Gogul Balakrishnan (ETAPS Best Paper Award). His work has produced influential papers such as the 1988 PLDI paper on interprocedural slicing (50 most influential PLDI paper, 2004) and the 2003 TOPLAS paper on parametric shape analysis.
Savas Kaya is a Professor in Electrical Engineering and Computer Science at Ohio University's Russ College of Engineering and Technology. He directs research in nanoelectronics, semiconductor devices, and flexible electronics. His laboratory develops multi-modal sensors for biomedical, environmental, and structural health monitoring applications. Research domains include: Nanoscale semiconductor devices Printed and flexible electronics RF CMOS subsystems Wireless network-on-chip architectures Recent publications focus on nanomaterials characterization, energy-efficient computing architectures, and advanced lithography techniques. Holds patents for ambipolar field-effect devices and glucose monitoring systems.
Richard Townsend serves as an Assistant Teaching Professor in the Department of Computer Science within the School of Engineering at Tufts University. He joined the institution in September 2019 after completing his Ph.D. at Columbia University, making a transition from research to teaching. Townsend is also the Founding Director of the Emerging Scholars Program in the Computer Science Department at Tufts University. His educational background includes a Doctor of Philosophy (2019), Master of Philosophy (2016), and Master of Science (2015) from Columbia University, along with a Bachelor of Arts in Computer Science from Oberlin College (2013). Townsend's research focuses on the application of functional programming languages to hardware design, specifically developing techniques to translate recursive algorithms with irregular memory access patterns into efficient hardware implementations. His work centers around an optimizing Haskell-to-SystemVerilog compiler project, exploring the semantic connections between functional languages and hardware specifications. He specializes in compilers for embedded systems, program analysis and optimization, and embedded domain-specific languages. His publication record demonstrates consistent contributions to the intersection of functional programming and hardware design, with multiple papers on compositional dataflow circuits, hardware synthesis from functional languages, and resource allocation for hardware implementations. His work shows a clear trajectory from theoretical foundations to practical implementations in hardware compilation. Senior Survey 2022 Significant Impact and Best Course (2022) Significant Impact Award (2021) Significant Impact Award (2020) Townsend actively mentors junior faculty through the Teaching Track Faculty Mentoring program and serves on various committees including the Teaching Track Search Committee and Computer Science Curriculum Committee. He teaches a range of courses including Programming Languages, Introduction to Computer Science, and specialized topics like Algorithmic Music Composition. His teaching approach incorporates evidence-based STEM teaching practices, as evidenced by his participation in multiple teaching development programs.
Dr. Arsène Pérard-Gayot is a Research Fellow in the Computer Graphics Lab at Saarland University, Germany. His research develops high-performance rendering systems through compiler innovations and hardware optimization techniques. Pérard-Gayot's work creates frameworks for automatic generation of optimized renderers using partial evaluation, eliminating manual compiler development. His FLOWER compiler enables efficient dataflow programming for FPGAs, while Rodent generates specialized renderers for CPUs/GPUs. Additional contributions include ray tracing acceleration structures for irregular grids and BVH traversal abstractions. Publications demonstrate consistent focus on bridging high-level programming models with hardware efficiency. Collaborative projects include molecular dynamics simulation mapping to heterogeneous architectures and distributed ray tracing for massive scenes. Research outcomes advance real-time rendering capabilities and domain-specific compiler technologies for scientific computing.
Bo Zhao is an Assistant Professor in the Department of Computer Science at Aalto University, leading the Aalto Data-Intensive System group (ADIS). His research focuses on building efficient data-intensive systems across multiple layers, from scalable machine learning systems to distributed data management systems. Research Focus: Scalable machine learning systems Distributed data processing Hardware-software co-design Quantum computing systems High-performance computing Current Projects: AthenaRL (scalable RL systems), LARA (quantum ML algorithms), FlexMoE (efficient mixture-of-experts systems). His group develops systems enabling ML deployment across hardware from quantum computers to mobile devices. Education & Career: PhD from Humboldt-Universität zu Berlin. Previously at Queen Mary University of London, Imperial College London, and Amazon Web Services. Research published in SOSP, VLDB, USENIX ATC.
Işıl Dillig is an Associate Professor of Computer Science at the University of Texas at Austin, where she leads the UToPiA research group. Her work focuses on programming languages, with specific emphasis on program analysis, verification, and synthesis. B.S., M.S., and Ph.D. from Stanford University Her research aims to enhance software reliability, security, and development efficiency through advanced synthesis techniques. Recent work spans: Neurosymbolic and semantic synthesis Blockchain and smart contract optimization Type systems for safety She has received prestigious accolades including: Sloan Fellowship NSF CAREER award Contributions to the field include leadership roles in conference organization and mentoring initiatives. Her lab actively explores applications in databases, security, and concurrent programming.
Petru Florin Mihancea is an Associate Professor at the Department of Computers, Faculty of Automation and Computers, Politehnica University of Timisoara. He holds a Dr. Eng. degree and is responsible for teaching Object-Oriented Programming and Software Engineering Fundamentals courses. Dr. Mihancea graduated from "Emanuil Gojdu" Highschool in Oradea, Romania in 1998 and began his software engineering studies at the Politehnica University of Timisoara the same year. In 2002, he won the "Best Software Engineer" award at the first LOOSE competition, which led to him joining the LOOSE Research Group. He defended his Ph.D. Thesis titled "A Novel Client-Driven Perspective on Class Hierarchy Understanding and Quality Assessment" with "Cum Laude" honors in 2009 under the supervision of Dr. Eng. Ioan JURCA. His primary research interests focus on software engineering, particularly in software quality assessment, program analysis, formal verification and testing, object-oriented design, and software maintenance and evolution. Dr. Mihancea has developed various code analysis tools that have been integrated into industrial products, demonstrating the practical impact of his research. His work often bridges the gap between theoretical research and practical applications in software development. Analysis of Dr. Mihancea's recent publications reveals a consistent focus on software quality assessment and program analysis. His research spans from fundamental aspects of object-oriented design to practical tools for detecting code issues and improving software security. A notable trend is his work on creating extensions for commercial analysis tools like CodeSonar and BTC EmbeddedPlatform, showing how his research directly contributes to industry practices. His publications also demonstrate expertise in both theoretical aspects of software engineering and practical tool development. Best Software Engineer award at the first LOOSE competition Dr. Mihancea has been involved in various research projects throughout his career. Notably, as a member of the eAustria Research Institute, he participated in the Spacios project, developing tools for verification of security properties of web applications. He has also worked on hardware research projects, developing tools for circuit customization and generation. His current research focuses on methods and tools for continuous quality assurance in complex software systems. He has collaborated with industry partners to develop code analysis products for automatic detection of potential bugs, demonstrating the practical impact of his research. His work has been acknowledged by PostgreSQL leaders for its contribution to their system. Dr. Mihancea is affiliated with the LOOSE Research Group and has been involved with the eAustria Research Institute. His work often involves developing analysis instruments and program investigation techniques, with several of his research activities being integrated into industrial products.
Ronald Dreslinski is a Professor in the Department of Computer Science and Engineering at the University of Michigan, College of Engineering. His work focuses on computer architecture, memory systems, and reconfigurable computing, with applications in machine learning, wireless communication, and autonomous systems. Research spans hybrid memory systems, fault-tolerant networks, and low-power processors Key technologies include PIM (Processing-in-Memory), systolic arrays, and Galois field accelerators His publications highlight trends in adapting reconfigurable architectures for sparse data, optimizing wireless communication decoders, and integrating neural networks with traditional circuit design. He mentors PhD students through weekly 1-on-1 meetings, project-specific sessions, and group presentations. The department emphasizes broadening participation in computing and student support through community initiatives.
**Jiang Hu** is a Full Professor of Electrical and Computer Engineering at Texas A&M University, holding a Hans Fischer Senior Fellowship at the Technical University of Munich (TUM-IAS). He earned his B.S. in Optical Engineering from Zhejiang University (1990), M.S. in Physics from the University of Minnesota (1997), and Ph.D. in Electrical Engineering (2001). Before joining Texas A&M in 2002, he worked at IBM Microelectronics. His research focuses on Electronic Design Automation (EDA), VLSI physical design, and hardware security, with notable contributions to machine learning-driven CAD tools and approximate computing architectures. **Education**: B.S., Optical Engineering, Zhejiang University (1990) M.S., Physics, University of Minnesota (1997) Ph.D., Electrical Engineering, University of Minnesota (2001) **Research Interests**: Jiang Hu's work bridges EDA and computer architecture, emphasizing optimization of large-scale computing systems. His projects include automated power modeling frameworks (e.g., APOLLO), neural network-driven placement algorithms, and security-enhanced dataflow architectures. He also explores plasmonic materials and perovskite solar cells through interdisciplinary collaborations. **Awards**: IEEE Fellow (2012) Alexander von Humboldt Research Fellowship (2011) Multiple best-paper awards at IEEE/ACM conferences (2003–2021) **Grants & Leadership**: He served as Technical Program Chair for ACM International Symposium on Physical Design (2011–2012) and co-chaired the ACM/IEEE Workshop on Machine Learning for CAD (2023). His research has led to 10 patents and supervision of 24 Ph.D. students. **Labs & Teams**: His group collaborates with TUM-IAS on projects like *A New and Scalable Methodology for Fast Machine Learning Accelerator Design*, advancing EDA tools for next-generation hardware systems.
Bob Iannucci is an Adjunct Professor in Electrical and Computer Engineering at Carnegie Mellon University (CMU), with a courtesy appointment at CMU Silicon Valley. He previously served as Chief Technology Officer of Nokia and Head of the Nokia Research Center (NRC), where he pioneered open innovation initiatives like 'lablets' at top universities. His research focuses on mobile/embedded systems, scalable architectures, wireless networks, and energy-efficient IoT technologies. Education: Ph.D. in Computer Science from MIT (1988), with a thesis on hybrid dataflow-von Neumann architectures. He has led engineering teams at startups and major firms like DEC/Compaq, co-founding Exa Corporation (now part of Siemens) for computational fluid dynamics. Key Projects: MoCCA (mobile computing architecture, now in Smithsonian), VIPER (drone curiosity training), PowerDué (energy-aware IoT prototyping). Awards: IDEA Gold Award (MoCCA), IPSN Best Paper (2018), Millennium Technology Prize committee member (2008). Current activities include advising on wireless networking, developing WiFi IoT devices, and an award-winning radio direction-finding iPhone app. He actively collaborates on NSF-funded projects addressing spectrum interference and emergency communication systems.
Gerald Jay Sussman is the Panasonic Professor of Electrical Engineering at the Massachusetts Institute of Technology (MIT). He received his S.B. (1968) and Ph.D. (1973) in mathematics from MIT and has been conducting artificial intelligence research there since 1964. His primary research focuses on understanding problem-solving strategies used by scientists and engineers, with dual goals of automating these processes and formalizing educational methodologies. He co-directs the Sussman Lab at MIT's Computer Science and Artificial Intelligence Laboratory (CSAIL). His research spans artificial intelligence, computer languages, VLSI design, computational classical mechanics, synthetic biology, and telescope engineering. Notable contributions include co-creating the Scheme programming language, developing AI-based CAD tools for VLSI, designing the Digital Orrery for orbital mechanics simulations, and pioneering computational approaches to teaching classical mechanics. His current work includes developing explainable AI systems for autonomous vehicles. Professor Sussman's publications demonstrate broad interdisciplinary impact, with recent works spanning computer science education, software design, computational physics, and synthetic biology. His research consistently bridges theoretical computer science with practical engineering applications and educational innovation. Scientific Awards & Honors: Karl Karlstrom Outstanding Educator Award (ACM, 1990) Amar G. Bose Award for Teaching (MIT, 1992) IEEE EAB Major Education Innovation Award (2023) Taylor L. Booth Education Award (IEEE, 2024) National Academy of Engineering Member Fellow: IEEE, AAAI, ACM, AAAS, American Academy of Arts and Sciences He has supervised 46 PhD students spanning five decades, with dissertations covering AI, computer architecture, computational biology, and physical system modeling. His Sussman Lab develops computational tools for science education and engineering design, including contributions to the Magellan telescopes in Chile. Current projects involve explainable AI systems and computational mechanics frameworks.
Rajit Manohar is the John C. Malone Professor of Electrical & Computer Engineering at Yale University, with appointments in Applied & Computational Mathematics and Computer Science. He is a core member of the interdisciplinary Computer Systems Lab (CSL), which bridges ECE and CS departments. His research focuses on asynchronous VLSI design, neuromorphic computing, and hardware-software co-design. Education: Manohar holds a B.S., M.S., and Ph.D. from the California Institute of Technology. His academic career spans over two decades, with notable contributions to asynchronous circuit theory and neuromorphic engineering. Research Interests: Manohar's work emphasizes energy-efficient asynchronous architectures, concurrency control, and biologically inspired computing. He explores topics like formal methods for circuit verification, cognitive systems, and dynamic sensor networks. His lab develops tools like Fluid (asynchronous synthesis) and Neurobench (neuromorphic benchmarking). Publications: Recent work includes advancements in asynchronous logic synthesis (Maelstrom), neuromorphic frameworks (Neurobench), and scalable brain-computer interfaces (SCALO). His research often intersects NSF-funded projects in energy-aware computing and neuromorphic systems. Awards: Inaugural Misha Mahowald Prize (2025), MIT TR35 (2000s), IBM Goldberg Award (2023) Grants & Labs: Manohar leads NSF-supported initiatives in carbon-aware networking and neuromorphic hardware. The Computer Systems Lab collaborates across disciplines to advance sustainable computing and neuro-inspired architectures.
Sandrine Blazy is a Professor at the University of Rennes , where she teaches mechanized semantics (in Coq), functional programming (in OCaml), formal methods (using Why3), and software vulnerabilities. She is a member of the CELTIQUE and Epicure project-teams, both affiliated with Inria Rennes and IRISA laboratory. Her research focuses on formal verification of compilers and program transformations, notably through the CompCert compiler and Versaco static analyzer. Education : HDR (Habilitation à Diriger des Recherches) in Computer Science, Université d'Évry Val d'Essonne (2008). Research Interests : Her work ensures mathematical guarantees in compiler correctness, preventing security bugs during program translation. She specializes in deductive verification , static analysis , and software security , with applications in critical systems like avionics and cryptography. Scientific Awards : CNRS Silver Medal (2023) Lucas Award from Formal Methods Europe (2023) ACM SIGPLAN Programming Languages Software Award (2022) ACM Software System Award (2021) Best Paper Award at FMTea 2014 La Recherche Award in Information Sciences (2011) Advising and Grants : She has advised numerous PhD students (e.g., Solène Mirliaz, Aurèle Barrière) and led research projects like Scrypt (secure compilation for cryptography), ERC VESTA (verified static analysis), and VERASCO (formal verification of compilers). Her grants include ANR and FNRAE funding. Labs and Teams : Actively involved in IRISA CNRS UMR 6074 as deputy director (2021), and collaborates with Inria Rennes and CNRS project teams.
