Marius Minea is an Associate Professor at the Department of Computer and Software Engineering, Politehnica University of Timișoara. He holds a Dr. Eng. degree and specializes in formal verification, cybersecurity, and software engineering. His work focuses on model checking, security protocols, and embedded systems design. Research interests include formal verification techniques, software analysis, and security modeling. Notable projects include the EU-funded SPaCIoS and AVANTSSAR initiatives, which address automated validation of security in service-oriented architectures. He has organized major conferences like CRiSIS 2011 and contributed to workshops such as MoDeVVa. Awarded the Merit Award in 2025, Minea teaches courses on computer security, formal verification, and programming. His work bridges theoretical foundations with practical applications, emphasizing automated testing and model-driven engineering.
Paul H J Kelly is a Professor of Software Technology at Imperial College London, leading the Software Performance Optimisation research group. He serves as co-Director of the Centre for Computational Methods in Science and Engineering and Director of Industrial Liaison for the HiPEDS Centre for Doctoral Training in High-Performance Embedded and Distributed Systems. Research Interests His research focuses on: Compiler technology for computational science Performance portability across heterogeneous architectures Domain-specific languages (DSL) for scientific computing Optimization of finite element methods and PDE solvers Data locality and parallelism trade-offs Computer vision algorithms and SLAM systems He actively collaborates with hardware vendors and application developers in computational science, robotics, and quantum chemistry. Article Trends Recent publications emphasize: Temporal and spatial tiling for PDEs and stencil computations Quantum circuit simulation optimization Distributed SLAM systems Performance portability frameworks (e.g., Firedrake, Devito) Compiler techniques for GPUs and custom accelerators Memory hierarchy optimization Scientific Awards Senior Member of the ACM (2021) Imperial College Engineering Faculty Teaching Excellence Award (2013) Best Robotics Paper at 18th Conference on Robots and Vision (2021) Student Mentoring He has mentored numerous PhD and postdoctoral researchers now in academic positions including: Luigi Nardi - Assistant Professor at Lund University Sajad Saeedi - Assistant Professor at Ryerson University Lawrence Mitchell - Assistant Professor at University of Durham Current students include Renato Salas-Moreno , David Ham , and Miklos Homolya .
Nachiket Kapre is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, Canada (2023–present). He previously held positions as Associate Professor (2016–2021) and on leave as Research Director at Xilinx Labs (AMD Research, Singapore, 2022–2023). Before that, he was an Assistant Professor at Nanyang Technological University (NTU), Singapore (2012–2016) and a Junior Research Fellow at Imperial College London (2010–2012). He earned a Ph.D. and two M.S. degrees from the California Institute of Technology (2010), and a B.E. from the University of Pune (2002). His research focuses on Concurrent and Spatial Architectures , Parallel Processing , and Communication-Centric Design , with a strong emphasis on FPGA-based acceleration for applications like machine learning, graph algorithms, and embedded systems. Key contributions include Hoplite NoC architectures and CaffePresso for deep learning acceleration. Notable awards include the FPT Best Paper Award (2024), TRETS Best Paper Award (2023), and the CASES 2016 Best Paper Award. He has led multiple grants, including NSERC Discovery Grants and A*STAR-funded projects. His advising spans 15+ students across PhD and MSc levels, contributing to FPGA toolflows, NoC design, and hardware acceleration. He has authored over 50 publications in top venues like FPGA, FPL, and ACM TRETS, and serves as a program chair for FCCM 2023. His work bridges theory and practice, emphasizing energy-efficient computing and reconfigurable systems.
John McAllister is a Professor and Deputy Head of School at Queen's University Belfast's School of Electronics, Electrical Engineering and Computer Science. His research focuses on custom hardware design for FPGA-based embedded/edge computing, signal processing, and machine learning applications, with a particular emphasis on neuromorphic computing, quantum computing, and dataflow architectures. He leads projects such as FPGA Acceleration of SDR Algorithms and picoStream Streaming Multiprocessors, and has supervised work in embedded systems and wearables. Research Interests: Custom FPGA Hardware and High-Level Synthesis Edge Computing and Cyber-Physical Systems Signal Processing Systems Dataflow Computing Neuromorphic Computing Quantum Computing Notable Awards: Best Paper Prize (2011, 2007) Certificate of Merit (2017) Higher Education Academy Fellowship (2007) Grants & Collaborations: R3500ECS: Arm Morello UAV Security (2023–) R8848CSC: FPGA SDR Acceleration (2017–) R3797CSC: Exascale picoStream (2016–2018) Labs/Teams: Active in the Institute of Electronics, Communications & Information Technology, leading interdisciplinary projects in quantum circuit optimization and FPGA-based signal processing.
Jordi Petit Silvestre is a professor in the Department of Computer Sciences at the Barcelona School of Informatics (FIB), Universitat Politècnica de Catalunya (UPC). He is a member of the ALBCOM research group, focusing on algorithms, bioinformatics, complexity, and formal methods. His work bridges theoretical computer science with practical applications in algorithm engineering, VLSI design, and computer science education. His research interests include algorithms , graph layout problems , parallel computing , data structures , and computer science education . He has made significant contributions to the design and analysis of efficient algorithms, particularly in graph layout optimization and cache-conscious data structures. His work extends to electronic design automation, with publications on macro placement, routing, and physical design for integrated circuits. The recent publications highlight a dual focus: (1) algorithmic and physical design for VLSI, involving macro placement, routing, and system-level optimization; and (2) innovations in computer science education, particularly through the Jutge.org platform, continuous assessment, MOOCs, and feedback mechanisms in online judges. This reflects a career deeply engaged in both theoretical research and educational technology. Jordi Petit has participated in numerous competitive and non-competitive R&D+i projects, often in collaboration with other leading researchers at UPC. He has contributed to educational innovation projects aimed at transforming programming education and curriculum design in computer science degrees. He is actively involved in the development and deployment of Jutge.org , an educational programming judge that supports automated assessment and learning in programming courses. His work in this area includes improving feedback, integrating formal verification, and analyzing course evolution through metrics like pass rates and workload.
Delphine Demange is an Associate Professor in Computer Science at University of Rennes, working in the Epicure research group (formerly Celtique) at IRISA (UMR 6074 / Inria). Her research focuses on formal methods for programming languages and compilers, with particular emphasis on compiler verification, program semantics, and language-based security. Her research interests include formal semantics of programming languages, program transformations, compiler verification, static analysis, computer-aided verification, and language-based security. She has made significant contributions to the formal verification of compiler intermediate representations, particularly static single assignment (SSA) form, and has worked extensively on verified compilation techniques. Her publication record shows a consistent focus on formal verification of programming language constructs and compiler components. Recent work (2023-2025) centers on dataflow circuits and solvers, while earlier work (2015-2020) focused on SSA-based optimizations, garbage collection verification, and information-flow security architectures. Her research demonstrates a strong commitment to applying formal methods to practical compiler and language implementation problems. Her scientific awards include the EAPLS Best PhD Dissertation Award in 2012 and the Gilles Kahn PhD Thesis Award in 2013 for her thesis Semantic Foundations of Intermediate Program Representations . She serves on numerous program committees for major programming languages conferences including CC, CGO, OOPSLA, and POPL, and has held leadership roles such as Program Co-Chair for CC 2021 and General Co-Chair for JFLA 2023 and 2024. She is also a member of the CC Steering Committee (2021-2024). Her teaching portfolio includes undergraduate and graduate courses in programming, algorithmics, compilation, and program verification, with a particular focus on trustworthy programming techniques using deductive verification in Why3.
Matthieu ARZEL is an Associate Professor in the Department of Mathematical and Electrical Engineering at IMT Atlantique. He holds an HDR (2021), PhD (2006), and Engineer degree (2002) from Telecom Bretagne/ENST. His research focuses on iterative processing for digital communications, low-power integrated circuits, high-speed digital circuits, and FPGA implementations in domains like neural networks, medical engineering, and communication systems. Key research interests include neuromorphic hardware, neural network pruning, federated learning compression, and energy-efficient signal processing. He has supervised 18 PhD students and contributed to projects like Ouessant coprocessor architectures and clique-based neural network circuits. His work bridges algorithm-architecture interactions, emphasizing low-power and embedded system applications. Recent publications highlight innovations in FPGA-based deep learning deployment and efficient neural network compression techniques. Publications span topics from real-time semantic segmentation on FPGA to collusion-resistant watermarking. His contributions address challenges in hardware-software co-design, iterative decoders for MIMO systems, and biomedical signal processing.
Delphine Demange is an Associate Professor in Computer Science at the University of Rennes, affiliated with Inria, CNRS, and IRISA, where she conducts research in the Epicure group. Her work focuses on programming languages, formal semantics, compiler verification, and program verification using interactive theorem provers. Research Interests: Programming Languages Implementation Compiler Verification Formal Semantics Program Verification with Interactive Theorem Provers Static Analysis and Language-Based Security Her recent publications demonstrate a strong trend in mechanized semantics, verified compilation, and correctness of intermediate representations such as SSA forms and dataflow circuits. She frequently employs Coq for formal verification and contributes to foundational aspects of compiler correctness. Scientific Awards: EAPLS Best PhD Dissertation Award 2012 Gilles Kahn PhD Thesis Award 2013 Delphine Demange has held significant service roles, including Program Co-Chair for CC 2021 and General Co-Chair for JFLA 2023 and 2024. She has served on numerous program committees for top conferences such as POPL, PLDI, CPP, ESOP, and OOPSLA, reflecting her active engagement in the programming languages community. She teaches courses in programming, algorithmics, compilation, semantics, and software security at both undergraduate and master's levels. She is part of the Epicure research team at IRISA, focusing on verified systems and programming language foundations.
Johnny Öberg is an Associate Professor at the Division of Electronics and Embedded Systems, KTH Royal Institute of Technology. He specializes in embedded systems, FPGA design, and fault-tolerant hardware architectures. His research focuses on radiation effects in electronics, machine learning acceleration, and network-on-chip (NoC) systems. He teaches and examines courses such as Computer Systems Architecture (IS2202), Embedded Hardware Design in ASIC and FPGA (IL2225), and Embedded Systems Design Project (IL2232). His work often bridges theory and practice, emphasizing real-world applications in aerospace, automotive, and IoT domains. Key research trends include improving reliability in SRAM-FPGAs through statistical fault injection, developing hardware-accelerated machine learning frameworks, and optimizing NoC architectures for predictable performance in mixed-criticality systems. Recent projects include the SAFEPOWER architecture for energy-efficient systems and collaborations on structural health monitoring using Lamb wave analysis. No scientific awards are explicitly mentioned in the provided texts. Johnny has advised on multiple degree projects but no specific student names are listed. His contributions include foundational work in GALS (Globally Asynchronous, Locally Synchronous) communication bridges and protocol grammars for low-power implementations. Labs/teams: Active involvement in the ICES (Innovative Centre for Embedded Systems) and the Suaineadh project for space-deployable structures. Collaborates on interdisciplinary initiatives like the ABB NoC and Panacea NoC prototypes.
Martha Kim is an Associate Professor of Computer Science at Columbia University's Fu Foundation School of Engineering and Applied Science. She serves as a member of the Data Science Institute, co-chairs the Center for Computing Systems for Data-Driven Science, and chairs the Computer Engineering Program. Her academic appointments span multiple research centers and educational initiatives at Columbia. Dr. Kim earned her PhD in Computer Science and Engineering from the University of Washington and completed her undergraduate studies in Computer Science at Harvard University. Her educational background has provided a strong foundation for her research and teaching career in computer systems. Her research interests focus on the intersection of hardware and software systems, specializing in computer architecture, parallel programming, compilers, and low-power computing. Dr. Kim's work explores innovative approaches to hardware accelerator design, with particular emphasis on improving usability of accelerators and developing data-centric accelerator architectures. Her research has investigated low-cost chip manufacturing systems, reconfigurable communication networks, and fine-grained parallel application profiling techniques. The publication record reveals a consistent research trajectory focused on hardware-software co-design, with recent work emphasizing practical implementations of architectural concepts. Her articles demonstrate expertise across multiple subfields including thermal management, database acceleration, and energy-efficient computing, with publications appearing in top-tier conferences like ASPLOS, MICRO, and ISLPED. Rodriguez Family Award (2013) Edward and Carole Kim Faculty Involvement Award (2015) NSF CAREER award (2013) Anita Borg Early Career Award (2016) Dr. Kim actively mentors doctoral students through the ARCADE Lab, with current advisees including Martha Barker, Thomas Repetti, and Andrea Lottarini, and previously guiding Melanie Kambadur (PhD 2016) and Lisa Wu (PhD 2014). Her research has received substantial funding from major organizations including C-FAR, DARPA, Google, Intel, and the National Science Foundation, enabling significant contributions to computer architecture research. She leads the ARCADE Lab at Columbia University, which serves as the primary research hub for her team's work on computer architecture and systems. The lab environment fosters collaboration between faculty, graduate students, and industry partners to advance research in hardware acceleration and energy-efficient computing.
Martin Moreno is a tenure-track Assistant Professor in the Department of Computer Science and Engineering at The Ohio State University. His office is located in Dreese Laboratories at 2015 Neil Ave, Columbus, OH. His research focuses on the intersection of compilers, programming languages, high-performance computing, and quantum computing, with goals to enhance program execution speed, reliability, and portability across architectures. Research Interests: Dr. Moreno specializes in polyhedral compilation, GPU optimizations, quantum computing abstractions, distributed-memory algorithms, and energy-aware computing. His work bridges theoretical compiler design with practical performance improvements for modern hardware, including GPUs and quantum processors. Recent Research Trends: Analysis of his 15 most recent publications reveals strong emphasis on: 1) Automated code generation for distributed systems and tensor computations, 2) Quantum program optimization through affine transformations, 3) Energy-efficient GPU computing via polyhedral models, and 4) Novel compiler frameworks for task-based parallelism. His work consistently integrates formal methods (e.g., SMT solvers) with practical runtime systems. Student Advising: Actively seeks motivated students for research projects in compiler optimizations and quantum computing. Applicants to OSU are encouraged to list him as a potential advisor and mention PLSE/HPC interests in statements of purpose.
Jordi Cortadella is a Full Professor in the Department of Software at the Universitat Politècnica de Catalunya (UPC), Spain. His academic journey spans decades, with a Ph.D. in Computer Science from UPC (1987) and visiting roles at institutions like UC Berkeley and Intel Corporation. A Fellow of the IEEE (2015) and member of Academia Europaea (2013), he specializes in formal methods, concurrency theory, and asynchronous circuit design. His work bridges theoretical and applied research in EDA tools and VLSI systems. Education M.S. in Computer Science, UPC (1985) Ph.D. in Computer Science, UPC (1987) Research Interests : Cortadella's research focuses on algorithms for electronic design automation, asynchronous circuits, and formal methods. Recent publications explore Petri net decomposition, dataflow circuit verification, and ethical frameworks for research governance. His work impacts both theoretical concurrency models and practical applications like FPGA optimization and energy-efficient design. Scientific Awards : Fellow of the IEEE (2015) Member of Academia Europaea (2013) Distinction for University Research Promotion (Catalan Government, 2003) Descartes Prize Finalist (2002) Best Ph.D. Thesis at UPC (1992) National Award for Best Computer Science Student (1986)
Yanjing Li is an Assistant Professor in the Department of Computer Science (Systems Group) at the University of Chicago. She holds a Ph.D. in Electrical Engineering from Stanford University, an M.S. in Mathematical Sciences (with honors) and a B.S. in Electrical and Computer Engineering (with a double major in Computer Science) from Carnegie Mellon University. Her research focuses on computer architecture, hardware security, emerging technologies, and the intersection of machine learning with robust system design. Education: Ph.D., Electrical Engineering, Stanford University M.S., Mathematical Sciences (Honors), Carnegie Mellon University B.S., Electrical and Computer Engineering (Double Major in Computer Science), Carnegie Mellon University Research Interests: Professor Li explores efficient, intelligent, and secure computer architectures. Key areas include photonic interconnects, fail-secure architectures, resilience in deep learning accelerators, and cross-layer system design. Her work emphasizes energy-efficient computing and hardware security against failures and attacks. Awards & Honors: 2022 DAC Under-40 Innovators Award 2021 Google Research Scholar Award 2015 Intel Labs Gordy Academy Award Outstanding Dissertation Award (European Design and Automation Association) Multiple Best Paper Awards at IEEE/ACM Conferences Advising & Projects: Leads the YLab, mentoring PhD students like Yi He and Zequan Zhou. Active projects include UpDown (graph analytics acceleration), photonic interconnects funded by NSF/E2CDA, and fail-secure architectures. Collaborates on NSF-funded photonic computing research with UIUC and UChicago teams. Labs & Groups: Directs YLab and contributes to the Systems Group, fostering interdisciplinary work in systems, programming languages, and hardware-software co-design.
Florian Grützmacher is a researcher at the University of Rostock's Department of Computer Science, focusing on model-based embedded system design and energy-efficient sensor systems. His work bridges wearable technology, cyber-physical systems, and biomedical applications. Research Interests: Model-based embedded system design and analysis Energy-efficient activity recognition via sensor networks Optimized algorithms for wearable IMUs Scientific Contributions: Developed piecewise linear approximation techniques for energy savings in wearables Created dataflow models for gesture/activity recognition systems Innovated in real-time sensor data synchronization for wireless protocols His recent publications (2023-2025) emphasize biomedical sensor applications, animal behavior modulation via embedded systems, and industrial IoT optimizations. Awards include a Best Paper Nominee at UbiComp/ISWC 2019.
Georgi Gaydadjiev is a Professor in Innovative Computer Architecture at the University of Groningen's Faculty of Science and Engineering. Previously, he held roles including Chair Professor at TU Delft and Chalmers University of Technology, and served as VP of Dataflow Software Engineering at Maxeler Technologies. He holds a PhD from TU Delft and has over 35 years of industry and academic experience, focusing on reconfigurable computing, high-performance systems, and energy-efficient architectures. His research spans embedded systems, fault tolerance, and scalable architectures. Education: MSc Electrical Engineering (TU Delft), PhD (TU Delft), studies at Voenmeh (Baltic State Technical University). Research interests include reconfigurable computing, advanced architectures, parallel systems, and HPC. He leads projects funded by EU, Google, and Swedish Research Councils, addressing exascale computing and customized hardware. His work has been recognized with awards like the CES Design Showcase (1999) and best paper awards at ICS'10 and WiSTP'07. He advises PhD students and oversees labs like Maxeler IoT-Labs BV, focusing on deploying dataflow technology beyond data centers.
