جست‌وجوی استاد و پژوهشگر

Brandon M. Luciaمشاهده پروفایل

استاد

• Computer Architecture
• Computer Systems
• Programming Languages
• +۷ مورد دیگر

Brandon M. Lucia is the Kavčić-Moura Professor of Electrical and Computer Engineering at Carnegie Mellon University and CEO/co-founder of Efficient Computer Company. He leads the Abstract research group and focuses his work on the intersection of computer architecture, systems, and programming languages. Education: Ph.D. in Computer Science and Engineering, University of Washington (2013) — advised by Luis Ceze Research Focus: Brandon's research is broadly centered on intermittent computing , edge computing , and energy-efficient architectures . Two major thrusts define his current work: Intermittent Computing: Making battery-free, energy-harvesting devices programmable and reliable despite frequent power failures. Applications include medical implants, space systems, and large-scale sensing. Orbital Edge Computing: Designing nanosatellite constellations that perform on-orbit data processing, enabling low-latency, high-resolution sensing in space-constrained environments. Scientific Awards: NSF CAREER Award (2017) IEEE TCCA Young Computer Architect Award (2019) Sloan Foundation Fellowship (2021) ASPLOS 2020 Best Paper Award OOPSLA 2015 Distinguished Paper & Artifact Awards IEEE Micro Top Picks (2016, 2018 Honorable Mention) Advising & Grants: Brandon actively advises a strong cohort of Ph.D. students including Zhuo Cheng, Bradley Denby, Souradip Ghosh, Harsh Desai, Kiwan Maeng, Emily Ruppel, and others. His group is funded by the NSF (CAREER and SHF grants), the Sloan Foundation, and industry partnerships. Labs & Teams: He directs the Abstract research group at CMU ECE, which hosts interdisciplinary projects spanning hardware design, compiler construction, and system software for ultra-low-power and space-borne computing platforms.

Tushar Krishnaمشاهده پروفایل

دانشیار

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +۴ مورد دیگر

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

Bahar Asgariمشاهده پروفایل

استادیار

• Computer Architecture
• Domain-Specific Architecture Design
• Near Memory Processing
• +۳ مورد دیگر

Bahar Asgari is an Assistant Professor in the Department of Computer Science at the University of Maryland, College Park. She holds appointments in CS, UMIACS, and ECE, and directs the Computer Architecture and Systems Lab (CASL). Her research focuses on domain-specific architecture design, near memory processing, and reconfigurable computing. Before joining UMD, she worked at Google, contributing to system optimization and memory utilization strategies. Education: Ph.D., Georgia Institute of Technology, 2021. Research Interests: Developing energy-efficient architectures for sparse problems, scientific computing acceleration, FPGA optimizations, and reconfigurable hardware systems. Her work addresses challenges in memory efficiency, parallelization, and hardware-software co-design across domains like machine learning and IoT. Key Awards: 2024 UMD Excellence in Teaching Award 2023 DOE Early Career Award Advising & Grants: Supervises 9 graduate students and leads projects sponsored by NSF, DOE, and industry partnerships. Her lab explores systolic arrays, near-data processing, and fault-tolerant computing. Labs/Teams: Directs CASL, which builds next-generation computing systems through hardware innovation and algorithm-architecture co-design.

Hayden Kwok Hay SOمشاهده پروفایل

دانشیار

• Reconfigurable Computing
• FPGA-Based Systems
• Computer Architecture
• +۷ مورد دیگر

Prof. Hayden Kwok Hay SO is an Associate Professor at the University of Hong Kong (HKU), affiliated with the Department of Electrical and Electronic Engineering. He currently serves as Acting Director of the School of Innovation and previously co-directed the Computer Engineering Program. His research focuses on reconfigurable computing systems, FPGA-based architectures, and their applications in AIoT, medical imaging, and high-performance computing. He holds a B.S., M.S., and Ph.D. in Electrical Engineering and Computer Sciences from UC Berkeley (1998–2007). Prof. So has been recognized with awards such as the IEEE-HKN Teaching Award (2021), Croucher Innovation Award (2013), and multiple teaching excellence awards. He leads the Computer Architecture & System Research Lab (CASR) and co-founded the Joint Lab on Future Cities (JLFC). His work spans FPGA overlay architectures, graph processing systems, and hardware-software co-design for efficient computing. Key research contributions include advancements in FPGA-based reconfigurable systems, sparse dataflow architectures, and medical imaging accelerators. He has secured grants for projects like 'Advanced machine vision guided aquatic surface vehicles' and 'Efficient and Productive Parallel Data Processing in Hybrid FPGA-CPU Clusters.' Prof. So has advised numerous students and researchers, contributing to over 150 peer-reviewed publications. His current projects explore AI hardware acceleration, neuromorphic computing, and FPGA-driven solutions for big data challenges.

James C. Hoeمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +۴ مورد دیگر

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

Chen Liمشاهده پروفایل

استاد

• Data Management
• Database Systems
• Machine Learning
• +۸ مورد دیگر

Chen Li is a Professor in the Department of Computer Science at the University of California, Irvine (UCI), affiliated with the Donald Bren School of Information and Computer Sciences (ICS). He holds a Ph.D. from Stanford University and bachelor's and master's degrees from Tsinghua University. His research focuses on data management, including databases, query optimization, machine learning systems, and open-source tools like AsterixDB and Texera. He has received prestigious awards such as the NSF CAREER Award and IEEE Fellow recognition. Li is also a board member of the VLDB Endowment and the former Faculty Director of UCI's ICS Master of Computer Science Program. Education: Ph.D., Computer Science, Stanford University M.S. and B.S., Computer Science, Tsinghua University Research interests span next-generation databases, approximate query processing, and AI-driven data analytics. Notable contributions include the Texera system for collaborative data science workflows and the Apache AsterixDB project. He has led NIH-funded initiatives in diabetes research and pandemic prediction, emphasizing real-world applications of data science. Professional roles include PC co-chair of VLDB 2015, General Co-chair of SIGMOD 2027, and a visiting research scientist at Google. His awards highlight his impact in both academia and industry. Advising and mentoring are central to his career, with a focus on graduate education. He has pioneered outreach programs like DS4ALL to teach high-school students data science using Texera.

Zhonghai Luمشاهده پروفایل

استاد

• Computer Architecture
• Embedded Systems
• Network-on-Chip (NoC)
• +۷ مورد دیگر

Zhonghai Lu is a Professor of Electronic Systems Design (specializing in Dependable and Autonomous Systems) at KTH Royal Institute of Technology, part of the Department of Electrical Engineering in the School of Electrical Engineering and Computer Science (EECS). He serves as Program Director for KTH's Embedded Systems master's program and Director of Studies at the Division of Electronics and Embedded Systems. His research focuses on Network-on-Chip (NoC), computer architecture, embedded systems, and Prognostics and Health Management (PHM) of power electronics. He leads a research group exploring in-network processing and embedded intelligence, transforming passive networks into active computational frameworks. Lu holds a BSc from Beijing Normal University (1989), MSc and PhD from KTH (2002, 2007), and an MBA in Innovation and Growth from the University of Turku (2012). He has authored over 240 scientific papers, including journal articles and peer-reviewed conferences, with notable recognitions such as Best Paper Awards at NOCS’2015 and EU HiPEAC, and a Featured Paper in IEEE Transactions on Computers (2020). He serves as Associate Editor for ACM Transactions on Architecture and Code Optimization (TACO) and has chaired major conferences like HiPEAC’2017 and NOCS’2018. His research group’s recent work includes integrating AI into hardware acceleration, fault-tolerant neural networks, and RUL estimation for power electronics using recurrent neural networks. Lu has secured grants from the Swedish Research Council and Intel Corporation and developed courses like IL2230 (Hardware Architectures for Deep Learning) and IL2233 (Embedded Intelligence), pioneering embedded AI education at KTH. Education: BSc (Beijing Normal University), MSc/PhD (KTH), MBA (University of Turku) Awards: Best Paper Awards (NOCS, EU HiPEAC), Swedish Research Council Grants, Intel Research Gifts Labs/Teams: Research Group on In-Network Processing and Embedded Intelligence

Zhenman Fangمشاهده پروفایل

دانشیار

• Customizable Computing
• Heterogeneous Computing
• FPGA Acceleration
• +۸ مورد دیگر

Dr. Zhenman Fang is an Associate Professor at the School of Engineering Science , Simon Fraser University (SFU) , where he founded and directs the HiAccel Lab . He also holds an associate membership in the School of Computing Science at SFU. His research focuses on customizable computing with software-defined hardware acceleration , addressing performance, energy-efficiency, and reliability in post-Moore’s law computing across domains like machine learning , big data analytics , quantum chemistry , and precision medicine . Education: Ph.D. in Computer Science from Fudan University (2014), with a visit to University of Minnesota during his studies. Postdoctoral Work: University of California, Los Angeles (UCLA) (2014-2017). Industry Experience: Staff Software Engineer at Xilinx (2017-2019). Dr. Fang’s research spans the entire computing stack , including application characterization , accelerator-rich architecture design , and programming/tool support . He has developed frameworks like HiSpMV , SyncNN , and SQL2FPGA , emphasizing FPGA acceleration for vision transformers , quantum chemistry , and spiking neural networks . His work has been recognized with 3 best paper awards (FPL 2024, TCAD 2019, MEMSYS 2017) and 3 best paper nominees (FCCM 2025, HPCA 2017, ISPASS 2018). Recent publications highlight trends in low-precision machine learning ( ShiftQuant , ESRU ), quantum chemistry acceleration ( SERI ), and vision transformer optimization ( Quasar-ViT ). His HiAccel Lab actively mentors PhD and MASc students , with notable graduates like Alec Lu (PhD 2024, now at Meta) and Philip Stachura (MASc, now with BC Graduate Scholarship). Scientific Awards: Inaugural SFU Research Excellence Award - Horizon Award (2025) FPL 2024 Stamatis Vassiliadis Best Paper NSERC Alliance Award (2020) CFI JELF Award (2019) Xilinx University Program Award (2019) IEEE Senior Member (2023) Grants: NSERC Discovery Grant (2019) CFI JELF Funding (2019) Huawei and Xilinx sponsorships Dr. Fang leads open-source initiatives like SyncNN , PASTA , and SQL2FPGA , and serves as General Chair for ASAP 2025 and Program Co-Chair for RAW 2025 . His lab collaborates globally with institutions such as UCLA , Northeastern University , and Xidian University .

Joey Paquetمشاهده پروفایل

دانشیار

• Design and implementation of programming languages
• Context-driven computing
• Demand-driven computing

Dr. Joey Paquet is a Tenured Associate Professor and Department Chair in the Department of Computer Science and Software Engineering at Concordia University in Montreal, Canada. He holds a PhD and specializes in research areas including Design and Implementation of Programming Languages, Context-Driven Computing, and Demand-Driven Computing. His work focuses on advancing programming paradigms and their applications in cybersecurity, distributed systems, and autonomic computing. Dr. Paquet is actively involved in thesis supervision across Computer Science and Software Engineering programs at both master's and doctoral levels. Research interests are centered around programming language design, particularly in demand-driven and context-aware systems. His contributions include frameworks like GIPSY and OpenISS, enabling scalable data processing and forensic computing. Recent work explores autonomic intent-driven networking, real-time gesture recognition, and IoT forensics. These efforts highlight his expertise in both theoretical constructs and practical implementations. His advising role supports students in MCompSc, MASc, and PhD programs. While specific grants are not detailed, his projects often involve interdisciplinary collaboration. Dr. Paquet is affiliated with platforms like LinkedIn and ResearchGate, reflecting an active academic presence. Key technical contributions include pioneering work on forensic computing backends, intent expression languages, and multimodal interaction systems. His research addresses challenges in cybersecurity, distributed systems, and service composition, with a focus on resilience and scalability.

Marco Platznerمشاهده پروفایل

استاد

• Reconfigurable Computing
• Approximate Computing
• Self-Aware Computing
• +۷ مورد دیگر

Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.

Yannis Chronisمشاهده پروفایل

استادیار

• Database Systems
• Hardware-Software Co-design
• Data Processing Efficiency
• +۳ مورد دیگر

Yannis Chronis is an incoming Assistant Professor at the Department of Computer Science , ETH Zurich (starting August 2025), where he will join the ETH Systems Group . Prior to this, he spent 3 years as a Systems Researcher at Google's Systems Research Group in Sunnyvale, USA. He holds a Ph.D. in Computer Science from the University of Wisconsin-Madison (advised by Prof. Jignesh Patel) and a Bachelor's/Master's from the University of Athens, Greece (advised by Prof. Yannis Ioannidis). His research focuses on optimizing databases and data processing for modern hardware through software-hardware co-design. Key areas include database efficiency in memory-centric architectures, learned query optimizers, and cloud resource management. His work is supported by a Facebook Fellowship and has been recognized with the EDBT 2016 Medal for best paper. Teaching: Taught CS 564 - Database Management Systems at UW-Madison (Spring 2022). Service: Served on program committees for SIGMOD, VLDB, CIDR, and others, and chairs the CIDR Proceedings Committee. Key Publications: His recent work includes studies on memory-centric computing for databases, cardinality estimation benchmarks, and adaptive query processing techniques.

Peter Pietzuchمشاهده پروفایل

استاد

• Distributed Systems
• Cloud Computing
• Big Data Processing
• +۵ مورد دیگر

Peter Pietzuch is a Professor in the Department of Computing at Imperial College London, where he leads the Large-Scale Data & Systems (LSDS) group. He also serves as the Director of Research and is a Visiting Researcher at Microsoft Research Cambridge. Pietzuch holds a Ph.D. from the University of Cambridge and a B.A. from Girton College. His research spans distributed systems, cloud computing, big data processing, and systems security. Key interests include: Scalable architectures for cloud-native applications Efficient stream processing and machine learning systems Trusted execution environments and secure cloud infrastructure Optimization of serverless computing and distributed databases His recent publications focus on adaptive machine learning frameworks, secure cloud resource management, and high-performance stream processing systems. Trends show strong emphasis on hardware-software co-design, confidential computing, and fault-tolerant architectures. Awards include: Best Paper Award at Middleware'03 He actively advises PhD students and secures grants for projects like Faasm (serverless computing) and Teechain (blockchain security). His LSDS group collaborates with industry partners including Microsoft Research. Pietzuch teaches undergraduate and graduate courses including Scalable Systems for the Cloud and Operating Systems . He co-founded the ACM DEBS conference and serves on steering committees for EuroSys and Middleware.

• Embedded Machine Learning
• High-Performance Computing
• Computer Architecture
• +۶ مورد دیگر

Holger Fröning is a full professor at Heidelberg University’s Institute of Computer Engineering (ZITI), where he leads the Hardware and Artificial Intelligence (HAWAII) Lab. His research focuses on embedded machine learning , high-performance computing , and hardware-software co-design , with emphasis on resource efficiency, power optimization, and emerging architectures like analog , photonic , and resistive memory systems. He has held leadership roles including Managing Director of ZITI (2023–present) and Dean of Studies for Computer Science (2019–2022) , and has collaborated with institutions such as NVIDIA Research, Chinese Academy of Sciences, and Graz University of Technology. Research Trends : His recent publications explore Bayesian neural networks , green machine learning , analog computing noise mitigation , and GPU/FPGA optimization . Articles highlight photonic computing for AI , memory-efficient training , and hardware-aware DNN compression . Scientific Awards : 2025 HiPEAC Paper Award (Nature Computational Science) 2014 Google Faculty Research Award Multiple Best Paper Awards (IPDPS, ICPP, ECML-PKDD workshops) Leadership & Service : Organized workshops (WEML, ITEM, F4HD), chaired tracks at EuroPar and ISC, and served on program committees for ICPR, ECAI, and FPL. Education & Affiliations : PhD and MSc from University of Mannheim (2007/2001). Sponsors include DFG, FWF, FFG, NVIDIA, SAP, and XILINX.

• Reconfigurable Computing
• Field-Programmable Gate Arrays (FPGA)
• High-Level Synthesis
• +۳ مورد دیگر

Paolo Ienne is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), where he leads the Processor Architecture Laboratory (LAP) within the School of Computer and Communication Sciences. His research focuses on advancing reconfigurable computing systems through innovative FPGA architectures and high-level synthesis methodologies. His primary research domains include reconfigurable computing, FPGA architecture design, dynamically scheduled dataflow circuits, and hardware acceleration techniques. Recent work emphasizes memory system optimization for FPGAs, formal verification of circuit transformations, and rapid C-to-hardware compilation flows. He has pioneered approaches for handling thousands of outstanding memory misses in FPGA accelerators and developed novel techniques for switch-block exploration without explicit pattern enumeration. Analysis of his 2023-2025 publications reveals a strong trend toward practical FPGA deployment challenges, with increasing focus on HBM integration, virtual memory systems for PCIe-attached devices, and formally verified circuit transformations. His work consistently targets real-world bottlenecks in high-level synthesis toolchains while maintaining theoretical rigor in dataflow architecture design. Professor Ienne's laboratory receives support from the Swiss National Science Foundation and industry partners including Huawei, enabling cutting-edge research in FPGA-based acceleration. His collaborative network spans major semiconductor companies and academic institutions worldwide, with frequent co-authorship on conference proceedings and journal publications in IEEE and ACM venues.

Fabio Mirandaمشاهده پروفایل

استادیار

• Visualization
• Data Management
• Machine Learning
• +۷ مورد دیگر

Fabio Miranda is an Assistant Professor at the Department of Computer Science, University of Illinois at Chicago (UIC) . His research bridges visualization , machine learning , data management , and computer graphics to enable interactive visual analysis of large-scale urban datasets . He has developed systems like UrbanRama (for VR navigation) and The Urban Toolkit (a grammar-based framework), which have been deployed in academia, industry, and government agencies. Education: Ph.D., Computer Science , New York University (2018) M.S., Computer Science , Pontifical Catholic University of Rio de Janeiro (2011) B.S., Computer Science , Federal University of Minas Gerais (2009) Research Interests center on urban visual analytics , 3D analytics , and machine learning for accessibility . His work addresses challenges like sunlight access , sidewalk quality assessment , and commuting flow modeling , often collaborating with urban planners, climate scientists, and occupational therapists. Scientific Recognition includes awards at IEEE VIS , SIBGRAPI , and SIGMOD . His research is funded by NSF , NIH , DOT , and DPI , with media coverage in The New York Times , The Economist , and Architectural Digest . Teaching includes courses like CS 524: Big Data Visualization and Analytics and CS 424: Visualization and Visual Analytics . He emphasizes web-based systems, dataflow frameworks, and interdisciplinary collaboration, with open positions for PhD , MSc , and undergraduate researchers .