جست‌وجوی استاد و پژوهشگر

Richard K. Choمشاهده پروفایل

دانشیار

• Supply Chain Management
• Logistics
• Inventory Management
• +۲ مورد دیگر

Richard K. Cho is an Associate Professor in the Operations and Information Management Area of the Faculty of Business at the University of New Brunswick (Saint John campus), where he has taught since 2005. His extensive university service includes roles as UNB Senator, Senate Admissions Committee Chair, and long-standing faculty advisor for the Golden Key International Honour Society. His academic credentials include: Ph.D. in Management Sciences from University of Waterloo (2002) M.Sc. in Management Sciences from Korean Advanced Institute of Science and Technology (1987) B.Sc. in Industrial Engineering from Seoul National University (1985) Dr. Cho's research centers on supply chain coordination mechanisms , specializing in vendor-managed inventory systems with constraints like limited storage capacity and stockout-cost sharing. His work integrates game theory and stochastic optimization to develop practical contract frameworks that balance risk and efficiency in complex supply chains. Publications appear in top-tier journals including Operations Research and Manufacturing & Service Operations Management. His publication trajectory reveals consistent focus on optimizing contractual arrangements in inventory systems, with increasing sophistication in modeling storage limitations and cost-sharing structures between supply chain partners. Dr. Cho secured two SSHRC research grants in 2008 and served on SSHRC's national adjudication committee for Insight Development Grants in 2011. He teaches core courses including Supply Chain Management & Logistics (BA 4653) and Production & Operations Management (BA 3653) at undergraduate and MBA levels, drawing on prior industry experience at Samsung Electronics where he contributed to DRAM development projects.

• Cyber-Physical Systems
• Internet of Things (IoT) Security
• Computer Architecture
• +۵ مورد دیگر

Hokeun Kim is an Assistant Professor in the School of Computing and Augmented Intelligence (SCAI) at Arizona State University (ASU), part of the Ira A. Fulton Schools of Engineering. He previously held positions at Hanyang University (2021-2023) and worked in industry roles at Google, LinkedIn, and HP Labs. His research focuses on cyber-physical systems, IoT security, and computer architecture, with a particular emphasis on safety and security aspects of time-sensitive systems. Education: Ph.D. in EECS, University of California, Berkeley (2017) M.S. in EECS, Seoul National University (2012) B.S. in Computer Science and Engineering, Seoul National University (2010) Research Interests: Kim’s work spans secure IoT frameworks, real-time embedded systems, and edge computing. He develops tools like the Secure Swarm Toolkit (SST) and Lingua Franca, addressing challenges in distributed system security, interoperability, and performance. Key Contributions: Authored over 30 peer-reviewed publications in top venues like IEEE Transactions, ACM Conferences, and DATE. Received the ACM/IEEE Best Paper Award (IoTDI 2017) and IEEE Micro Top Picks Honorable Mention (2017). Active in organizing conferences (e.g., DATE, FDL) and serves on technical committees for top journals/conferences. Teaching: Courses include Computer Architecture I/II, Real-Time Embedded Systems, and IoT design at both undergraduate and graduate levels.

Subramanian Iyerمشاهده پروفایل

استاد

• System Scaling Technology
• Advanced Packaging
• 3D Integration
• +۲ مورد دیگر

Subramanian Iyer is a Distinguished Professor at the University of California, Los Angeles (UCLA), holding the Charles P. Reames Endowed Chair in Electrical Engineering with joint appointments in Electrical and Computer Engineering and Materials Science and Engineering. His laboratory focuses on cutting-edge semiconductor research. Primary research domains include: System Scaling Technology : Innovations in semiconductor miniaturization 3D Integration & Advanced Packaging : Techniques for vertical chip stacking and heterogeneous integration Memory Subsystems : Development of embedded DRAM and novel memory architectures Neuromorphic Computing : Hardware implementations of brain-inspired computing Publication analysis reveals three dominant themes across 35+ years of research: Semiconductor materials innovation (SiGe alloys, silicides, MBE growth) Memory technology evolution (embedded DRAM, eFUSE, low-latency designs) System integration advancements (3D packaging, TSV, heterogeneous integration) Significant honors include: IEEE Fellow (1995) and Daniel Noble Award (2012) National Academy of Inventors Fellow (2017) IBM Fellow (2010) with 30+ invention plateaus IMAPS Educator Award (2021) and Daniel C. Hughes Memorial Award (2020) He leads UCLA's NanoLab facility and has been featured in The New York Times and Wall Street Journal for pioneering chiplet technology. Current work focuses on megachip architectures and open-access semiconductor prototyping.

Francesc Moll Echetoمشاهده پروفایل

دانشیار

• Energy Harvesting
• Integrated Circuit Design
• Low Power Electronics
• +۵ مورد دیگر

Francesc Moll Echeto is an Associate Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Departament d'Enginyeria Electrònica and the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He leads the HIPICS research group focused on high-performance integrated circuits and systems design. His expertise spans energy harvesting, low-power electronics, process variability management, and secure circuit design. He coordinates the Doctorat en Enginyeria Electrònica program and has coordinated EU-funded projects like the European Processor Initiative (EPI). Education: M.S. in Physics, Universitat de les Illes Balears, 1991 Ph.D. in Electronic Engineering, Universitat Politècnica de Catalunya, 1995 Research Focus: His work addresses energy-efficient computing, including: - Design of circuits tolerant to manufacturing variability - Energy harvesting from mechanical and RF sources - Secure hardware countermeasures against side-channel attacks - RISC-V architecture implementations in advanced technologies - Edge computing and autonomous sensor systems Grants & Collaborations: Coordinator of R&D projects like 'ARQUITECTURA DE COMPUTADORES DE ALTAS PRESTACIONES' (PID2023-146511NB-I00) Part of the Barcelona Zettascale Lab consortium Collaborations with Barcelona Supercomputing Center and industry partners Awards: HiPEAC Paper Award (2023, 2024) for innovations in vector processing and DNN acceleration Labs/Teams: Leads the HIPICS group and the EFRICS subgroup, collaborating on EU-funded initiatives like the European Processor Initiative. Active in open-source silicon projects (e.g., Sargantana RISC-V processor).

Ashish Venkatمشاهده پروفایل

دانشیار

• Computer Architecture
• Compilers
• Computer Security
• +۱۲ مورد دیگر

Ashish Venkat is an Associate Professor in the Department of Computer Science at the University of Virginia, part of the School of Engineering and Applied Science. He holds a Ph.D. from UC San Diego and has established himself as a leading researcher in computer architecture, compilers, and computer security. Research Interests: His research focuses on cross-disciplinary hardware and software techniques to build secure, high-performance computing systems. He investigates robust exploit mitigations that maintain energy efficiency and programmability, with a particular emphasis on speculative execution, memory safety, hardware security, and privacy-preserving computing. He also explores the application of machine learning to detect security threats and model execution behavior. Publication Trends: His recent publications (2020–2025) demonstrate a strong focus on hardware-based security, particularly microarchitectural vulnerabilities (e.g., micro-op cache attacks), memory safety via microcode capabilities, and secure accelerators for bioinformatics. There is a consistent trend of publishing in top-tier venues like ISCA, MICRO, IEEE S&P, and USENIX Security, often featuring novel hardware/software co-design solutions. Scientific Awards: NSF CAREER Award (2023) NSF CRII Award (2018) IEEE Micro Top Pick (2019) IEEE Design & Test Top Pick (2020, 2021) HPCA Best Paper Runner-Up (2019) DATE Best Paper Nominee (2023) UVA Research Achievement Award (2023) ISCA Prolific Author of the Decade (2013–2022) Advising and Grants: He actively mentors graduate and undergraduate students, many of whom have pursued advanced degrees or joined leading tech companies. He has secured significant funding as PI or co-PI from NSF, DARPA, SRC, and Intel, including a $4.9M DARPA HERCULES grant and an NSF CAREER award. His projects focus on holistic security solutions, speculative optimization, and privacy-preserving machine learning frameworks. Labs and Teams: He leads a research group focused on secure and efficient computing systems, collaborating with researchers at institutions like UC San Diego, UC Riverside, and UC Irvine, as well as industry partners including Intel and IBM.

• Solid-State Electronics
• Microfluidics
• Flexible Electronics
• +۷ مورد دیگر

Professor Arokia Nathan is affiliated with the Department of Engineering at the University of Cambridge , where he holds the Chair in Photonic Systems and Displays. His work bridges semiconductor device engineering, flexible electronics, and intelligent systems. Specializes in Thin-Film Transistors (TFTs) for displays and sensors Key contributions to digital microfluidics and neuromorphic computing Focus on ultra-low-power and high-frequency CMOS circuits Advances in oxide semiconductor materials and hybrid electronics Recent publications highlight trends in neuromorphic perception , flexible battery technologies , and RF/wireless communication systems . His research also emphasizes bioinspired robotics , wearable electronics , and intelligent IoT devices .

Jeffrey Youngمشاهده پروفایل

پژوهشگر

• High-Performance Computing (HPC)
• Computer Architecture
• Quantum Programming
• +۶ مورد دیگر

Jeffrey Young is a Principal Research Scientist at Georgia Institute of Technology, working with the Partnership for Advanced Computing Environments (PACE) and leading Georgia Tech’s Open Source Program Office. His research focuses on high-performance computing (HPC), computer architecture, and novel accelerators including GPUs, FPGAs, and Arm/RISC-V processors. He leads next-generation computing strategy at PACE and directs the NSF-funded CRNCH Rogues Gallery testbed, which explores post-Moore accelerators like neuromorphic and near-memory systems. His work bridges hardware-software co-design and scientific software engineering. Recent research trends show expertise in quantum programming (Qwerty/ASDF), heterogeneous computing (Cupbop), and memory system optimization across GPUs, FPGAs, and CPUs. He has contributed to exascale workflows (HIPLZ), safe HPC libraries, and UAV co-simulation frameworks. Scientific Awards: NSF-funded CRNCH Rogues Gallery testbed (2020-2024) Education: Ph.D. in Computer Architecture (2013), advised by Dr. Sudhakar Yalamanchili Labs & Initiatives: Director, CRNCH Rogues Gallery testbed Co-Director, Georgia Tech Center for Scientific Software Engineering Director, Georgia Tech Open Source Program Office

• Database Systems
• Data Analytics
• Machine Learning in Databases
• +۳ مورد دیگر

Jignesh M. Patel is a Professor at the University of Wisconsin, Madison, WI, USA , with over 25 years of contributions to database systems, data analytics, and hardware-aware query processing. His work bridges theoretical advancements with practical systems engineering. Research Interests span: Database systems optimization (query processing, transaction management) Hardware acceleration for analytics (eBPF, PIM, GPUs) Machine learning integration in databases (feature selection, model optimization) Efficient data structures (hashing, encoding, indexing) Multi-tenant and cloud database management Recent Work focuses on kernel-embedded databases (BPF-DB, 2025), memory-efficient dataframe processing (SplitDF, 2024), and algorithmic-hardware co-design for dense retrieval (DReX, 2025). He has pioneered techniques for adapting to data skew (VIP Hashing, 2022), leveraging static analysis in R optimization (ROSA, 2017), and rethinking benchmarking paradigms. Collaborations include key partnerships with: Systems researchers (Andrew Pavlo, José F. Martínez) Machine learning experts (Arun Kumar, Kevin Skadron) Education-focused colleagues (Adalbert Gerald Soosai Raj, Richard Halverson) Industry leaders (David J. DeWitt, Microsoft Research)

• Computer Architecture
• Embedded Systems
• Machine Learning Accelerators
• +۵ مورد دیگر

Marina Zapater Sancho is a researcher at the Embedded Systems Laboratory (ESL) within the School of Engineering at École Polytechnique Fédérale de Lausanne (EPFL) . She specializes in computer architecture, with a focus on energy-efficient systems, AI accelerators, and memory-centric computing paradigms. Research Interests: Compute-Near-Memory (CnM) : Pioneering architectures like SideDRAM and processing-near-bank designs to reduce energy consumption and latency in DRAM systems. AI Accelerators : Frameworks such as LIONHEART for analog-digital hybrid systems, and Gem5-AcceSys for exploring interconnects in ML accelerators. System Simulation : Contributions to RISC-V full-system simulation validation (gXR5) and component-level calibration methodologies. Her work bridges software and hardware, addressing challenges in heterogeneous systems, thermal management in 2.5D/3D packages, and virtual memory optimization for cache-intensive workloads. Recent trends emphasize energy-proportional computing and edge AI deployment . Grants & Collaborations: Funded by EU H2020 programs and the ACCESS-AI Chip Center (Hong Kong), her research is conducted within the ESL team led by Prof. David Atienza Alonso.

Xuan Zhangمشاهده پروفایل

دانشیار

• Artificial Intelligence Hardware
• Machine Vision Sensors
• Electronic Design Automation
• +۳ مورد دیگر

Xuan Zhang serves as Associate Professor in Electrical and Computer Engineering at Northeastern University, leading the Sensory AI Lab since joining in January 2024. Her research bridges computer architecture, integrated circuits, and artificial intelligence to develop miniaturized AI systems for autonomous physical platforms. She earned her PhD in Electrical and Computer Engineering from Cornell University in 2012. Her educational background forms the foundation for her interdisciplinary work spanning hardware and software co-design. Dr. Zhang's research focuses on artificial intelligence hardware, machine vision sensors, and security for autonomous systems. She pioneers techniques for efficient in-sensor computing, analog circuit optimization via machine learning, and hardware-level privacy preservation. Her work addresses critical challenges in energy efficiency, robustness, and security for edge AI deployment, particularly in resource-constrained environments like medical devices and autonomous vehicles. Analysis of her 2023-2025 publications reveals three dominant trends: (1) hardware-accelerated privacy mechanisms for sensors, (2) machine learning-driven analog circuit design automation, and (3) energy-efficient architectures for neural network inference. These works consistently target real-world applications in healthcare, autonomous systems, and semiconductor design. Her accolades include the prestigious NSF CAREER Award (2020) and leadership in a $10 million federal semiconductor initiative. She contributes to national efforts in AI-powered chip design through the National Center for the Advancement of Semiconductor Technology. Dr. Zhang advises graduate researchers in the Sensory AI Lab, securing significant funding for projects spanning hardware security, in-sensor computing, and autonomous system assurance. Her lab collaborates with federal agencies and industry partners on cutting-edge semiconductor research. The Sensory AI Lab operates at the hardware-software interface, developing novel architectures for intelligent edge devices. Current projects include optical privacy preservation, robust analog design tools, and energy modeling frameworks for in-sensor visual computing systems.

• Biomedical Engineering
• Circuits and Systems
• Neural Engineering
• +۳ مورد دیگر

Halil Andac Yigit is a Doctoral Assistant at the Telecommunications Circuits Laboratory (TCL) within the School of Engineering (STI) at EPFL. He is affiliated with the Institute of Microengineering (IEM) and pursues a Doctoral Program in Electrical Engineering through the École Doctorale d'Électronique et d'Electrotechnique (EDoc). His research focuses on biomedical circuits, energy harvesting, and low-power electronics for medical implant systems. Yigit's work emphasizes implantable cochlear devices, wireless power solutions, and precision neural stimulation interfaces. Education : Current doctoral student in Electrical Engineering at EPFL. Research Interests : Development of energy-efficient biomedical devices, including cochlear implants and neural stimulation systems. Specializes in low-power circuits for medical applications, wireless power transfer, and advanced memory technologies like eDRAM optimization. His research bridges microelectronics design with clinical needs, aiming for miniaturization and energy autonomy in implantable systems. Lab Affiliation : Telecommunications Circuits Laboratory (TCL), EPFL, where he collaborates on projects involving MEMS-based systems and autonomous medical devices.

Tyler Bletschمشاهده پروفایل

دانشیار

• Hardware Security
• Software Security
• Computer Architecture
• +۳ مورد دیگر

Tyler Bletsch is an Associate Professor of the Practice in the Department of Electrical and Computer Engineering at Duke University's Pratt School of Engineering. He joined the Duke faculty in November 2015 after several years of work in industry with NetApp, bringing practical industry experience to his academic role. His teaching focuses on practical aspects of computer engineering and systems programming. Dr. Bletsch received his B.S. from North Carolina State University in 2004, followed by his D.Phil. from the same institution in 2011. His doctoral research focused on software security, particularly addressing code-reuse attacks. His research interests span hardware and software security, with a particular focus on Rowhammer vulnerabilities and mitigation techniques. He also explores power-aware computing for high-performance systems and has interests in robotics and technology education with an emphasis on project-oriented learning. Dr. Bletsch's publication record shows a consistent focus on computer security, particularly Rowhammer attacks and mitigation strategies in recent years. His earlier work addressed code-reuse attacks like Jump-oriented Programming and Return-oriented Programming. He has also contributed to power management research for high-performance computing systems. Dr. Bletsch is actively involved in mentoring students through the Duke Combat Robotics club and FIRST robotics teams. He teaches a variety of courses including Computer Architecture, Digital Systems, Computer and Information Security, and Engineering Software for Maintainability. His teaching philosophy emphasizes hands-on, project-based learning. He maintains an active research laboratory focused on computer security and has been featured in Duke Today for his educational video "Tyler Bletsch Takes You on a Tour of the Insides of a Computer," which demystifies computer hardware for general audiences.

Bruce Jacobمشاهده پروفایل

استاد

• Memory Systems
• Computer Architecture
• Memory Devices
• +۷ مورد دیگر

Bruce Jacob is a Professor in the Cyber Science Department within the School of Engineering, Computing, and Weapons at the United States Naval Academy, where he joined in Fall 2022. Prior to USNA, he served as a professor of Electrical & Computer Engineering at the University of Maryland for 25 years, establishing himself as a leading expert in memory systems and computer architecture. Dr. Jacob received his A.B. in Mathematics from Harvard in 1988 and his Ph.D. in Computer Science & Engineering from The University of Michigan in 1997. Before graduate school, he worked in Boston start-ups as a software engineer at Boston Technology and later as chief engineer and system architect at Priority Call Management, which was successfully acquired in the late 1990s. His research focuses on memory systems, computer architecture, and memory devices, with significant contributions to memory system design across industry and government sectors. Jacob has designed computer-system architectures and memory-system architectures for major organizations including Micron (Hybrid Memory Cube DRAM architecture), Cray (Black Widow memory system), Northrop Grumman (experimental ultra-low-power datacenter), and the European Commission (1024-core Teraflux chip). His work spans resistive memory systems, non-volatile memory, memory simulation, and hardware security. His publication record demonstrates consistent leadership in memory systems research, with recent work focusing on ReRAM development, trusted execution environments for in-storage computing, and advanced memory simulation techniques. His research shows a clear trajectory toward monolithic memory integration, 3D stacking, and addressing the semantic gap between software and memory systems. Fellow of the IEEE Patent in memory-systems design Three patents in electric guitar circuit design Featured in Washington Post, Los Angeles Times, Chronicle of Higher Education, and NPR for guitar-related innovations Jacob has written two textbooks on computer memory systems and numerous articles spanning memory systems, computer design, embedded systems, operating system design, and even ventured into astrophysics and algorithmic composition. His DRAMsim memory simulator has become an industry standard tool. His practical industry experience complements his academic work, having consulted for major technology companies on memory system design challenges.

• Distributed Systems
• Computer Networks
• Middleware
• +۱۳ مورد دیگر

Antonio Corradi is a Full Professor of Computer Networks and Infrastructures supporting Cloud and Big Data at the University of Bologna's School of Engineering, within the Department of Computer Science - Science and Engineering. His roles include President of the regional CLUSTER RER for service innovation, President of the Alma Mater FAM Foundation, and Director of the UNIBO High Studies Center in Buenos Aires. He previously served as Director of the DISI department (2018–2021) and International Delegate for Latin America (2014–2018). His research focuses on distributed systems, middleware for pervasive computing, cloud solutions, mobile systems, smart cities, Industry 4.0/5.0, and 5G communication standards. Education: Laurea cum laude in Electrical Engineering (University of Bologna, 1979) and a Master's in Computer Engineering from Cornell University (1981, supported by a Fulbright-Hayes grant). He joined the University of Bologna as a Researcher in 1983 and became Full Professor in 2000. Research interests span distributed/parallel systems, middleware for mobile agent systems, cloud computing, smart city monitoring, and Industry 4.0 protocols. He emphasizes QoS-aware solutions, edge computing, and IoT integration. His work includes designing frameworks for big geospatial data and novel architectures for serverless and fog computing environments. Selected scientific awards include the 1980 'Cavalieri del Lavoro' prize for his thesis. He actively contributes to institutional duties, including the CCIB (Computer Services Centre of the Engineering School) and CINI Bologna University Section (Italian Interuniversity Consortium). In advising and grants: He coordinates PhD programs and has led projects funded by MIUR, CNR, and European initiatives. Notable collaborations include industry grants with Jakala, OTConsulting, ENAV-Sicta, and the Zefiro Consortium. His projects address challenges in energy efficiency, smart manufacturing, and healthcare management during crises. Labs/Teams: Developed platforms like SOMA and REDMAN middleware. Involved in initiatives such as ParticipAct (mobile crowdsensing), COLOMBO (vehicular traffic monitoring), and the Audit4Cloud platform for cloud performance auditing.

Andrew Kwongمشاهده پروفایل

استادیار

• Computer Security
• Applied Cryptography
• Side-Channel Attacks
• +۳ مورد دیگر

Andrew Kwong is an Assistant Professor in the Department of Computer Science at the University of North Carolina at Chapel Hill, specializing in computer security and applied cryptography with a focus on side-channel attacks and defenses. His research bridges hardware vulnerabilities and cryptographic systems, particularly targeting microarchitectural weaknesses. His primary research interests include Rowhammer-based exploits , side-channel attacks on cryptographic implementations , hardware security modules , and microarchitectural vulnerabilities . Kwong investigates how physical hardware properties (e.g., DRAM disturbance errors, cache hierarchies, acoustic properties) can compromise system security, with recent work demonstrating end-to-end key recovery against post-quantum cryptography and novel Rowhammer amplification techniques. His publication record features high-impact venues including IEEE S&P (5 papers), USENIX Security (4 papers), and CCS (2 papers), with notable work When Frodo Flips receiving a Best Paper Award Honorable Mention at CCS 2022. Research trends show consistent focus on practical hardware-assisted attacks, evolving from acoustic side-channels (2018-2019) to Rowhammer sophistication (2020-2025). Best Paper Award Honorable Mention (CCS 2022) Kwong teaches graduate courses including Hardware Security and Side-Channels (COMP 790-184) and Research Topics in Computer Security (COMP 790-185), emphasizing hands-on lab assignments for conducting and defending against hardware attacks. His syllabi cover foundational topics like cache side-channels, Spectre variants, Rowhammer, and trusted execution environments, requiring students to implement real-world attacks through programming assignments.