Günhan Dündar is a Professor in the Department of Electrical and Electronics Engineering at Bogazici University. His research specializes in analog/mixed-signal integrated circuit design and computer-aided tools for VLSI systems. Key contributions include aging-robust circuit design automation, low-power CMOS architectures, and security primitives like physically unclonable functions (PUFs). The Dündar Lab explores reconfigurable systems for reliability enhancement in nanoscale technologies. Collaborations address hardware vulnerabilities in IoT devices and optimization of ring oscillator networks for cryptographic applications. Teaching emphasizes design automation, semiconductor physics, and hardware implementation methodologies.
Tommaso Foscale is a Lecturer at the Department of Control and Computer Science (DAUIN), Politecnico di Torino. He is also a third-year PhD student in Computer and Control Engineering, affiliated with the Electronic CAD & Reliability group. PhD in Computer and Control Engineering (2022–2025) MSc in Computer Engineering, cum laude (2021) His research focuses on testing techniques for automotive systems on chip , with specific expertise in: Wafer-level and manufacturing testing FPGA-based test equipment design Single-event upset (SEU) injection Cost-effective characterization of SoCs Recent publications highlight trends in multi-site testing optimization and reliability engineering for automotive electronics. He has contributed to IEEE symposia on test strategies and functional safety. As a teaching assistant, he collaborates on Operating Systems courses for Computer Engineering and Computer Science Engineering programs (2023–2025). His research group actively explores fault tolerance and embedded systems testing.
Supratim Biswas is a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Bombay, where he has served since 1995. His academic career spans over four decades, beginning as a Lecturer in the Computer Center in 1980, progressing to Assistant Professor in 1985, Associate Professor in 1990, and achieving full Professorship in 1995. He has held significant administrative roles including Dean of Academic Programs (2007-2010), Head of CSE Department (2000-2003), and Director of IITB-Monash Academy (2009-2010). His research interests focus on Programming Languages, Compiler Optimization, Parallelizing Compilers, Parallel and Distributed computing, and Combinatorial Optimization . Professor Biswas has made substantial contributions to compiler technology, particularly in parallelization techniques for modern architectures. His work bridges theoretical compiler design with practical applications in high-performance computing and CAD systems, demonstrating how compiler optimizations can significantly enhance computational efficiency in real-world applications. The publication record shows a consistent research trajectory spanning nearly four decades, with recent work (2012-2015) focusing on GPU-based parallel algorithms, loop parallelization techniques for non-uniform data dependencies, and mesh processing for CAD applications. His research demonstrates evolution from foundational compiler theory to contemporary parallel architectures, maintaining relevance through practical applications in computational geometry, CAD systems, and high-performance computing. Excellence in Teaching Award (2000) Professor Biswas has supervised over 60 doctoral and master's students, establishing himself as a dedicated mentor in systems software education. His sponsored research portfolio includes significant projects with CDAC (350 lacs), MIT (133 lacs), TCS (81.3 lacs), and Intel Corporation (10 lacs), demonstrating strong industry-academic collaboration. His teaching portfolio spans both undergraduate and postgraduate levels, including foundational courses like Discrete Structures and advanced topics like Parallelizing Compilers, reflecting his commitment to curriculum development across multiple generations of computer science education. His laboratory work has supported students across B.Tech, M.Tech, and Ph.D. programs, with particular emphasis on compiler construction and operating systems. Through the Continuing Education Program, he has extended his expertise to industry professionals, conducting numerous specialized courses for organizations including VSNL, TCS, DRDO, and Reliance.
Sara Achour is an Assistant Professor jointly appointed to the Computer Science and Electrical Engineering departments at Stanford University. She earned her PhD in Computer Science from MIT in 2021. Her research develops programming languages, compilers, and runtime systems for emerging analog computing platforms. Dr. Achour leads research in hardware-aware optimization frameworks and novel analog compute paradigms, with applications spanning quantum computing, IoT devices, and neuromorphic systems. Her research focuses on: Bridging software abstractions with unconventional hardware capabilities Energy-efficient computing paradigms for edge devices Cross-layer optimization of analog and hybrid computing systems Publication analysis reveals consistent themes in analog computing architectures, hardware-aware optimizations, and emerging computing platforms. Recent work explores quantum compilation techniques, hyperdimensional computing optimizations, and hardware security metrics. Dr. Achour advises multiple graduate students including: 16 doctoral candidates across computer architecture and quantum computing 10 master's students in software-hardware co-design She maintains active research collaborations through the Stanford SystemX Alliance.
Dr Shahedur Rahman is a Senior Lecturer in Computer Science at Middlesex University , with extensive contributions to telecommunications engineering, image processing, and bioinformatics. His research focuses on wireless network optimization, perceptual distortion metrics for video coding, and molecular biology database integration. Research Interests : Interference management in LTE/5G networks Perceptual quality assessment in multimedia systems Computer vision for accessibility and mobility aids Integration of biological and medical databases Wavelet-based image compression Genomic data analysis Selected Scientific Publications highlight trends in: Dynamic channel allocation techniques for LTE networks SSIM/SATD hybrid distortion metrics Gene mutation data modeling Image processing for visual impairment assistance Database interoperability in medical systems Optimization algorithms for hardware systems
Prof. Dr. Şule Özev is an active faculty member and Professor at Arizona State University, where she has been serving since 2008. Previously, she was on the faculty at Duke University from 2002 to 2008. She received her Ph.D. from the University of California, San Diego in 2002. Her academic work is centered in the domain of electronic systems and integrated circuit design. Her research focuses on electronic design automation, testability of VLSI circuits, and reliability in nanoscale systems. She contributes significantly to the field of semiconductor testing and design for testability, with applications in modern integrated circuit development. Her editorial role at IEEE Design and Test of Computers underscores her leadership in the discipline. Dr. Özev has received numerous accolades for her scholarly contributions, including multiple best paper awards from top-tier conferences such as ITC, ETS, VTS, ICCD, and LACAS, as well as the Best Doctoral Thesis Award from UC San Diego. Best Doctoral Thesis Award, University of California, San Diego Best Paper Award, ETS 2018 Best Paper Award, LACAS 2017 Best Paper Award, VTS 2015 Best Paper Award, VTS 2014 Best Paper Award, ITC 2009 Best Paper Award, ETS 2009 Best Paper Award, ICCD 2005 She has advised graduate students and contributed to funded research projects in electronic design and testing, though specific names and grants are not listed. Her work continues to influence both academic and industrial practices in circuit testing and design automation. Dr. Özev is also actively involved in the academic community through her editorial responsibilities at IEEE Design and Test of Computers , where she helps shape the dissemination of cutting-edge research in her field.
Claudio Talarico is a Professor in the Department of Electrical and Computer Engineering at Gonzaga University's School of Engineering & Applied Science. He holds a Ph.D. in Electrical Engineering from the University of Hawaii and an M.S. from the University of Genoa, Italy. With industry experience at Infineon Technologies, IKOS Systems, and Marconi Communications, his expertise spans VLSI design, embedded systems, and hardware/software co-design. His research focuses on: Low-power/high-performance VLSI circuits Embedded system-on-chip design Computer-aided design methodologies Wireless communication systems Hardware/software co-design Recent publications (2020-2024) demonstrate strong emphasis on: Beam steering architectures for 5G/wireless systems Angle-of-arrival estimation techniques Time synchronization in body area networks Health monitoring platforms FPGA/digital implementations He teaches core courses including VLSI Circuits & Systems, Computer Hardware Design, and Digital Systems. No awards or current students are documented in available materials.
Cheng-Kok Koh is a Professor of Electrical and Computer Engineering at Purdue University's Elmore Family School of Electrical and Computer Engineering. He is based in West Lafayette, Indiana, with an office in MSEE 254. His research focuses on VLSI and Circuit Design, particularly in Computer-Aided Design (CAD) for Very Large-Scale Integration (VLSI). Education: Bachelor of Science (CS), National University of Singapore, 1991 Bachelor of Science (CS) with First Class Honors, National University of Singapore, 1992 Master of Science (CS), National University of Singapore, 1996 Doctor of Philosophy (CS), University of California, Los Angeles, 1998 Research Interests: Dr. Koh specializes in the design and optimization of integrated circuits, with a focus on CAD methodologies for VLSI systems. His work bridges theoretical computer science and practical electronics engineering to enhance hardware efficiency and scalability. Advising & Grants: No specific advisees, grants, or funding details are listed in the provided information. Labs/Teams: No affiliated labs or collaborative teams are explicitly mentioned in the profile.
Nima Kolahimahmoudi is a Ph.D. student in Computer and Systems Engineering at the Polytechnic of Turin, currently in his 38th cycle (2022-2025). He is affiliated with the Department of Control and Computer Engineering (DAUIN) and serves as an external lecturer and teaching assistant. His research is supervised by Professor Paolo Bernardi and Richard Cantoro. Education: Master’s in Electronic Engineering (2022) from Polytechnic of Turin Research Group: CAD - Electronic CAD & Reliability Group (DAUIN) His research focuses on functional safety techniques for automotive-oriented Systems-on-Chip (SoCs), particularly targeting analog and mixed-signal circuits, embedded memories, and reliability testing. He has contributed to advancements in low-area ADC design, irradiation-based memory parameter extraction, and automated self-test methodologies for fault coverage improvement. Recent publications highlight trends in automotive electronics reliability, including analog/mixed-signal circuit design, SoC measurement systems, irradiation testing, and fault coverage optimization. These works span conferences like IEEE DTTIS, VLSI-SoC, and IEEE European Test Symposium. Nima collaborates in teaching the 2024/25 1st-level degree course in Computer Sciences at Polytechnic of Turin, specifically for Automotive Engineering. His academic work emphasizes test automation, memory reliability, and functional safety frameworks for automotive systems.
Anestis Dounavis is an Associate Professor in the Department of Electrical and Computer Engineering at the Faculty of Engineering, University of Western Ontario. He holds a Ph.D. and is a licensed Professional Engineer (P.Eng.). Research Interests Design Automation of VLSI Circuits Modeling and Simulation of High-Speed Interconnects Signal Integrity (Board, Package, and Chip Level) Electromagnetic Interference and Immunity Analysis Mixed Signal Simulation Model-Order Reduction Techniques Simulation of Microelectromechanical (MEMS) and Optoelectronic Systems His work focuses on developing efficient algorithms for transient analysis of power distribution networks, electromagnetic compatibility, and passive macromodeling techniques. He has published extensively in top-tier IEEE journals, with recent articles spanning waveform relaxation methods, parameterized reduction, and sensitivity analysis. Notable scientific awards include: Ontario Ministry of Research and Innovation Early Research Award (2009) Carleton University Medal for Ph.D. Excellence (2004) Ottawa Centre for Research and Innovation Futures Award (2004) INTEL Best Student Paper Award (2003) University Medal at Master’s Level (2000) He has declined prestigious postdoctoral fellowships, including an NSERC Post-doctoral Fellowship (2003). Teaching recognitions include the University Student Council’s Teaching Honour Roll (2009-2010).
Steven Wilton is a Professor in the Department of Electrical & Computer Engineering at the University of British Columbia , where he also serves as Department Head (2019–2023, reappointed in 2024). He holds a BASc from the University of Victoria , and MASc and PhD from the University of Toronto . Education BASc (Victoria) MASc (Toronto) PhD (Toronto) His research focuses on Field-Programmable Gate Arrays (FPGAs) and Computer-Aided Design (CAD) algorithms . He explores FPGA architectures, post-silicon debugging, and programmable logic for System-on-a-Chip (SoC) design , aiming to enhance FPGA efficiency and accessibility for small/medium electronics companies. As part of the UBC SoC Research Group and ICICS , he contributes to advanced computing systems. He is also a Professional Engineer (BC) and IEEE Fellow , recognized for his work in electrical and computer engineering. Scientific Awards IEEE Fellow Dr. Wilton supervises graduate students like Andrew David Gunter (PhD in Electrical and Computer Engineering) and teaches courses including ELEC 402 , CPEN 311 , and CPEN 513 . His affiliations include the Institute for Computing, Information and Cognitive Systems (ICICS) and the Quantum Computing Research Cluster .
Yang (Cindy) Yi is a Professor in the Bradley Department of Electrical and Computer Engineering at Virginia Tech, and Director of the Multifunctional Integrated Circuits & Systems (MICS@VT) Lab. She holds roles as a Dean's Fellow and UDL Fellow. Her research focuses on neuromorphic computing, VLSI circuits, machine learning for wireless networks, and emerging nanodevices. Educated at Shanghai Jiao Tong University (B.S., M.S.) and Texas A&M (Ph.D.), she has over 180 publications and multiple best paper awards. Current projects include neuromorphic accelerators, energy-efficient architectures, and AI-driven communication systems. Awards include NSF CAREER (2018), ICTAS Junior Faculty Award (2019), and Dean’s Research Award (2024). Research interests span integrated circuits, neuromorphic systems, and AI applications in 5G/6G networks. She directs the BRICC Lab and collaborates with industry partners like Intel and Texas Instruments. Positions are available for students/postdocs in IC design and neuromorphic computing. Awards include multiple best paper recognitions (e.g., Charles K. Kao Award, IEEE Globecom), NSF grants, and leadership roles in conferences/journals. Her work bridges hardware design, AI algorithms, and interdisciplinary applications in edge computing and cybersecurity.
David Z. Pan is a Professor at the University of Texas at Austin, where he leads a prominent research group specializing in Electronic Design Automation (EDA) and Computer-Aided Design for Integrated Circuits. His extensive publication record spanning from 1997 to the present demonstrates his leadership in advancing the field of electronic design. Dr. Pan's research focuses on solving fundamental challenges in analog/mixed-signal circuit design automation, physical design methodologies, and the integration of machine learning techniques with traditional EDA problems. His work bridges theoretical advances with practical applications in semiconductor design, with particular emphasis on photonic computing, quantum circuit design, and FPGA optimization. His research has evolved from traditional layout and placement algorithms to incorporate cutting-edge AI and machine learning approaches for next-generation design automation. Analysis of his recent publications reveals a strong trend toward integrating artificial intelligence with EDA, including the use of large language models for circuit design automation, reinforcement learning for placement optimization, and deep learning for various aspects of the design flow. His work consistently addresses critical industry challenges while pushing the boundaries of what's possible in electronic design. Dr. Pan has advised numerous graduate students who have become significant contributors to the field, with many continuing their research careers in academia and industry. His research group has developed several influential tools and methodologies that have been adopted by both academic and industrial researchers. He actively contributes to major conferences in the field including ICCAD, DAC, ASP-DAC, and ISPD, often presenting invited talks that shape the future direction of EDA research. His work on open-source EDA tools has been particularly impactful, promoting accessibility and reproducibility in electronic design research.
Marios Papaefthymiou is a Professor of Computer Science and Ted and Janice Smith Family Foundation Dean of the Donald Bren School of Information and Computer Sciences at the University of California, Irvine. Previously, he held faculty roles at the University of Michigan (including Computer Science & Engineering Division Chair) and Yale University. His research focuses on energy-efficient computing, charge-recovery technologies, and high-performance systems. Education: Ph.D., Electrical Engineering and Computer Science, MIT (1993) S.M., Electrical Engineering and Computer Science, MIT (1990) B.S., Electrical Engineering, Caltech (1988) Research Interests: Papaefthymiou pioneered charge-recovery (adiabatic) technologies, demonstrating energy-efficient silicon prototypes. His work spans energy-efficient design, high-performance computing, and electronic design automation. He co-founded Cyclos Semiconductor to commercialize these innovations, used in AMD/IBM server chips. Current interests include AI ethics, cybersecurity, and machine learning. Awards: Arthur Greer Memorial Prize (Yale) Outstanding Achievement Award (U. Michigan EECS) IEEE Fellow (2009) NSF CAREER/ITR Awards Advising & Grants: Advised numerous students (e.g., H.-S. Wu, Z. Zhang) and secured grants from NSF, ARO, DARPA, and industry partners. As Dean, he expanded the School’s fundraising to $10M annually, launched new programs, and founded centers like the HPI Research Center for Machine Learning. Leadership: Spearheaded initiatives like the Steckler Center for Responsible Technology and the Initiative on AI, Law & Society. Strengthened alumni engagement through events and the ICS Industry Showcase.
Nicolo' Bellarmino is a Research Fellow and Research Assistant at the Department of Automatic Control and Computer Science (DAUIN) of Politecnico di Torino. His roles include teaching and collaborating in courses such as System Programming, Computer Science, and Future of Work across Computer Engineering and Aerospace Engineering programs. He is affiliated with the CAD - Electronic CAD & Reliability Group (DAUIN), focusing on research in machine learning, embedded systems, and hardware testing. His research interests center on computational intelligence applied to computer-aided design, particularly in machine learning techniques for microcontroller performance screening. He has also explored neural network resiliency, fault detection in CNNs, and device-aware testing methodologies. Recent work emphasizes compressed sensing, feature selection, and transfer learning in resource-constrained systems. Bellarmino's publications span conference proceedings and journals, addressing challenges in embedded systems testing, neural network optimization, and biomedical applications like COVID-19 detection via exhaled breath analysis. His contributions bridge theoretical machine learning advancements with practical hardware validation and optimization. He actively contributes to academic teaching, maintaining an email contact at nicolo.bellarmino@polito.it for professional inquiries.
