Alan H. Barr is a Professor of Computer Science at the California Institute of Technology (Caltech), affiliated with the Division of Engineering and Applied Science and the Computation & Neural Systems (CNS) department. He is a founding member of the Caltech Computer Graphics Group and a leader in developing mathematically rigorous methods for computer graphics and predictive modeling. His research focuses on enhancing computational modeling accuracy through approaches like interval analysis and constraint-based systems. Notable contributions include deformable models, quaternion interpolation, and cellular simulation frameworks. He has advised over 20 graduate students, many of whom became industry leaders at Pixar, Microsoft Research, and academic institutions like NYU and Brown University. Awards include the ACM SIGGRAPH Achievement Award (1988) and ACM Fellow (1995). Research Interests: Predictive modeling with error bounds Scientific visualization and MRI data analysis Biophysical systems simulation (e.g., cellular organelles) Self-assembling robotic structures for space colonization Mathematically robust computer graphics techniques Key Collaborations: Caltech Biological Imaging Center (Beckman Institute) JPL (Jet Propulsion Laboratory) New computational substrates research (quantum/DNA computing) Recent Work: Expanding into computational biology, medical imaging optimization, and high-confidence systems for managing complex computational interactions. Active in interdisciplinary projects across Caltech divisions.
Prof. Dr.-Ing. H. Siegfried Stiehl is a retired Senior Professor (until Sept 2021) at the Department of Informatics, University of Hamburg. He previously held roles including Dean of the Faculty of Mathematics, Computer Science, and Natural Sciences (2001–2006), Vice President for Research (2007–2013), and Head of the Image Processing Research Group. His academic journey includes a PhD from TU Berlin (1980) and a Habilitation in Computer Vision (1987). Education: 1973: Ing. Degree in Ingenieur-Informatik, Fachhochschule Furtwangen 1976: Diploma in Computer Science, TU Berlin 1980: Dr.-Ing. Dissertation on medical image processing, TU Berlin Research focuses on Computer Vision , Computational Neuroscience , and Cognitive Science , with contributions to medical image registration, 3D landmark detection, and biomechanical modeling. Key projects include the EU-funded 'COVIRA' consortium (1989–1995) and leadership in the SFB 950 'Manuscript Cultures' project (2015–2019). His 110+ publications span biomedical image registration, elastic deformation algorithms, and real-time signal processing. Notable collaborations include work with institutions like the University of Pennsylvania, University of Birmingham, and Philips Research. Leadership roles include organizing scientific events, serving on editorial boards (e.g., Biological Cybernetics), and founding the Interdisciplinary Nanoscience Center Hamburg (INCH) in 2001. His research has addressed challenges in neurosurgical interventions, VLSI implementation of neural networks, and interdisciplinary education.
Vidya A. Chhabria is an Assistant Professor at Arizona State University's School of Electrical, Computer and Energy Engineering. She holds a Ph.D. and M.Sc. in Electrical and Computer Engineering from the University of Minnesota (2022, 2018) and a B.E. in Electronics and Communication Engineering from M.S. Ramaiah Institute of Technology (2016). Education Ph.D. Electrical and Computer Engineering, University of Minnesota (2022) M.S. Electrical Engineering, University of Minnesota (2018) B.E. Electronics and Communication Engineering, M.S. Ramaiah Institute of Technology (2016) Her research focuses on computer-aided design (CAD) for VLSI systems, particularly addressing physical design challenges through optimization and analysis algorithms. She also explores intersections between machine learning (ML) and electronic design automation (EDA), with emphasis on sustainable computing solutions. Scientific recognition includes the ICCAD Best Paper Award (2021), the University of Minnesota Graduate School's Best Dissertation Award (2024), and a Doctoral Dissertation Fellowship (2021). She mentors students through honors directed study, thesis supervision, and doctoral research courses (EEE 525 VLSI Design, EEE 598 Special Topics). Scientific Awards ICCAD Best Paper Award (2021) University of Minnesota Graduate School Best Dissertation Award (2024) Doctoral Dissertation Fellowship (2021) Her industry experience includes internships at Qualcomm (2017) and NVIDIA Research's ASIC VLSI Research Group (2020-2021). She maintains active research through the VLSI Design and Automation (VDA) Lab at ASU.
Professor Forrest Brewer is a faculty member in the Department of Electrical and Computer Engineering at the University of California, Santa Barbara (UCSB), affiliated with the College of Engineering. His research spans VLSI design, computer-aided design tools, and low-power computing, with a focus on unconventional engineering solutions. Education: PhD in Computer Science, University of Illinois BS in Physics (with honors), California Institute of Technology His work includes CMOS pulse-gate asynchronous logic for high-performance systems, sigma-delta modulation for signal processing, and formal verification strategies for asynchronous circuits. Applications range from radiation-hardened communication links for the Large Hadron Collider (LHC) to spiking neural networks for low-power computing in LIDAR/RADAR systems. Affiliations: California Nanosystems Institute Allosphere Steering Committee (Media Technology) With over 100 publications and 40 years of systems design experience, Brewer has contributed to defense programs, founded UCSB's Computer Engineering program, and served as Intel Faculty Fellow (1997). His lab, the Systems Synthesis Lab, explores collective dynamics and high-resolution, low-latency computation.
Dirk Koch is an Associate Professor in the Department of Computer Science at the University of Manchester. He specializes in reconfigurable computing, FPGA architecture, and hardware acceleration. His research addresses challenges in field-programmable gate arrays (FPGAs), high-level synthesis, and stream processing. He leads the Advanced Processor Technology group and contributes to the Digital Futures Institute for Data Science and AI. Education: Doctorate in Computer Engineering Affiliations: Centre for Digital Trust and Society, EPSRC Functional Oxide Reconfigurable Technologies Programme His work focuses on optimizing FPGA performance, reducing power consumption, and advancing reconfigurable hardware systems. Recent projects include bitstream manipulation frameworks, runtime stream processing pipelines, and FPGA fabric optimization techniques. He has collaborated extensively with industry partners like AMD-Xilinx. Dirk Koch has supervised 11 research projects, including work on clock region process variation analysis and FPGA virus scanning. He holds grants from EPSRC and has published 62 peer-reviewed works.
Azadeh Davoodi is a Vilas Distinguished Achievement Professor and Associate Chair of Undergraduate Studies in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison. Her research focuses on Electronic Design Automation (EDA), integrated circuit debug, and machine learning applications in VLSI design. She holds editorial roles in journals like IEEE TCAD and ACM TRETS, and has chaired major conferences such as ISPD 2015 and served on technical program committees for DAC, ICCAD, and others. Education: PhD in Electrical Engineering, University of Maryland-College Park (2006) Research Interests: Machine learning for VLSI chip design VLSI design automation for machine learning IC-CAD for emerging nanotechnologies Hardware security Recent Research Trends: Her work bridges machine learning and hardware design, with publications on neural network optimization, distributed inference, and explainable AI for circuit design. She emphasizes energy-efficient CNNs, latency reduction in edge computing, and security in split manufacturing. Awards: 2025 DATE Best Paper Candidate 2024 Vilas Distinguished Achievement Professor 2015 ACM Best Paper Award 2011 NSF CAREER Award Service and Grants: Leads NSF-funded projects on explainable ML for CAD and holds grants for distributed neural network synthesis. Her service includes roles as IEEE HKN member and editorial board positions. Labs/Teams: Engages in interdisciplinary research teams at UW-Madison, focusing on EDA innovation and hardware-software co-design.
Luca Sterpone is a Full Professor at the Department of Control and Computer Science (DAUIN), Politecnico di Torino. He serves as Head of the Control and Computer Engineering Department (2023-2027), coordinates the Aerospace and Safety Computing Lab, and is a member of the Academic Senate and Power Electronics Innovation Center (PEIC). His research spans reconfigurable computing, fault tolerance, and radiation effects analysis in electronic systems. Professor since 2021 Department Head (DAUIN) since 2023 Coordinates international collaborations with ESA, AMD Xilinx, NVIDIA, and Thales Alenia Space Develops radiation-hardened FPGA tools (SETA, VERI-Place, PyXEL) 2007 EDAA Outstanding Dissertation Award and 2005 IEEE Best Paper Award Research Focus : Designing radiation-tolerant systems for aerospace, including fault-tolerant AI accelerators, FPGA reliability, and software-based error mitigation. He investigates soft error propagation in nanoscale circuits and develops tools for radiation sensitivity analysis in VLSI. His work integrates hardware-software co-design for mission-critical applications. Awards : EDAA Outstanding Dissertation Award (2007) IEEE European Test Symposium Best Paper (2005) SMACD Best EDA Tool Award (2018) ARC Best Paper candidate (2018) Teaching : He leads courses in Reconfigurable Computing (PhD level), GPU Programming , and Operating Systems . He has formal responsibility for teaching roles across 9 bachelor's and 7 master's years, and mentors multiple PhD students. Collaborations : Coordinates with the European Space Agency (ESA), University of Bielefeld, Universidad de Sevilla, and industrial partners like AMD Xilinx, NVIDIA, and General Motors. He leads projects such as RESCHIP4EU, VEGAS, and TERRAC for radiation-hardened computing solutions.
Luca Benini is a Full Professor of Electronics at the University of Bologna's Department of Electrical, Computer and Systems Engineering. He also holds a Visiting Faculty Position at the Ecole Polytechnique Federale de Lausanne (EPFL) and serves as Chief Architect of the Platform 2012 project at STMicroelectronics in Grenoble, France. His educational background includes academic positions progressing from Assistant Professor (1998) to Associate Professor (2001) and finally Full Professor (2006) at the University of Bologna. He has held significant industry positions including IC Architecture and CAD Engineer at Integrated Information Technology Inc. (1994), Senior Member of R&D Staff at Synopsys Inc. (1996), and Visiting Researcher at Hewlett Packard Laboratories (1997-2004). Professor Benini's research focuses on designing systems for ambient intelligence, spanning multi-processor systems-on-chip, networks on chip, and energy-efficient smart sensors and sensor networks. His work has expanded into biochips for biological molecule recognition, bioinformatics, and advanced algorithms for in-silico biology. His expertise in low-power design of integrated circuits and systems earned him IEEE Fellow status in 2007. He has received multiple honors including best paper awards at IEEE GLS-VLSI and the European Wireless Sensor Networks Conference (both 2008), with three of his papers featured in 'Design Automation and Test in Europe - The Most Influential Papers of 10 Years' (Springer 2008). IEEE Fellow (2007) for contributions to design technologies for low power design Member of ARTEMISIA Steering Board (elected twice) Member of European Design and Automation Association Main Board Member of MEDEA+ EDA roadmap committee Member of EC Advisory group on Computing Systems Benini has held significant leadership roles in the academic community, serving as General Chair of the IEEE/ACM Design Automation and Test in Europe Conference (2009), DATE Program Chair (2005), and Program Chair for multiple specialized symposia. He serves as associate editor for several prestigious journals including IEEE Transactions on Computer-Aided Design and ACM Transactions on Embedded Computing Systems, and has organized influential workshops like the Dagstuhl Seminar on Power-Aware Computing Systems.
Dr. Richard Molyet is a Senior Lecturer and Undergraduate Director in the Department of Electrical Engineering and Computer Science at the University of Toledo's College of Engineering. After retiring as Associate Professor in 2002, he returned to academia in 2005 as Visiting Professor and transitioned to Associate Lecturer in 2008. Education: Ph.D. in Engineering Science (1981) from University of Toledo His research spans Automatic Control , Robotics , Smart-Grid Systems , and Biomedical Applications . Recent publications focus on deep learning for medical diagnostics and hybrid power network optimization , while earlier work explored repetitive control algorithms and microprocessor-based motion analysis . Scientific Recognition: IEEE Third Millennium Medal (2000) IEEE-USA Professional Achievement Award (2002) University of Toledo Outstanding Teacher Award (2016) Currently advising 3 PhD students and multiple Master’s candidates, Dr. Molyet has served on numerous academic committees since the 1980s. He maintains an active role in IEEE Toledo Section's executive board for 39 years .
Professor Dollas Apostolos serves as a Professor in the School of Electrical and Computer Engineering at the Technical University of Crete (TUC), where he has held leadership roles such as Department Chairman. He directs the Microprocessor and Hardware Laboratory, focusing on reconfigurable computing, embedded systems, and high-performance digital systems. His work emphasizes rapid prototyping and real-world implementation of computational solutions. Education: Ph.D., Computer Science, University of Illinois at Urbana-Champaign (1987) M.Sc., Computer Science, University of Illinois at Urbana-Champaign (1984) B.Sc., Computer Science, University of Illinois at Urbana-Champaign (1982) Research Interests: Reconfigurable computing architectures FPGA-based acceleration for bioinformatics and genomics Embedded systems and real-time processing Hardware-software co-design for high-performance computing His research bridges theoretical innovation with practical applications, such as FPGA implementations for genome assembly and aquaculture monitoring systems. Publications: Recent work highlights FPGA-based solutions for bioinformatics (e.g., genome assembly acceleration), real-time embedded systems (e.g., fish cage net monitoring), and scalable data processing frameworks. His articles often explore the intersection of FPGA technology with computational biology, embedded vision, and distributed systems. Awards and Affiliations: Senior Member, IEEE and IEEE Computer Society Recipient of IEEE Computer Society Golden Core and Meritorious Service Awards Twice honored with the University of Illinois Teaching Excellence Award He is a co-founder of IEEE conferences like FCCM and RSP, reflecting his leadership in the reconfigurable computing community. Teaching and Labs: Teaches courses on computer architecture, logic design, and VLSI design. The Microprocessor and Hardware Lab under his direction drives advancements in FPGA-based systems, with projects ranging from bioinformatics hardware accelerators to embedded vision systems.
Yusuf Leblebici is a Turkish academic and current President of Sabanci University (2018-present), reappointed in December 2022. He previously served as a Chair Professor and Director of the Microelectronic Systems Laboratory at EPFL, Switzerland (2002-2018), and held academic roles at Worcester Polytechnic Institute (1997-1999), Istanbul Technical University (1993-1997), and the University of Illinois at Urbana-Champaign (1991-2000). His career spans microelectronics, VLSI design, and neuromorphic systems. BSc and MSc in Electrical Engineering from Istanbul Technical University (1984, 1986) PhD in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign (1990) His research focuses on low-power integrated circuits , VLSI design , sensor interfaces , semiconductor modeling , and neuromorphic computing . He has co-authored over 400 scientific articles and seven books, including two internationally acclaimed textbooks. Scientific Awards : 2020 ECE Distinguished Alumni Award (UIUC) 2009 IEEE Fellow 2009 IEEE Distinguished Lecturer 1999 WPI Satin Distinguished Fellow Award 1995 Turkish TUBITAK Young Investigator Award He has graduated 58 PhD students and over 100 MSc students, and played a pivotal role in establishing Sabanci University's Microelectronics Program (1999-2002) and directing EPFL's Microelectronic Systems Laboratory (2002-2018). As Sabanci University President, he has enhanced global visibility, attracted international talent, and strengthened global collaborations.
Hongyu An is an Assistant Professor in the Department of Electrical and Computer Engineering at Michigan Technological University. He holds affiliations with the Computer Science and Biomedical Engineering departments. Dr. An leads the BrainX Lab (Neuromorphic Robotics Lab and Neuromorphic Brain-Machine Interface Lab) and collaborates with the Institute of Computing and Cybersystems (ICC). He earned his PhD, MS, and BS in Electrical Engineering from Virginia Tech, Missouri University of Science and Technology, and Shenyang University of Technology respectively. Research Interests: Dr. An focuses on neuromorphic computing and its applications in AI hardware , robotics , and medical devices . His work spans memristor-based circuits , spiking neural networks , and energy-efficient AI systems . Key projects include associative learning in neuromorphic robots , neural prosthetics for memory restoration , and power-efficient adaptive deep brain stimulation systems . Publications & Research: With over 15 significant publications since 2016, Dr. An's work demonstrates expertise in 3D neuromorphic IC design , memristor reliability , and self-learning robotic systems . His research has appeared in journals like IEEE Transactions on Computing Aided Design and Frontiers in Computational Neuroscience. Awards & Funding: Bill and LaRue Blackwell Dissertation Award NSF CRII and ERI Awards USAF VFRP Fellowship Best Paper Nomination (2017 ISQED) Students & Collaborations: Dr. An mentors PhD students Tianze Liu and Md Abu Bakr Siddique, undergraduate Lucas Haddad, and volunteers like Vinay Kumar Pillalamarri. His team collaborates with Dr. Yan Zhang on neuromorphic brain-machine interfaces . The lab operates advanced infrastructure including LabLynx wireless neural recording systems and Intel Loihi-2 neuromorphic servers .
Dr. Andy Ye is an Associate Professor in the Department of Electrical, Computer, and Biomedical Engineering at Ryerson University, where he conducts research and teaches courses in advanced digital systems. Education : PhD (2004), MASc (1999), and BASc (1996) from the University of Toronto Research Interests focus on: Field-programmable gate array (FPGA) architectures Computer-Aided Design (CAD) tools for FPGAs and VLSI Logic synthesis and hardware implementation Digital communication algorithms and computer vision systems Publication Trends demonstrate expertise in FPGA area modeling, motion estimation architectures, and VLSI design optimization across multiple IEEE and ACM venues. Scientific Achievements : Best Paper Award (2016) at International Conference on Field Programmable Logic and Applications Teaching Contributions include graduate-level FPGA design (EE 8219), low-power digital circuits (ELE 734), and fundamental network theory (ELE 302). He maintains active supervision availability for students.
Jing-Yang Jou is the current President and K.T. Li Chair Professor at National Central University in Taiwan. He holds MS (1983) and PhD (1985) degrees in Computer Science from the University of Illinois. His research focuses on logic synthesis, physical synthesis, design verification, CAD for low-power systems, and Network-on-Chips (NoC). With over 200 technical publications, he has made significant contributions to digital circuit design automation. Former Deputy Minister of National Science Council, Taiwan (2010-2012) Vice Chancellor for Academic Affairs, University System of Taiwan (2007-2010) Executive Director of National SoC Program (2007-2010) Director General of National Chip Implementation Center (2004-2007) Recipient of prestigious awards including IEEE Fellow distinction and multiple industry-academia collaboration recognitions. His career includes roles at AT&T Bell Laboratories (1986-1994) and GTE Laboratories (1985-1986). Research emphasizes bridging theoretical computer science with practical semiconductor design challenges.
Sai Manoj Pudukotai Dinakarrao is an Assistant Professor in the Department of Electrical and Computer Engineering at George Mason University's College of Engineering and Computing. He leads the HArt (Hardware and AI Research) Group, focusing on cutting-edge research at the intersection of hardware security and artificial intelligence. His educational journey includes a BTech in Electronics and Communication Engineering from Jawaharlal Nehru Technological University (2010), an MTech in Information Technology from International Institute of Information Technology Bangalore (2012), and a PhD in Electrical Engineering from Nanyang Technological University, Singapore (2015). Following his doctoral studies, he completed post-doctoral research at TU Wien, Vienna (2015-2017) and George Mason University (2017-2018). Dr. Dinakarrao's research spans hardware security, adversarial machine learning, IoT networks, and deep learning in resource-constrained environments. His work integrates hardware design with AI techniques to address security challenges in computing systems, with particular focus on side-channel attack detection, malware detection in IoT networks, on-chip security, and hardware accelerator design for machine learning applications. His research has resulted in numerous publications in top-tier conferences and journals including IEEE Transactions, ACM conferences, and Design Automation Conference. Analysis of his recent publications reveals a strong trend toward hardware security solutions using machine learning techniques. His work increasingly focuses on Processing-in-Memory architectures, energy-efficient security solutions for IoT devices, and innovative approaches to hardware Trojan detection. Many publications demonstrate interdisciplinary collaboration across electrical engineering, computer science, and cybersecurity domains. Young Research Fellow Award at Design Automation Conference (DAC) 2013 Best paper award at International Conference on Data Mining (ICDM) 2019 Best paper award at International Conference on Consumer Electronics (ICCE) 2020 Best paper nomination at International Conference on Computer-Aided Design (ICCAD) 2019 Best paper nomination at Design Automation and Test in Europe (DATE) 2018 Dr. Dinakarrao has successfully mentored numerous PhD and MS students, with alumni securing positions at AMD-Xilinx, US Government agencies, and academic institutions. His research has been supported by significant grants from NSF, DARPA, and Virginia Commonwealth Cyber Initiative. Current projects include securing supply chains with UVA, developing novel architectures for machine learning acceleration, and creating energy-preserving cryptography protocols. The HArt Group maintains active collaborations with industry partners including AMD-Xilinx and government agencies. The lab focuses on practical implementations of theoretical security concepts, with particular emphasis on creating deployable security solutions for real-world hardware systems. Current research directions include intermittent computing with energy harvesting, hardware fuzzing techniques, and robust machine learning models resistant to adversarial attacks.
