Xiaoming Li is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Delaware , focusing on compiler optimization, GPU computing, and hardware-software interaction. His work bridges machine learning with code generation to enhance program efficiency. B.S. and M.E. from Nanjing University (1998, 2001) Ph.D. in Computer Science from University of Illinois at Urbana-Champaign (2006) Research interests include: Compiler optimizations for static and dynamic code transformation Machine learning-driven code generation techniques FFT algorithms for sparse and hybrid systems Non-traditional compilers for SAT solvers and virtual machines GPU acceleration for large-scale computational problems His publications span 15 years , emphasizing: FFT optimization across GPU/CPU architectures Compiler techniques for heterogeneous systems Adaptive scheduling and error resilience Integration of empirical and model-driven approaches Notable awards: NSF CAREER Award (2008) Best Paper Award at ADAPT Workshop (2013) Advising highlights: Current students: Ryan Taylor, Sha Li, Shuo Chen, Yuanfang Chen, Chao Yang, Chaoyu Chen Graduates: Liang Gu (FFT Libraries), Jakob Siegel (GPGPU Frameworks), Murat Bolat (Context-Aware Compilation)
Timothy Harris is an Affiliated Lecturer at the University of Cambridge's Department of Computer Science and Technology, where he jointly teaches courses on multicore semantics and programming. Currently, he works at OpenAI, focusing on performance optimization for GPU inference of large language models, including the Azure OpenAI Service. Previously, he held roles at Microsoft, AWS, Oracle Labs, and was a faculty member at the University of Cambridge (2000–2004). His research spans distributed systems, runtime systems, operating systems, and high-performance computing, with an emphasis on scalability and performance. He contributed to projects like the Xen hypervisor and the Barrelfish research OS. Key research interests include distributed training of PyTorch models in the ONNX runtime, large-scale storage performance with Amazon S3, and runtime systems for in-memory graph analytics. His work often bridges 'big data' and high-performance computing techniques. Notable contributions include the book Transactional Memory (2010) and the Barrelfish OS, alongside numerous publications in top-tier conferences like SOSP, ASPLOS, and EuroSys. He has served as PC chair for ISMM 2025, VEE 2017, and EuroSys 2015, reflecting his leadership in the systems research community. His awards include a Best Paper Award at PACT 2010. Beyond academia, Harris is an avid hiker, aiming to complete the UK coastline, and maintains a photography portfolio at tlhphotography.uk .
Timothy M. Jones is a Professor of Computer Architecture and Compilation at the University of Cambridge Computer Laboratory, where he leads research in systems-level computing. He is also a Fellow at Gonville and Caius College, contributing to academic leadership and student mentorship within the collegiate system. His primary affiliation with the Computer Laboratory positions him at the forefront of systems research within the university. Dr. Jones's research focuses on extracting various forms of parallelism (thread-level, data-level, memory-level) to enhance computational performance while addressing energy efficiency and reliability challenges. His work spans compiler design, binary translation, and microarchitecture optimization, with specific interest areas including: Compiler technologies for functional and parallel programming Hardware reliability and fault tolerance mechanisms Binary analysis and instrumentation frameworks Memory system optimization and virtual memory management Security enhancements through binary modification Runtime systems for heterogeneous architectures Analysis of his recent publications reveals strong emphasis on systems-level innovation, particularly in fault tolerance techniques, binary analysis tools, memory optimization, and parallel execution frameworks. His work consistently bridges theoretical computer science with practical hardware implementation challenges. Dr. Jones maintains active participation in the academic community through conference leadership roles, including serving as Program Co-Chair for CGO 2026 and committee positions at premier venues including ISMM, CGO, and ECOOP. He contributes to open-source academic resources through GitHub and maintains professional engagement via Twitter.
Prof. Dr. Viktor Leis is a Professor in the Department of Computer Science at the Technical University of Munich (TUM), leading the Chair for Decentralized Information Systems and Data Management. His research focuses on cost-efficient data systems, particularly in cloud environments, with expertise in core database topics like query processing, transaction management, and storage optimization. He earned his PhD from TUM in 2016 and previously held professorships at Friedrich Schiller University Jena and Friedrich-Alexander-Universität Erlangen-Nürnberg before returning to TUM in 2022. His work has been recognized with prestigious awards, including the ACM SIGMOD Dissertation Award, VLDB Early Career Research Contribution Award, and an ERC Starting Grant. Research Interests: Cloud computing, database systems, query optimization, storage engines, transaction processing, and NVMe-optimized systems. Key Projects: Developed the LeanStore storage engine and contributed to the Hyper database system. His recent publications emphasize cloud-native architectures, high-performance storage solutions, and hybrid transactional/analytical processing. He actively teaches courses on distributed systems, cloud databases, and blockchain technologies.
Yonghwi Kwon is a Visiting Assistant Professor in the Department of Computer Science at the University of Virginia. His research focuses on software systems security, cyber forensics, and software engineering. He received the CAREER Award for developing dynamic defenses against cyber threats. His work emphasizes securing software from cyber attacks, recovering forensic evidence, and improving software testing and reverse engineering techniques. Key research areas include memory safety mechanisms, automated vulnerability detection in web applications and mobile systems, and forensic analysis of phishing campaigns. He has pioneered frameworks like CMASan for memory allocator-aware sanitization and Racedb for detecting race conditions in database-backed systems. His contributions span cloud security automation, kernel exploitation analysis, and embedded system fuzzing. Notable achievements include the 2025 CAREER Award supporting his dynamic defense research, and impactful publications in areas like Android information leakage detection (DryJIN), Bluetooth protocol fuzzing (BTFuzzer), and autonomous driving bug discovery (Drivefuzz). His work bridges theoretical computer science with practical cybersecurity solutions.
Chester Rebeiro is an Associate Professor at the Department of Computer Science and Engineering within the Indian Institute of Technology Madras . His work spans hardware and software security with a focus on cryptographic implementations and microarchitectural vulnerabilities. Research interests include hardware security, applied cryptography, side channel analysis, and operating system security. He develops frameworks for automatic vulnerability detection and mitigation in cryptographic systems. Editorial Board: Associate Editor at Journal of Hardware and Systems Security (Springer, 2021-2024) Conference Leadership: General Co-Chair for SPACE 2024, Program Co-Chair for ATS 2024, and Program Co-Chair for INDOCRYPT 2023 Professional Activities: Organizer of e-CTF Embedded Capture The Flag and contributor to cybersecurity workshops across India and abroad Scientific contributions highlight two major awards: a Distinguished Paper Award at USENIX Security 2024 and a Best Paper Award at IEEE HOST 2020. His research focuses on practical security solutions for processors and cryptographic systems. Advising includes mentoring 11 PhD students and 7 MS by Research candidates, with notable co-guided projects in fault attack detection and side-channel mitigation. He actively contributes to educational initiatives through courses on Secure Processor Microarchitecture and Operating Systems.
Dr. John Wickerson is an Associate Professor in the Circuits and Systems group at the Department of Electrical and Electronic Engineering, Imperial College London. His research focuses on improving the reliability of high-performance computing through formal methods, with contributions to high-level synthesis, memory models, and concurrency verification. He holds leadership roles including Course Director for the Electrical and Information Engineering degree and Deputy Tutor for PhD students. Research Interests: Formal Verification of Hardware/Software Systems High-Level Synthesis (HLS) and FPGA Compilation Weak Memory Models and Concurrency Semantics Fuzz Testing for Hardware Tools Compiler Optimization and Correctness Digit Elision and Arbitrary-Precision Arithmetic Notable Achievements: Best Paper Award at EuroSys 2024 (database isolation validation) Pioneered formal methods for HLS tools (e.g., QuteFuzz, C4) Co-developed the C4 C compiler concurrency checker Published over 60 peer-reviewed papers across top venues (ASPLOS, PLDI, FPGA) Lab/Team: Part of the Circuits and Systems group at Imperial College, collaborating with industry partners like Kaihong Yann and ARM.
Kimia Zamiri Azar serves as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Central Florida, focusing on hardware security and verification methodologies. Her research bridges theoretical formal methods with practical security implementations in semiconductor design and testing. Her educational background includes: Ph.D. in Electrical and Computer Engineering, George Mason University (2021) Postdoctoral Research, University of Florida Dr. Azar's research spans hardware security with emphasis on system-level verification, VLSI design-for-trust, and advanced IC testing. She pioneers techniques in logic locking, secure heterogeneous integration, and IC supply chain security, developing frameworks for authenticated encryption in Systems-in-Package and runtime security monitoring. Her work integrates formal verification with innovative testing methodologies to address hardware trust challenges across the semiconductor lifecycle. Analysis of her recent publications reveals two dominant trends: (1) Application of large language models (LLMs) to hardware design tasks including high-level synthesis code generation and RTL optimization, and (2) Advancement of secure heterogeneous integration techniques for System-in-Package architectures with focus on counterfeit prevention and split-test security protocols. These directions address critical gaps in hardware trustworthiness amid increasingly complex semiconductor supply chains. Her scientific contributions have earned significant recognition: Best Paper Award at ICCAD 2019 Best Paper Award at ISVLSI 2020 Best Paper Award at ICCAD 2020 Best Paper Award at IEEE DCAS 2020 Best Paper Award at HOST 2022 Best Paper Award at DATE 2023 Dr. Azar secures substantial research funding from premier agencies including NSF, SRC, DARPA, AFRL, DoD (NG), and Microsemi. Her grants support projects spanning hardware security validation frameworks, secure heterogeneous integration, and AI-augmented verification methodologies. She actively mentors students in her research group, guiding publications in top venues like IEEE D&T, IEEE TC, and DAC while fostering industry-academic collaborations. Her work directly impacts semiconductor security standards through patented innovations and open-source verification tools. As an active IEEE and ACM member, she contributes to community advancement through conference organization (HOST, DATE), journal editorial roles, and workshop leadership on hardware security standards. Her research group collaborates with semiconductor industry leaders to translate theoretical security frameworks into practical design-for-trust methodologies for next-generation integrated circuits.
Nikos Hardavellas is a Professor of Computer Science and Electrical and Computer Engineering at Northwestern University, affiliated with the McCormick School of Engineering. He leads the Parallel Architecture Group at Northwestern (PARAG@N), focusing on energy-efficient parallel computing and quantum systems. His research spans quantum computing systems, fault-tolerant quantum error management, memory-centric architectures, and photonics-based interconnects. Education: Ph.D. Computer Science, Carnegie Mellon University (2009) M.S. Computer Science, Carnegie Mellon University (2006) M.S. Computer Science, University of Rochester (1997) B.S. Computer Science, University of Crete (1995) Research Interests: Quantum system software stack and error mitigation Memory-centric computing and programmable memory systems Energy-efficient architectures and dark silicon Photonics and optical interconnects Parallel systems and compiler-hardware co-design Key Contributions: Developed SupermarQ, a scalable quantum benchmark suite Pioneered optical cache hierarchies (Pho$) and energy-proportional photonic networks Advanced compiler-driven virtual memory systems (CARAT) and MPI autotuning (ACCLAiM) Awards & Honors: NSF CAREER Award (2015) Future CRA Leader (2024) Best Paper Awards at HPCA (2022) and ISLPED (2021 nomination) Test-of-Time Award at EDBT (2019) Grants & Service: Secured $4.8M in research funding from NSF, industry partners, and university initiatives Executive Committee member of Northwestern’s INQUIRE Institute for Quantum Research General Co-chair of IEEE/ACM MICRO 2022 Extensive service on departmental committees and thesis advisory boards Labs & Teams: Directs PARAG@N, collaborating on quantum computing, photonics, and energy-efficient architectures. Engages with industry partners like AMD, Intel, and Synopsys.
Xujie Si is an Assistant Professor in the Department of Computer Science at the University of Toronto. He is also a faculty affiliate at the Vector Institute and an affiliate member at Mila - Quebec AI Institute, holding a Canada CIFAR AI Chair. Previously, he served as an Assistant Professor at McGill University's School of Computer Science. Education: Ph.D., Computer and Information Science, University of Pennsylvania (advised by Mayur Naik) M.S., Computer Science, Vanderbilt University B.E. (with Honors), Nankai University Research Focus: His work bridges AI and program reasoning, emphasizing the integration of statistical and logical methods. Key areas include: Static analysis and verification using deep learning/reinforcement learning Neuro-symbolic systems for urban simulation (e.g., LogiCity) Automated theorem proving via LLMs and symbolic reasoning Program repair and compiler fuzzing Recent Article Trends: Recent work focuses on synergizing LLMs with symbolic reasoning (e.g., Olympiad inequality proving), advancing SAT solving with graph neural networks, and applying neuro-symbolic methods to Euclidean geometry formalization. Awards: Canada CIFAR AI Chair (2023) Lab/Teams: Leads research teams exploring program analysis, neuro-symbolic AI, and formal verification at the University of Toronto and Vector Institute.
Timothy M. Jones is a Professor of Computer Architecture and Compilation at the University of Cambridge's Computer Laboratory, serving as Director of the Computer Architecture and Semiconductor Design Centre (CASCADE) and Fellow/Director of Studies at Gonville and Caius College. His research focuses on parallelism extraction in applications to enhance performance and address energy efficiency/reliability challenges in compilers, binary translators, and microarchitectures. Current work includes novel cache prefetching techniques, thread-level parallelism schemes, and advanced core prediction methods. He has an Erdős number of 4 and a Dijkstra number of 4 via collaborative networks. Research interests span computer architecture fundamentals, compiler optimizations, hardware security mechanisms, and fault tolerance strategies. Notable contributions include speculative vectorization, heterogeneous parallel error detection (MEEK/FireGuard), and security tools like MarkUs and MineSweeper. CASCADE oversees interdisciplinary projects addressing future microprocessor/system challenges. Jones supervises PhD students through CASCADE's 2025 intake program. Publications emphasize architectural innovations in memory systems, security, and energy efficiency. Key works include MASCOT (memory dependence prediction), Scalar Vector Runahead (2024), and Decoupled Vector Runahead (2023). His work integrates hardware-software co-design principles to tackle real-world processor bottlenecks.
Lingming Zhang is an Associate Professor at the Department of Computer Science, University of Illinois Urbana-Champaign, affiliated with the Grainger College of Engineering. His research focuses on the intersection of Software Engineering, Programming Languages, and Machine Learning, with a particular emphasis on automated program repair, compiler testing, and large language model (LLM) applications in software engineering. He has published over 100 papers, achieving an h-index of 50+, and holds an ACM Distinguished Member status. Research Interests: LLM-based software testing, repair, and synthesis Fuzzing of deep-learning libraries and compilers Open-source code LLMs (e.g., StarCoder2, Magicoder) with over 1M downloads Automated program repair systems (e.g., AlphaRepair, ChatRepair, Agentless) Recent Contributions: Developed TitanFuzz for coverage-guided compiler fuzzing Released Agentless , an LLM-based coding tool adopted by OpenAI and DeepSeek Proposed SWE-RL to enhance LLM reasoning via reinforcement learning Service Roles: Program Co-Chair for ASE 2025 and LLM4Code 2025 Associate Chair for OOPSLA 2024 and Area Chair for ICSE 2025/2026 Recipient of NSF CAREER Award and ACM SIGSOFT Early Career Award Lab/Teams: Develops open-source tools like UniAPR for efficient patch validation Active in releasing industry-adopted LLM-based software engineering tools
Zoran Budimlić is an Instructional Associate Professor in the Department of Computer Science and Engineering at Texas A&M University. He also serves as Director of Undergraduate Studies for Galveston. His roles include teaching and academic leadership in computer science education and high-performance computing. He holds a Ph.D. in Computer Science from Rice University (2001) and a B.S. in Computer Science and Engineering from the University of Belgrade (1994). His research interests focus on high-performance and parallel computing, compiler optimizations, programming languages, runtime systems, and high-level programming models. He emphasizes improving educational practices in computer science through innovative methods and curricula. His recent publications span parallel algorithms, task parallelism integration with MPI, and compiler optimizations for performance. Earlier work includes contributions to Java runtime optimization and static analysis techniques. Zoran Budimlić has no explicitly listed scientific awards or grants in the provided text, but his contributions to parallel computing and compiler design are notable. He advises students in these areas but no names are provided in the text.
Grant Weddell is an Associate Professor in the David R. Cheriton School of Computer Science at the University of Waterloo. His research focuses on database technology for real-time applications, including large-scale schema management, information clustering, dependency theory, and query optimization for heterogeneous data sources. He teaches courses such as CS338 (Introductory Databases), CS348 (Advanced Databases), CS446 (Software Engineering), and CS848 (Advanced Database Systems). His research interests emphasize the interplay between description logics and database systems, particularly in optimizing query processing and managing complex schemas. Recent work explores path agreements, functional dependencies, and ontology-mediated querying to enhance data integration and schema management efficiency. Teaching responsibilities include foundational database courses (CS338/348), software engineering (CS446), and advanced topics in information integration (CS848). No scientific awards are explicitly listed, though his contributions to database theory and optimization are extensive.
Darko Marinov is a Professor at the Siebel School of Computing and Data Science and a member of the Information Trust Institute at the University of Illinois at Urbana-Champaign. His research focuses on software testing methodologies, particularly regression testing, flaky tests, and software reliability engineering. He has contributed to frameworks like Ekstazi for regression test selection and DeFlaker for identifying flaky tests. Marinov holds an NSF CAREER Award (2008) for his work in this domain. His research interests span testing techniques for modern software systems, including configuration testing, test prioritization, and fault localization. He has pioneered studies on the characteristics of flaky tests in large-scale projects and developed tools to improve software quality assurance processes. Marinov collaborates across academic and industrial settings, addressing challenges in continuous integration, reproducibility of computational experiments, and hardware-software co-design for resilience. His work bridges theory and practice, with applications in cloud computing, AI workloads, and cybersecurity. Awards: NSF CAREER Award (2008) Key Contributions: Ekstazi, DeFlaker, FastFlip, and Ctest4J frameworks Labs/Teams: Active member of the Information Trust Institute and leads software testing research groups at UIUC
