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نمایش ۱۶۶-۱۷۱ از ۱۷۱ استاد راهنما
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پژوهشگر
Vincent Bode is a researcher and teaching assistant at the Chair of Computer Architecture and Parallel Systems at the Technical University of Munich (TUM) . His work focuses on benchmarking and optimizing Data Distribution Service (DDS) middleware for Industrial IoT applications, particularly through the DDS-Perf project in collaboration with Siemens .
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
François-Raymond Boyer is an Associate Professor in the Department of Computer Engineering and Software Engineering at Polytechnique Montréal. He holds a B.Sc. and Ph.D. from Université de Montréal and teaches courses in programming and digital audio. His research spans: Computer architecture and VLSI systems Network processing and traffic management Digital audio signal processing Hardware acceleration and optimization He is affiliated with ReSMiQ (Strategic Cluster for Microsystems) and OICRM (Music Research Observatory). Recent publications focus on 5G network processing, modular programming frameworks, and high-speed traffic management architectures, primarily in IEEE Access and IEEE Transactions on VLSI Systems. Professor Boyer has supervised 3 PhD and 6 Master's students, with research topics including network architecture, audio processing, and hardware design. No scientific awards are mentioned in the available records.
استادیار
Fredrik Kjolstad is an Assistant Professor in the Department of Computer Science at Stanford University, specializing in compilers and programming models for sparse computing and performance engineering. His research focuses on separating algorithms from data representations to enable portable applications across diverse hardware platforms. His research interests span compilers, programming models, performance engineering, and computer architecture, with particular emphasis on sparse tensor algebra, compiler design for heterogeneous systems, and high-performance computing. He has pioneered frameworks like TACO, Simit, and Distal that enable efficient sparse computations across CPUs, GPUs, and specialized accelerators. Dr. Kjolstad's publications demonstrate expertise in compiler optimization techniques for sparse data structures, tensor algebra, and distributed systems. His work consistently addresses the challenge of bridging high-level programming abstractions with efficient hardware execution across diverse architectures. MIT EECS First Place George M. Sprowls PhD Thesis Award NSF CAREER Award Rosing Award Adobe Fellowship Google Research Scholarship Best Paper Awards at EuroMPI 2013, OOPSLA 2017, and OOPSLA 2021 ISCA Distinguished Artifact Award PLDI and OOPSLA Distinguished Paper Awards He advises multiple PhD students including James Dong, Olivia Hsu, and Rohan Yadav, while leading research on compiler technologies that have received significant grant support. His group develops practical tools like the TACO compiler and Legate Sparse that are used in both academic and industrial settings. Current projects focus on programmable accelerators for sparse tensor algebra, distributed sparse computing, and compiler support for emerging hardware architectures.
Kunle Olukotun is a Professor of Electrical Engineering and Computer Science at Stanford University's School of Engineering, where he has been faculty since 1991. He directs the Stanford Pervasive Parallelism Lab (PPL) and co-leads the Transactional Coherence and Consistency (TCC) project. His research focuses on computer architecture, parallel programming environments, and scalable parallel systems. Key areas include chip multiprocessors (CMPs), transactional memory systems, domain-specific languages (DSLs) for heterogeneous computing, and hardware-software co-design for machine learning workloads. His work bridges theoretical foundations with practical systems implementation. Notable contributions include the Stanford Hydra research project (one of the first chip multiprocessors with thread-level speculation), founding Afara Websystems (acquired by Sun Microsystems), and developing the Niagara processor architecture. His DSL frameworks like Green-Marl and Spatial enable efficient graph analysis and hardware acceleration. His publications reveal strong trends in parallel systems evolution: from foundational CMP research (2000s) to transactional memory (2004-2010), then DSLs for heterogeneous computing (2010-2015), and currently foundation model systems (2023-2025). Subfield analysis shows consistent focus on hardware-software co-design, sparse computation, and compiler techniques across decades. ACM Fellow (2006) for contributions to multiprocessors on a chip and multi-threaded processor design Best Paper Award at IEEE International Symposium on Workload Characteristics (IISWC '10) for EigenBench Olukotun actively mentors researchers through the Stanford Pervasive Parallelism Lab (PPL), which seeks to proliferate parallelism across application domains. His projects have secured significant industry partnerships, including the acquisition of his startup Afara Websystems by Sun Microsystems. Current research focuses on compiler frameworks for foundation model systems and hardware acceleration for sparse machine learning workloads, supported by collaborations with major tech companies. He leads the Stanford Pervasive Parallelism Lab (PPL), which develops compiler and runtime systems for heterogeneous architectures. The lab's work spans DSLs, hardware acceleration, and parallel programming models, with strong industry ties to companies like NVIDIA and Google. Current initiatives include the Mosaic compiler framework and Stardust architecture for sparse tensor computation.
Carl-Johannes Johnsen is a Ph.D. student and Guest Researcher in the Department of Computer Science at the University of Copenhagen, specializing in reconfigurable computing and machine learning acceleration for X-ray food inspection systems. His research integrates FPGA-based hardware acceleration with compiler design for high-performance computing, focusing on programming models for Field-Programmable Gate Arrays and optimization of machine learning pipelines. Additional interests include concurrent and distributed programming education methodologies that prioritize conceptual understanding over formal proofs. Publication analysis (2019-2022) reveals consistent contributions to FPGA acceleration of scientific workloads (molecular dynamics), novel compiler vectorization techniques, and minimalist hardware implementations. His work bridges computer architecture, parallel computing, and practical applications in food safety inspection through cross-disciplinary collaboration. No scientific awards were documented in the source material. As an active doctoral candidate, Johnsen has no advisory responsibilities. Research grant details were not specified in the provided information. He operates within the Programming Languages and Theory of Computation research environment at the Department of Computer Science, engaging in international collaborations focused on hardware-software co-design as indicated by network analysis metrics.
