Andreas Lööw is a Lecturer at Royal Holloway, University of London , focusing on hardware and software verification. Previously, he was a postdoctoral researcher at Imperial College London under Philippa Gardner , contributing to the Gillian Platform . He completed his PhD at Chalmers University of Technology under Magnus Myreen , specializing in interactive theorem proving and hardware verification. His research explores symbolic execution, separation logic, and formal verification of hardware/software systems. Key projects include Betterlog (Verilog semantics reformulation) and foundational work on the Gillian Platform . 2025 : Compositional Symbolic Execution for Memory Models 2025 : Simulation Semantics of Synthesisable Verilog 2024 : Compositional Symbolic Execution for Correctness/Incorrectness 2023 : Exact Separation Logic (Distinguished Paper at ECOOP'24) 2023 : Hardware Verification of Pipelined Processors 2022 : Verilog Concurrency Analysis 2021 : Verified Verilog Compiler (Lutsig) Scientific Awards : Distinguished Paper at ECOOP 2024 He maintains the vv Verilog visualization tool and collaborates on the Gillian Platform . Contact: andreas.loow@rhul.ac.uk











