جستجوی استاد راهنمای دانشگاهی

Giovanni De Micheliمشاهده پروفایل

استاد

• Integrated Circuit Design
• Hardware Synthesis
• Logic Optimization
• +۵ مورد دیگر

Giovanni De Micheli is a Full Professor at École Polytechnique Fédérale de Lausanne (EPFL), holding appointments in both the School of Computer and Communication Sciences (IC) and the School of Engineering (STI). He is affiliated with the Integrated Systems Laboratory (LSI) and serves as Scientific Director of EcoCloud. His primary office is located in INF 341 building at EPFL's Lausanne campus where he conducts research and teaching activities. Professor De Micheli's research spans multiple domains in electronic design automation and integrated circuit design. His primary interests include: Integrated Circuit Design and Hardware Synthesis Logic Optimization and Boolean Methods Nanoelectronics and 2D Electronics Quantum Computing and Emerging Technologies Low-Power Electronics and Energy-Efficient Systems Electronic Design Automation for Novel Computing Paradigms His recent publications demonstrate a strong focus on advancing logic synthesis techniques for both conventional and emerging technologies. Professor De Micheli's work bridges theoretical foundations with practical applications, particularly in adapting traditional EDA methods to novel computing paradigms like quantum computing and superconducting electronics. His research group has made significant contributions to the development of efficient algorithms for circuit optimization across multiple technology domains, with particular emphasis on area, power, and delay optimization while maintaining functional correctness. Professor De Micheli has supervised numerous doctoral students throughout his career at EPFL, mentoring over 40 PhD candidates whose research spans various aspects of electronic design automation, circuit design, and emerging technologies. His students have gone on to make significant contributions in both academia and industry. As Scientific Director of EcoCloud, Professor De Micheli leads research initiatives focused on energy-efficient computing systems and sustainable cloud infrastructure. His laboratory, the Integrated Systems Laboratory, serves as a hub for interdisciplinary research connecting computer science, electrical engineering, and materials science, with particular focus on next-generation computing technologies.

Subhasish Mitraمشاهده پروفایل

استاد

• Robust Computing
• NanoSystems
• Electronic Design Automation (EDA)
• +۳ مورد دیگر

Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.

• Computer Engineering
• Circuit Design
• Fault Tolerance
• +۶ مورد دیگر

Matteo Sonza Reorda is a Full Professor at the Polytechnic University of Turin, affiliated with the Department of Automatic Control and Computer Science (DAUIN). He holds roles such as Partnership Agreement Coordinator with SMAT and has served as Vice-Rector for Research (2021–2024). His research focuses on fault tolerance, hardware reliability, and AI acceleration, with contributions to GPU/CNN reliability, self-test libraries, and defect-oriented testing. Education: M.S. in Electronics Engineering, Politecnico di Torino (1986) Ph.D. in Computer Engineering, Politecnico di Torino (1990) Research Interests: His work spans automatic test equipment, circuit reliability, GPU fault tolerance, neural network hardening, and embedded systems safety . He leads the Electronic CAD & Reliability Group and collaborates with institutions like the ISI Foundation and the National Research Council (CNR). Publications & Impact: With over 180 publications, his recent work emphasizes AI accelerator reliability, fault injection techniques, and safety-critical systems. Key trends include GPU resilience for CNNs, self-test library optimization, and radiation fault modeling in neural networks. Awards & Recognition: IEEE Fellow (2016–) Multiple best-paper awards at IEEE conferences (DDECS, DATE, etc.) Grants & Collaborations: Coordinator of EU projects (RESCUE, TUTORIAL) Partnerships with EDF, Marelli Europe, and SMAT Lead on National HPC/Quantum Computing Spoke 1 (2022–2025) Labs/Teams: Leads the CAD Group and collaborates with the French-Italian LIA LAFISI lab on hardware-software integration.

Florian Kerschbaumمشاهده پروفایل

استاد

• Data security and privacy
• Confidentiality and integrity in data science
• Applied cryptography
• +۴ مورد دیگر

Florian Kerschbaum is a Professor and NSERC/RBC Industrial Research Chair in Data Security at the Cheriton School of Computer Science, University of Waterloo. His research focuses on data security and privacy, applied cryptography, and confidentiality in data science. Research interests span data collection/preparation management, secure multi-party computation, homomorphic encryption, differential privacy, and machine learning robustness/privacy. His work develops cryptographic solutions for practical data management challenges in distributed systems.

Hayden Kwok Hay SOمشاهده پروفایل

دانشیار

• Reconfigurable Computing
• FPGA-Based Systems
• Computer Architecture
• +۷ مورد دیگر

Prof. Hayden Kwok Hay SO is an Associate Professor at the University of Hong Kong (HKU), affiliated with the Department of Electrical and Electronic Engineering. He currently serves as Acting Director of the School of Innovation and previously co-directed the Computer Engineering Program. His research focuses on reconfigurable computing systems, FPGA-based architectures, and their applications in AIoT, medical imaging, and high-performance computing. He holds a B.S., M.S., and Ph.D. in Electrical Engineering and Computer Sciences from UC Berkeley (1998–2007). Prof. So has been recognized with awards such as the IEEE-HKN Teaching Award (2021), Croucher Innovation Award (2013), and multiple teaching excellence awards. He leads the Computer Architecture & System Research Lab (CASR) and co-founded the Joint Lab on Future Cities (JLFC). His work spans FPGA overlay architectures, graph processing systems, and hardware-software co-design for efficient computing. Key research contributions include advancements in FPGA-based reconfigurable systems, sparse dataflow architectures, and medical imaging accelerators. He has secured grants for projects like 'Advanced machine vision guided aquatic surface vehicles' and 'Efficient and Productive Parallel Data Processing in Hybrid FPGA-CPU Clusters.' Prof. So has advised numerous students and researchers, contributing to over 150 peer-reviewed publications. His current projects explore AI hardware acceleration, neuromorphic computing, and FPGA-driven solutions for big data challenges.

Benedikt Bünzمشاهده پروفایل

استادیار

• Applied Cryptography
• Blockchain Technology
• Consensus Algorithms
• +۴ مورد دیگر

Benedikt Bünz is an Assistant Professor of Computer Science at New York University's Courant Institute of Mathematical Sciences. He is also a co-founder and chief scientist of Espresso Systems, where he applies his research expertise to real-world blockchain solutions. His academic work bridges theoretical cryptography with practical blockchain implementations, focusing on enhancing privacy, security, and usability of decentralized systems. Dr. Bünz's research centers around applied cryptography, consensus mechanisms, and game theory as they relate to cryptocurrencies. His work spans zero-knowledge proofs, verifiable delay functions, secure multi-party computation, and privacy-preserving protocols. He has made significant contributions to Bulletproofs, a zero-knowledge proof system deployed on blockchains like Monero, and pioneered research in verifiable delay functions which are now part of Ethereum 2.0's design. His recent work focuses on recursive proof systems, accumulation schemes, and efficient verification techniques for blockchain scalability. His publication record shows a consistent progression from foundational cryptographic primitives to practical blockchain implementations. Recent work demonstrates increasing sophistication in recursive proof systems (ProtoStar, HyperPlonk), novel accumulation techniques (ARC, DewTwo), and foundational work on randomness generation (VDFs). His research consistently bridges theoretical cryptography with real-world blockchain applications, resulting in protocols that are both theoretically sound and practically implementable across multiple blockchain platforms. Dr. Bünz actively contributes to the academic community through teaching and mentorship. He teaches courses on cryptography of blockchains and computer security at NYU, providing students with hands-on experience in blockchain security and cryptographic protocols. His industry engagement through Espresso Systems demonstrates his commitment to translating academic research into practical solutions for the blockchain ecosystem.

• Embedded Machine Learning
• High-Performance Computing
• Computer Architecture
• +۶ مورد دیگر

Holger Fröning is a full professor at Heidelberg University’s Institute of Computer Engineering (ZITI), where he leads the Hardware and Artificial Intelligence (HAWAII) Lab. His research focuses on embedded machine learning , high-performance computing , and hardware-software co-design , with emphasis on resource efficiency, power optimization, and emerging architectures like analog , photonic , and resistive memory systems. He has held leadership roles including Managing Director of ZITI (2023–present) and Dean of Studies for Computer Science (2019–2022) , and has collaborated with institutions such as NVIDIA Research, Chinese Academy of Sciences, and Graz University of Technology. Research Trends : His recent publications explore Bayesian neural networks , green machine learning , analog computing noise mitigation , and GPU/FPGA optimization . Articles highlight photonic computing for AI , memory-efficient training , and hardware-aware DNN compression . Scientific Awards : 2025 HiPEAC Paper Award (Nature Computational Science) 2014 Google Faculty Research Award Multiple Best Paper Awards (IPDPS, ICPP, ECML-PKDD workshops) Leadership & Service : Organized workshops (WEML, ITEM, F4HD), chaired tracks at EuroPar and ISC, and served on program committees for ICPR, ECAI, and FPL. Education & Affiliations : PhD and MSc from University of Mannheim (2007/2001). Sponsors include DFG, FWF, FFG, NVIDIA, SAP, and XILINX.

Supratik Chakrabortyمشاهده پروفایل

استاد

• Formal Methods
• Formal Verification
• Automated Synthesis
• +۷ مورد دیگر

Supratik Chakraborty serves as the Bajaj Group Chair Professor in the Department of Computer Science and Engineering at Indian Institute of Technology Bombay. He maintains dual affiliations with the Centre for Formal Design and Verification of Software and the Centre for Liberal Education at IIT Bombay, demonstrating his cross-disciplinary engagement. Professor Chakraborty's research spans formal methods with focus on formal verification, rigorous analysis of system models, and automated synthesis of systems from specifications. His work bridges theoretical foundations with practical applications, particularly in developing mathematically provable guarantees for increasingly complex hardware, software, and intelligent systems. Current research interests include constrained counting and sampling, scalable formal verification of software and hardware systems, automated synthesis of programs and circuits, and applications of automata, logic and finite model theory to practical verification challenges. His publication trajectory shows a significant evolution from traditional hardware and software verification toward addressing verification challenges in machine learning and AI systems. Recent work increasingly focuses on interpretability of black-box models, verification of neural networks, and synthesis techniques applicable to intelligent systems. The research demonstrates strong interdisciplinary connections between formal methods, programming languages, and artificial intelligence. IIT Bombay Excellence in Thesis (CSE) Award 2011 (for Bhargav Gulavani's thesis) IIT Bombay Excellence in Thesis (CSE) Award 2017 (for Abhisekh Sankaran's thesis) Best Paper in Algorithms and Architecture track at IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1998 Professor Chakraborty has successfully supervised 11 doctoral students, with research spanning formal verification techniques, Boolean functional synthesis, constrained counting, and applications to hardware and software systems. His students have gone on to positions at major institutions including Microsoft Research, TCS Research, Georgia Tech, and BARC, reflecting the strong industry and academic impact of his mentorship. Current research directions show increasing emphasis on verification challenges posed by machine learning systems and AI. His research group at IIT Bombay, while not explicitly named in the materials, appears to focus on formal methods with strong connections to the Centre for Formal Design and Verification of Software. The group maintains active collaborations with international researchers including Moshe Y. Vardi at Rice University, and has made significant contributions to verification tools like VeriAbs that bridge theoretical advances with practical applications.

Jens Grothمشاهده پروفایل

دانشگاهی

• Cryptography
• Cryptographic Protocols
• Zero-Knowledge Proofs
• +۵ مورد دیگر

Jens Groth is an Honorary Professor at the Department of Computer Science, University College London (UCL), and serves as Chief Scientist at Nexus. His primary research focuses on cryptography, with an emphasis on cryptographic protocols, zero-knowledge proofs, and privacy-preserving technologies. Groth has contributed significantly to advancements in digital signatures, homomorphic encryption, and secure multi-party computation. He holds a leadership role as Program Chair for the 15th IMA International Conference on Cryptography and Coding (2015) and has been a key figure in shaping modern cryptographic standards. His work often bridges theoretical foundations with practical implementations, emphasizing efficiency and security. Groth's research interests include but are not limited to: cryptographic protocol design, lattice-based cryptography, and the application of zero-knowledge proofs in real-world systems such as blockchain and voting systems. His publications span venues like CRYPTO, EUROCRYPT, and ASIACRYPT, reflecting his impact on the field. Notably, he advocates for open access to research and has contributed to strategies ensuring conferences adopt de facto open-access policies. His current focus at Nexus centers on verifiable computation and distributed cryptographic systems.

Wolfgang Kunzمشاهده پروفایل

استاد

• Hardware Safety and Security
• Formal Hardware Verification
• Embedded Computing Systems
• +۵ مورد دیگر

Wolfgang Kunz is a Full Professor (C4, W3) and Chair of Electronic Design Automation at the Technische Universität Kaiserslautern since 2001. His academic career spans multiple prestigious institutions, including Goethe-University Frankfurt/Main and the University of Massachusetts, Amherst. He has held leadership roles such as Dean (2005-2007) and Vice-Dean (2007-2009) at TU Kaiserslautern. Habilitation (Dr. rer. nat. habil.), Computer Science, University of Potsdam (1996) Doctoral degree (Dr.-Ing.), Electrical Engineering, University of Hannover (1992) Dipl.-Ing. degree, Karlsruhe Institute of Technology (1989) His research focuses on hardware verification, security, and optimization, particularly in embedded systems and processors. His work on formal verification methods has been commercialized by companies like Synopsys, Mentor Graphics, and Siemens EDA. His 2016-2021 publications address critical security issues such as Spectre/Meltdown and introduce innovative verification frameworks adopted by industry leaders like Infineon and OneSpin Solutions. Scientific awards include the IEEE Fellow (2006), German IT Society Award (2005), and TU Kaiserslautern Distinguished Teaching Award (2016). He has served on editorial boards of major journals and coordinated the Erasmus Mundus European Master Program in Embedded Computing Systems since 2010. Key students: Jörg Bormann, Raik Brinkmann, Tobias Ludwig Collaborations: Siemens EDA, Infineon, AbsInt, Intel SCAP Spin-offs: LUBIS EDA, OneSpin Solutions

Marina Blantonمشاهده پروفایل

دانشیار

• Applied Cryptography
• Information Security
• Privacy-Preserving Computation
• +۳ مورد دیگر

Marina Blanton is an Associate Professor in the Department of Computer Science and Engineering at the University at Buffalo, and Faculty Director of Women in Science and Engineering within the School of Engineering and Applied Sciences. She holds a PhD in Computer Science from Purdue University (2007), along with multiple advanced degrees in Computer Science and Electrical Engineering from prestigious institutions in the US and Russia. Her research focuses on applied cryptography, information security, and privacy-preserving computation and outsourcing. She has pioneered work on secure multi-party computation protocols, privacy-preserving biometric authentication, and secure data analytics across distributed systems. Her contributions include foundational frameworks like PICCO, a compiler for private distributed computation, and advancements in protocols for genomic data analysis and floating-point secure computation. Blanton has been recognized with numerous awards, including IEEE and ACM Senior Membership (2016/2015), the ACM CCS Test of Time Award (2015), and the AFOSR Young Investigator Award (2013). Her research has been supported by grants such as NSF SaTC awards and AFOSR funding. Her work emphasizes practical implementations of secure computation, with applications in healthcare, biometrics, and distributed data systems. She has advised numerous students and contributed to educational initiatives promoting women in STEM through her leadership roles.

Brandon Reagenمشاهده پروفایل

استادیار

• Computer Architecture
• Hardware Acceleration
• Machine Learning
• +۳ مورد دیگر

Brandon Reagen is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University's Tandon School of Engineering, with affiliations in Computer Science, the Center for Advanced Technology in Telecommunications (CATT), and the NYU Center for Cybersecurity (CCS). He holds a PhD in Computer Science from Harvard (2018) and undergraduate degrees in Computer Systems Engineering and Applied Mathematics from the University of Massachusetts, Amherst (2012). His research focuses on computer architecture, hardware acceleration for deep learning and privacy-preserving computation, and VLSI design. He pioneered efficient deep learning accelerator designs through unsafe optimizations and contributed to benchmarking frameworks like Aladdin and MachSuite. His work spans privacy-preserving machine learning, secure computing systems, and hardware-software co-design for cryptographic protocols. Key achievements include the NSF CAREER Award (2024) and Siebel Scholar recognition (2018). His research centers on advancing secure computing through innovations like zero-knowledge proof accelerators (e.g., zkSpeed), fully homomorphic encryption frameworks (Orion), and entropy-guided privacy techniques for large language models. He leads interdisciplinary efforts at CATT and CCS to bridge hardware design and cybersecurity challenges. Reagen's contributions include over 50 publications in top-tier conferences (e.g., ISCA, ASPLOS, MLSys) and industry collaborations at Facebook AI. His work emphasizes practical solutions for encrypted computation efficiency, privacy-preserving inference, and scalable secure systems.

Stanislaw Jareckiمشاهده پروفایل

دانشیار

• Cryptography
• Cybersecurity
• Distributed Systems
• +۳ مورد دیگر

Stanislaw Jarecki is an Associate Professor of Computer Science at the Donald Bren School of Information and Computer Sciences (ICS) at the University of California, Irvine (UCI). He joined UCI in 2003 after earning his Ph.D. in Computer Science from MIT in 2001 under Prof. Shafi Goldwasser. His research focuses on applied and distributed cryptography, with significant contributions to threshold cryptography, secure computation, and password-authenticated key exchange (PAKE) protocols such as OPAQUE, which secures 2 billion WhatsApp users. He also worked at Intertrust’s StarLab and Stanford’s applied cryptography group under Prof. Dan Boneh. Education: Ph.D., Massachusetts Institute of Technology, 2001. Research Interests: Distributed cryptography, secure multi-party computation, privacy-preserving protocols, threshold security, blockchain applications, and efficient cryptographic primitives. His work emphasizes practical solutions for real-world systems, including protocols resilient to server compromises and scalable encryption methods. Awards: 2023 IACR Fellow for contributions to distributed cryptography and efficient secure computation. Advising and Grants: Jarecki’s research has been supported by grants including NSF SaTC programs. He advises students on cryptographic protocol design and security mechanisms. His work on OPAQUE and CHIC protocols exemplifies his focus on bridging theoretical cryptography with practical implementation. Labs/Teams: Leads a research group focused on applied cryptography and security within ICS at UCI, collaborating on projects like secure computation, privacy-preserving data processing, and cryptographic protocol development.

Shantanu Duttمشاهده پروفایل

استاد

• VLSI CAD
• Discrete Optimization
• FPGA Testing and Trusted Design
• +۲ مورد دیگر

Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.

Elette Boyleمشاهده پروفایل

دانشیار

• Cryptography
• Computer Security
• Coding Theory
• +۷ مورد دیگر

Elette Boyle is an Associate Professor at Reichman University (IDC Herzliya) and a Senior Scientist at NTT Research . She holds a Ph.D. in Mathematics from MIT (advised by Shafi Goldwasser and Yael Tauman Kalai) and an undergraduate degree from Caltech . Education Ph.D. in Mathematics, MIT B.S. in Mathematics, Caltech Her research focuses on cryptographic solutions for secure data processing , particularly in secure multi-party computation , function/homomorphic secret sharing , and distributed point functions . Recent work explores topology-hiding communication , memory checking complexity , and sublinear-communication MPC . Key trends in her publications include: Advancements in Function Secret Sharing for branching programs and sparse vectors. Efficient Secure Multi-Party Computation protocols with preprocessing. Information-theoretic and computational Topology-Hiding Broadcast schemes. Optimized Oblivious Transfer with constant computational overhead. Scientific Awards European Research Council (ERC) Award Israeli Science Foundation (ISF) Grant United States Air Force Office of Scientific Research (AFOSR) Grant Google Research Scholar Award International Association for Cryptologic Research (IACR) Recognition As Director of the Foundations & Applications of Cryptography (FACT) Research Center , she leads collaborative work with institutions like Technion Israel , Cornell University , and NTT Research . Her students include Pierre Meyer (Ph.D.) , Matan Hamilis (Ph.D.) , and D'or Banon (MSc.) .