Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.
Jiang Hu is a Professor in the Department of Electrical and Computer Engineering at Texas A&M University, holding the Eric D. Rubin '06 Endowed Professorship. He also serves as Co-Director of Graduate Programs and is affiliated with the Computer Science & Engineering department. His research focuses on VLSI design automation, machine learning applications, and hardware security. He has held roles as editor for IEEE Transactions on CAD and ACM Transactions on Design Automation, and chaired the 2012 ACM International Symposium on Physical Design. Education: B.S. in Optical Engineering (Zhejiang University, 1990), M.S. in Physics (1997), and Ph.D. in Electrical Engineering (University of Minnesota, 2001). He worked at IBM Microelectronics before joining Texas A&M in 2002. Research interests include energy-efficient VLSI circuits, on-chip communication fabrics, analog layout automation, and AI-driven EDA. Recent work emphasizes machine learning for design closure, privacy-preserving frameworks, and systolic array-based architectures. Awards: IEEE Fellow (2016) Humboldt Research Fellowship (2012) Multiple best paper awards at DAC, ICCAD, and ASPDAC Advising and grants: Leads initiatives like the SLICE project, NSF workshops on ML-EDA infrastructure, and serves as Editor-in-Chief of ACM TODAES since 2024. His work bridges academic research and industry applications in EDA and semiconductor design. Labs/Teams: Active contributor to open-source tools like ALIGN for analog layout generation and collaborations on machine learning for EDA commons.
Boris Murmann is Professor at Stanford University, specializing in integrated circuit design, mixed-signal computing, and energy-efficient AI hardware. His research advances neural interface technologies, analog design automation, and tinyML systems. Recent work develops ultra-low-power neural recording ICs for brain-computer interfaces, RRAM-based memory systems, and open-source semiconductor design frameworks. Publications demonstrate innovations in compressive sensing for neural data, hardware-algorithm co-design, and reinforcement learning for analog circuit synthesis. Significant contributions include Medusa (TinyML processor), EMBER (RRAM macro), and methodologies for coarsely-quantized computer vision and analog design automation.
Tathagata Srimani is an Assistant Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University (CMU), affiliated with the College of Engineering. He previously served as a Postdoctoral Scholar in Electrical Engineering at Stanford University. His academic journey includes a Ph.D. and S.M. in EECS from MIT (2022 and 2018 respectively) and a B.Tech. in E&ECE from IIT Kharagpur (2016). Research Focus: Srimani’s work centers on nanoelectronics and transformative NanoSystems. Key areas include: Carbon nanotube field-effect transistors (CNFETs) and their monolithic 3D integration with silicon Ultra-dense 3D integration of logic and memory to address the 'memory wall' in AI/ML Technology-architecture co-design frameworks for energy-efficient computing Key Achievements: Developed first silicon fab-compatible CNFET processes (TNANO ’18, Nature ’19) Enabled CNFET RISC-V microprocessor and monolithic 3D integration with Analog Devices/SkyWater Recipient of MIT Presidential Fellowship (2016) and Morris Joseph Levin Award (2018) Teaching & Outreach: Teaches semiconductor devices and hardware design, including hands-on 'Hacker Fab' courses. Leads the NEXUS Research Group exploring heterogeneous nanomaterials (e.g., magnetic and oxide semiconductors) and thermal/power management in 3D systems. Future Directions: Expanding into probabilistic computing hardware, co-design frameworks for application-specific systems, and scaling 3D NanoSystem technologies for industrial adoption.
Zhidan Zheng is a researcher at the Technical University of Munich (TUM), working within the Chair of Electronic Design Automation led by Prof. Ulf Schlichtmann. His office is located in room 0509.05.911 at Arcisstr. 21, 80333 Munich, with direct contact available via email zhidan.zheng@tum.de and phone +49 (89) 289 - 23692. Zheng holds a Master of Science degree as indicated by his academic title M.Sc. and has been actively contributing to the field of optical interconnects and network-on-chip design. Zheng's research focuses on wavelength-routed optical networks-on-chip, with particular expertise in network topology optimization, fault tolerance mechanisms, waveguide routing algorithms, and bandwidth allocation strategies. His work addresses critical challenges in photonic integrated circuit design, including thermal variation effects, crosstalk mitigation, and lifetime extension for communication-intensive systems. Zheng has developed several innovative methodologies including ToPro+ for topology projection, LightR for fault-tolerant architectures, and WROXIM for network-level simulation. Analysis of Zheng's publication trends from 2021-2025 reveals a consistent focus on practical implementation challenges of optical networks-on-chip. His research has evolved from foundational topology design (Light, 2021) to increasingly sophisticated solutions addressing reliability (LightR, 2023) and comprehensive system integration (ToPro+, 2025). The work demonstrates strong collaboration with researchers including Mengchu Li, Tsun-Ming Tseng, and Ulf Schlichtmann across multiple high-impact venues including DAC, DATE, ICCAD, and ASP-DAC. Zheng actively contributes to the Electronic Design Automation research group at TUM, participating in projects related to analog EDA, emerging technologies, and optical networks. His research is situated within TUM's broader initiatives in photonic integration and high-performance computing architectures, working closely with Prof. Schlichtmann's team on funded projects in the optical NoC domain.
State University of New York at New PaltzUnited States
Wafi Danesh is an Assistant Professor in the Department of Engineering Programs at SUNY New Paltz, part of the School of Science & Engineering. He holds a PhD in Electrical and Computer Engineering from the University of Missouri Kansas City (2022). Prior to academia, he served as a Senior Engineer I - Design at Microchip Technology Inc. (2022-2023). His research focuses on hardware security, leveraging machine learning for FPGA Trojan detection and secure 3D IC design. Teaching interests include System-on-Chip Design, Digital Logic Fundamentals, and Computer Architecture. Education: PhD in Electrical and Computer Engineering, University of Missouri Kansas City, 2022 Research Interests: Dr. Danesh explores cutting-edge methods to enhance hardware security, including AI-driven approaches for IoT device protection and thermal management in 3D integrated circuits. His work bridges machine learning and physical hardware vulnerabilities, emphasizing FPGA security and PUF-based solutions for wireless systems. Publications Trends: His articles span FPGA Trojan detection via NLP and unsupervised learning, thermal challenges in 3D ICs, and neuromorphic computing innovations. Recent work highlights automated security tools and multi-valued computing for energy efficiency. Awards: None explicitly listed in the provided materials. Advising & Grants: No formal advisees or grants are mentioned. His professional activities center on research and teaching.
Xin Li is a Professor in the Department of Electrical and Computer Engineering at Duke University and serves as the Associate Vice Chancellor at Duke Kunshan University. He holds a Ph.D. from Carnegie Mellon University (2005) and has held leadership roles in research consortia like the FCRP Focus Research Center and the Center for Silicon System Implementation (CSSI). His research bridges integrated circuits , machine learning , and cyber-physical systems , with applications in autonomous driving, battery lifetime prediction, and smart buildings. Education : Ph.D., Carnegie Mellon University (2005); M.S., Fudan University (2001); B.S., Fudan University (1998) His work emphasizes robust design methodologies for analog/RF circuits, data-driven predictive modeling , and Bayesian inference for high-dimensional variation spaces. Recent publications focus on generative adversarial networks for circuit design, multi-view imputation for incomplete data, and knowledge-driven autonomous systems . He has received numerous accolades, including the NSF CAREER Award (2012) , IEEE Donald O. Pederson Best Paper Awards (2013, 2016) , and IEEE Fellow (2017) . He has served as Editor for journals like IEEE Transactions on Biomedical Engineering and as Chair for conferences including ISVLSI and CAD/Graphics.
Paul Franzon is the Cirrus Logic Distinguished Professor and Associate Department Head for Graduate Affairs at the Department of Electrical and Computer Engineering, North Carolina State University. He holds a PhD and Bachelor's in Electrical Engineering and a Bachelor's in Physics/Mathematics from the University of Adelaide, Australia. His research focuses on quantum information science, machine learning-driven hardware design, 3D integration, and high-speed systems. Education: PhD in Electrical Engineering, University of Adelaide (1988) Bachelor's in Electrical Engineering, University of Adelaide (1984) Bachelor's in Physics and Mathematics, University of Adelaide (1982) Research Interests: Quantum computing and algorithm optimization AI-driven design automation for 3D integrated circuits High-speed communication systems Hardware security and FPGA acceleration Awards & Honors: IEEE Fellow (2006) Alcoa Foundation Distinguished Engineering Research Award (2005) NC State Alumni Distinguished Undergraduate Professor Award (2003) NSW Australia Expatriate Scientist Award (2003) Advising & Grants: Advised PhD student Priyank Kashyap (2023 graduate) Recipient of NSF Young Investigators Award (1993) Labs & Collaborations: Center for Advanced Electronics Through Machine Learning (CAEML) IEEE EPS Society (Associate Editor)
Alan Mantooth is a Distinguished Professor holding the Twenty-First Century Research Leadership Chair in Engineering within the Department of Electrical Engineering at the University of Arkansas, Fayetteville. He serves as Director of the National Center for Reliable Electric Power Transmission (NCREPT), Executive Director for GRAPES (NSF I/UCRC) and SEEDS (DoE Center), and Deputy Director of the NSF Engineering Research Center for Power Optimization of Electro-Thermal Systems (POETS). His educational background includes: B.S. in Electrical Engineering, University of Arkansas M.S. in Electrical Engineering, University of Arkansas Ph.D. in Electrical Engineering, Georgia Institute of Technology Dr. Mantooth's research centers on analog/mixed-signal IC design, power electronics CAD, and semiconductor device modeling with emphasis on harsh-environment applications. His pioneering work in silicon carbide (SiC) and gallium nitride (GaN) power systems has enabled high-temperature operation for electric vehicles and renewable energy infrastructure, significantly advancing reliability in extreme conditions. His 2025 publications reveal strong trends toward AI-driven power electronics (e.g., SolarFormer++ for PV profiling), wide-bandgap device modeling (β-Ga2O3, SiC), and innovative packaging solutions. Key themes include reliability engineering for extreme environments, multi-physics optimization, and explainable AI for safety-critical power systems. Major scientific recognition includes: IEEE Fellow (2009) for power electronic device modeling Three R&D 100 Awards (2009, 2014, 2016) for SiC power modules IEEE Power Electronics Society Technical Achievement Award (2019) Multiple university teaching/research awards including SEC Faculty Achievement Award (2015) As an exceptional mentor (UA Outstanding Mentor 2006-2008), he co-founded Lynguent and Ozark Integrated Circuits. His centers NCREPT, GRAPES, and SEEDS have secured major funding from NSF, DoE, and industry partners, supporting over 350 refereed publications and numerous patents. Current research focuses on AI-enhanced power electronics, recyclable packaging, and next-generation wide-bandgap device characterization. He leads the NCREPT test facility and multi-institutional teams developing grid-connected power electronic systems, secure energy delivery architectures, and thermal management solutions for high-power-density applications, with direct impact on electric transportation and renewable energy integration.
Santeri Porrasmaa is a Doctoral Researcher at Aalto University's Department of Electronics and Nanoengineering. He works within the Marko Kosunen Group , focusing on analog and microwave integrated circuit design. Research interests include automated design methodologies for analog circuits Development of voltage-to-time converters Electromagnetic simulation environments for microwave circuits Quantum-efficient photodetectors for optical flux measurement Recent publication trends show expertise in: Design automation frameworks for analog circuits Injection locking techniques for energy-efficient oscillators Electromagnetic simulation optimization Quantum metrology applications
Prof. Fábio Moreira de Passos is an Assistant Professor at Instituto Superior Técnico, University of Lisbon, and an Integrated Researcher at INESC-ID. He holds a Ph.D. from Universidad de Sevilla (2018) and has extensive industry experience with Analog Devices, Renesas, and SiliconGate. His research focuses on automated design methodologies for RF and mm-Wave circuits, energy harvesting for neural implants, and high-dynamic-range amplifiers for UAV systems. He has published over 50 papers, including 6 Q1 journal articles, and won prestigious awards like the EDAA Outstanding Dissertation Award (2019). Academic Affiliations: Instituto Superior Técnico (IST), INESC-ID Research Units: Nano-electronic Circuits and Systems (INESC-ID) Professional Memberships: IEEE Senior Member, IEEE Microwave Theory and Technology Society His research emphasizes industry-oriented applications such as automotive radar transceivers and battery-less neural implants. He has completed 14 chip tape-outs in technologies down to 16nm FinFET, with notable designs including a 77GHz mm-Wave receiver for ADAS systems. Current projects include generative AI for passive device design and automated synthesis frameworks for RF systems. Awards include Marie Curie Fellowship (2021-2023), IEEE Best Paper Awards (2018, 2022), and the 2016 EDA Competition. He co-leads the LAY(RF)^2 project and actively collaborates with global institutions like IMSE-CNM and University of Macao.
Rajkumar Sarma is a Research Fellow at the Department of Computer Science & Information Systems at Lero – the Research Ireland Centre for Software, University of Limerick. His work focuses on hardware design, VLSI systems, and optimization techniques for digital circuits. He specializes in areas such as low-power architectures, floating-point arithmetic, and evolutionary algorithms for automated design. His research emphasizes hardware-software co-design, reliability analysis under PVT (Process, Voltage, Temperature) variations, and efficient implementations of multiply-accumulate (MAC) units critical to digital signal processing and image processing applications. Key technical contributions include the development of the UCM algorithm for delay optimization, grammatical evolution for synthesizable HDL code generation, and novel approaches to reduce power consumption in MAC architectures. His work bridges theoretical algorithmic innovation with practical VLSI implementation challenges, addressing both performance and reliability under extreme operating conditions. Rajkumar’s publications span 2012–2025, with a strong focus on digital circuit design, including hybrid adders, low-power flip-flop implementations, and quantum gate-based reversible circuits. His research also extends to reliability analysis of electronic components like multi-layer ceramic capacitors. He has utilized advanced simulation tools such as Cadence ADE-XL for accelerated PVT analysis, demonstrating expertise in both computational modeling and hardware validation. While no specific awards or grants are listed, his extensive publication record reflects sustained engagement with cutting-edge challenges in computer architecture and VLSI systems design.
Harald Pretl is a Professor at the Department of Integrated Circuits within the Institute for Integrated Circuits and Quantum Computing at Johannes Kepler University Linz (JKU). Holding the title Univ.-Prof., he maintains active research leadership with current projects extending through 2029 and 107 documented research outputs including patents, articles, and conference proceedings. His research spans integrated circuits, quantum computing, mm-wave transmission, biomedical sensing, and open-source EDA tools. He specializes in high-frequency circuit design, ultra-low-power biomedical sensors, and educational applications of open-source design methodologies for analog/mixed-signal IC development. Recent work demonstrates cross-disciplinary innovation bridging engineering, neuroscience, and artistic expression. Recent publications reveal strong emphasis on practical implementation challenges: THz transmitter efficiency, brain-computer interface applications, ADC performance metrics, and open-source layout automation. These works collectively advance wireless communication systems, biomedical instrumentation, and accessible semiconductor design education through open-toolchain development. Prof. Pretl has supervised 3 students and actively promotes open-source EDA adoption through educational initiatives. His funded projects include Sub-blocks generators for NSSAR ADC (2025-2029), Open Parasitic Extraction for KLayout, and United Micro Technology collaborations, demonstrating sustained industry engagement. He co-leads the JKU LIT - SAL Intelligent Wireless Systems Lab (IWS Lab) and contributes to the High-Performance Integrated Quantum Computing project. Current activities include 42 documented presentations such as 'Using Open-Source EDA Tools in Hands-On IC Design Education' (2025) and 'Recent Developments in Ultra-Low-Power Biomedical Sensing' (2025), reflecting his dual focus on research innovation and pedagogical advancement.
Carl Sechen is a Professor in the Electrical & Computer Engineering Department at the University of Texas at Dallas (UT Dallas), affiliated with the Erik Jonsson School of Engineering and Computer Science. His research focuses on design and computer-aided design (CAD) of digital/analog integrated circuits, with a strong emphasis on secure ICs and transistor-level programmable fabrics. He leads projects like the TRAP fabric, which achieves 10X logic density over traditional FPGAs while enabling secure hardware through IC redaction. Education: Ph.D. (1987, UC Berkeley), M.S. (1977, MIT), B.E.E. (1975, University of Minnesota). Awards include IEEE Fellow (2002), UTD Distinguished Teaching Award (2014), and multiple Semiconductor Research Corporation awards. His work bridges theoretical CAD advancements with practical hardware security solutions. Research Highlights: Secure IC design, transistor-level programmability, FPGA architecture, hardware security. Key Projects: TRAP fabric development, anti-reverse engineering techniques, low-power design methodologies. Awards: Over 20+ honors including best paper awards at PRIME (2017) and DATE (nominated 2017). Publications span journals like IEEE Transactions on CAD and conferences such as DATE, ISCAS, and VTS. Current work emphasizes secure hardware through obfuscation and programmable logic innovations.
Dr. Lihong Zhang is a Full Professor in the Department of Electrical and Computer Engineering at Memorial University of Newfoundland. He holds a PhD in Electrical Engineering from Otto-von-Guericke University (Germany) and has held post-doctoral positions at Concordia University, Dalhousie University, and the University of Washington. His research focuses on VLSI design automation, analog/mixed-signal circuits, MEMS, energy harvesting, and biomedical instrumentation. Dr. Zhang leads the CADLAMS lab, supported by NSERC, CFI, and industry partners. Education: B.E. (H.U.S.T. Wuhan), M.Sc. (Eng.) (H.U.S.T. Wuhan), Ph.D. (Otto-von-Guericke University, Germany). Research Interests: VLSI design automation, MEMS design, renewable energy harvesting, microfluidics, wireless sensor networks, and EDA tools. His work addresses challenges in nanometer-scale technologies, including layout-dependent effects and manufacturability. Awards: 2008 CFI Leaders Opportunity Fund, 2016 Memorial University Research Excellence Award. Grants include funding from NSERC, CFI, and industry collaborations. Students and Collaborations: Supervises over 50 graduate students and collaborates with industry partners like Cadence, Synopsys, and IBM. Active in editorial roles for IEEE journals and conference organization. Lab Infrastructure: CADLAMS lab includes advanced computing resources, EDA software, and lab equipment for circuit prototyping and testing.
