Dr. Abusaleh Jabir is a University Reader at the School of Engineering, Computing and Mathematics, Oxford Brookes University. He holds a DPhil in Computing from the University of Oxford and leads the Advanced Reliable Computer Systems (ARCoS) group. His research focuses on reliable hardware design, memristive nanotechnology, edge computing, and secure authentication systems. He has over 80 peer-reviewed publications and multiple patents, including innovations in error-tolerant circuits and memristive architectures. **Education**: DPhil in Computing (University of Oxford). **Research Interests**: Reliable hardware design, electronic design automation, sensing at the edge, physical uncloneable authentication, and emerging memristor technologies. His work addresses challenges in IoT, edge computing, and cybersecurity through innovative electronic systems. **Funding & Projects**: Current projects include the Leverhulme Trust-funded MONITOR gas sensor array initiative. His research has been supported by the UK Ministry of Defence, EPSRC, and Finance South East. **Awards & Patents**: Multiple patents granted, including EU 17706875.6 (memristive logic) and GB 1914221.5 (reconfigurable memristive logic). Recognized with best paper awards. **Advising & Impact**: Supervised PhD students now leading semiconductor and automotive industries (e.g., Infineon Technologies, Continental Teves AG). Collaborates with academic and industrial partners globally. **Labs & Teams**: Leads the ARCoS group within the Artificial Intelligence, Data Analysis and Systems (AIDAS) Institute, fostering interdisciplinary innovation in secure and reliable electronics.
Xuan Zhang serves as Associate Professor in Electrical and Computer Engineering at Northeastern University, leading the Sensory AI Lab since joining in January 2024. Her research bridges computer architecture, integrated circuits, and artificial intelligence to develop miniaturized AI systems for autonomous physical platforms. She earned her PhD in Electrical and Computer Engineering from Cornell University in 2012. Her educational background forms the foundation for her interdisciplinary work spanning hardware and software co-design. Dr. Zhang's research focuses on artificial intelligence hardware, machine vision sensors, and security for autonomous systems. She pioneers techniques for efficient in-sensor computing, analog circuit optimization via machine learning, and hardware-level privacy preservation. Her work addresses critical challenges in energy efficiency, robustness, and security for edge AI deployment, particularly in resource-constrained environments like medical devices and autonomous vehicles. Analysis of her 2023-2025 publications reveals three dominant trends: (1) hardware-accelerated privacy mechanisms for sensors, (2) machine learning-driven analog circuit design automation, and (3) energy-efficient architectures for neural network inference. These works consistently target real-world applications in healthcare, autonomous systems, and semiconductor design. Her accolades include the prestigious NSF CAREER Award (2020) and leadership in a $10 million federal semiconductor initiative. She contributes to national efforts in AI-powered chip design through the National Center for the Advancement of Semiconductor Technology. Dr. Zhang advises graduate researchers in the Sensory AI Lab, securing significant funding for projects spanning hardware security, in-sensor computing, and autonomous system assurance. Her lab collaborates with federal agencies and industry partners on cutting-edge semiconductor research. The Sensory AI Lab operates at the hardware-software interface, developing novel architectures for intelligent edge devices. Current projects include optical privacy preservation, robust analog design tools, and energy modeling frameworks for in-sensor visual computing systems.
Daniel Saab is an Associate Professor in the Department of Electrical, Computer, and Systems Engineering at Case School of Engineering, Case Western Reserve University. His research focuses on computer architecture, VLSI system design, CAD design automation, and MEMS/NEMS-based technologies. He holds a PhD from the University of Illinois at Urbana-Champaign (1988), following a Master of Science (1985) and Bachelor of Science (1983) in the same field. His work emphasizes ultra-low-power and high-speed electronic systems, particularly leveraging nanoelectromechanical systems (NEMS) and MEMS technologies. Key contributions include MEMS-based logic gates for radiation-resistant processors, ultra-fast 1 GHz NEMS switches, and hybrid CNEMS-CMOS FPGA architectures. His research also addresses hardware security, such as Trojan modeling and verification methods for integrated circuits. Publications span conferences like IEEE SENSORS, TRANSDUCERS, and International Symposium on Quality Electronic Design, with a focus on advancing low-power circuits, nanotechnology integration, and high-reliability electronics. Current affiliations include teaching and research leadership at Case School of Engineering.
Yves Blaquière is a Professor in the Department of Electrical Engineering at École de Technologie Supérieure. He is affiliated with the Communications and Microelectronic Integration Laboratory (LaCIME), focusing on microelectronics, integrated circuit design, and power integrity in advanced electronic systems. His research spans VLSI/ASIC design, FPGA-based reconfigurable computing, MEMS for avionics, and radiation effects on electronics. Aeronautics and Aerospace Intelligent and Autonomous Systems Microelectronics and VLSI Power Integrity Modeling MEMS Switch Design Radiation-Resilient Circuits His recent publications highlight innovations in GHz-range power integrity for SiP, FPGA-based SHEPWM inverters, and MEMS switches for avionic power systems. Collaborations with researchers like Frédéric Nabki and Nicolas Constantin reflect his focus on industrial applications and technology transfer. Professor Blaquière co-supervises PhD candidates including Hachem Bensalem, Gabriel Nobert, and Abdurrashid Hassan Shuaibu, covering topics such as heterogeneous optimization, power converter modeling, and MEMS switch development. His work contributes to wafer-scale prototyping platforms like WaferBoard and advanced tools for radiation testing in FPGAs. LaCIME, under his involvement, emphasizes equity, diversity, and inclusion, offering students opportunities to engage in cutting-edge projects from materials to communication protocols. The lab's expertise includes micro/nanofabrication, photonic microsystems, and signal processing.
Alan Mantooth is a Distinguished Professor holding the Twenty-First Century Research Leadership Chair in Engineering within the Department of Electrical Engineering at the University of Arkansas, Fayetteville. He serves as Director of the National Center for Reliable Electric Power Transmission (NCREPT), Executive Director for GRAPES (NSF I/UCRC) and SEEDS (DoE Center), and Deputy Director of the NSF Engineering Research Center for Power Optimization of Electro-Thermal Systems (POETS). His educational background includes: B.S. in Electrical Engineering, University of Arkansas M.S. in Electrical Engineering, University of Arkansas Ph.D. in Electrical Engineering, Georgia Institute of Technology Dr. Mantooth's research centers on analog/mixed-signal IC design, power electronics CAD, and semiconductor device modeling with emphasis on harsh-environment applications. His pioneering work in silicon carbide (SiC) and gallium nitride (GaN) power systems has enabled high-temperature operation for electric vehicles and renewable energy infrastructure, significantly advancing reliability in extreme conditions. His 2025 publications reveal strong trends toward AI-driven power electronics (e.g., SolarFormer++ for PV profiling), wide-bandgap device modeling (β-Ga2O3, SiC), and innovative packaging solutions. Key themes include reliability engineering for extreme environments, multi-physics optimization, and explainable AI for safety-critical power systems. Major scientific recognition includes: IEEE Fellow (2009) for power electronic device modeling Three R&D 100 Awards (2009, 2014, 2016) for SiC power modules IEEE Power Electronics Society Technical Achievement Award (2019) Multiple university teaching/research awards including SEC Faculty Achievement Award (2015) As an exceptional mentor (UA Outstanding Mentor 2006-2008), he co-founded Lynguent and Ozark Integrated Circuits. His centers NCREPT, GRAPES, and SEEDS have secured major funding from NSF, DoE, and industry partners, supporting over 350 refereed publications and numerous patents. Current research focuses on AI-enhanced power electronics, recyclable packaging, and next-generation wide-bandgap device characterization. He leads the NCREPT test facility and multi-institutional teams developing grid-connected power electronic systems, secure energy delivery architectures, and thermal management solutions for high-power-density applications, with direct impact on electric transportation and renewable energy integration.
Marco Vacca is an Associate Professor in the Department of Electronics and Telecommunications (DET) at Politecnico di Torino and a member of the Interdepartmental Center PIC4SeR - PoliTO Interdepartmental Centre for Service Robotics. His work bridges electronics, nanotechnology, and computing architecture with a focus on innovative solutions to the memory wall problem. His research spans Logic-in-memory computing, Machine learning hardware acceleration, and Nanocomputing with specific emphasis on circuit architectures for probabilistic computing, magnetic devices, hybrid technologies integration, and CAD tools for emerging technologies. Dr. Vacca leads research in RISC-V extensions, hardware accelerators for AI, and autonomous robot systems for agricultural applications through the VLSILAB research group. Recent publications reveal a strong trend toward solving fundamental computing challenges through nanoscale innovations, particularly in memory-centric architectures, molecular field-coupled computing, and novel transistor technologies. His work demonstrates how logic-in-memory approaches can overcome traditional von Neumann limitations while improving energy efficiency for AI workloads. Editorial board member of ELECTRONICS (2021-2023) Program committee member for Design, Automation and Test in Europe Conference (DATE) 2020-2021 Dr. Vacca supervises PhD student Alessandro Varaldi working on 'Hardware AI Accelerators for Automotive Applications' and has led significant research projects including 'Device for Storage and Processing Data and Related Method' (2020-2021) and 'Quantum Computing and Quantum Communication: State of the Art and Applications in the Telco Sector' (2020). His grant portfolio shows strong industry and competitive funding support. As a core member of the VLSILAB research group, Dr. Vacca contributes to advancing VLSI theory and design applications with particular focus on implementing Big Data, Machine Learning, and Neural Networks in specialized hardware architectures that push the boundaries of conventional computing.
Assoc. Prof. Dr. Kadir Vardar is an Associate Professor at the Department of Electrical and Electronics Engineering, Faculty of Engineering, Dumlupınar University. He has held academic and administrative roles since 2012, including Vice President of Department (2015–2019). His research focuses on power electronics, embedded systems, renewable energy, and neural network applications in control systems. Education: BSc (2001) and MSc (2004) from Dumlupınar University; PhD (2011, English Program) from Dokuz Eylül University. Projects: Over 15 projects, including TÜBİTAK-funded initiatives on smart home automation, PV inverters, and embedded HIL simulators. Awards: 2011 Dokuz Eylül University Doctoral Publication Honor Award; 2001 Department First Place at Dumlupınar University. Research interests span power electronics (inverters, active filters), renewable energy systems (PV), and embedded systems (STM32, microcontrollers). He has published 29 articles and supervised multiple theses. Current courses include Power Electronics, Advanced Microcontrollers, and System Programming.
Dr. Majid Ahmadi is a Distinguished Professor in the Department of Electrical and Computer Engineering (ECE) at the University of Windsor's Faculty of Engineering. He holds a BSc from Sharif University of Technology (1971) and a PhD from Imperial College London (1977). His research focuses on digital signal processing, machine vision, VLSI systems, and memristive circuits. He is a Chartered Engineer (UK) and a Fellow of both IET and IEEE. His work spans cutting-edge areas including low-power VLSI architectures, illumination-invariant face recognition, and 3D IC testing. Recent publications address energy-efficient cognitive radio networks and microstrip filter optimization. His professional accolades include prestigious engineering fellowships. He advises graduate research in advanced signal processing and integrated circuit design. His contributions to IEEE Transactions and IET journals reflect his leadership in interdisciplinary electronics research.
Luca Crocetti is an Assistant Professor at the Department of Information Engineering (DII) of the University of Pisa. His research focuses on hardware security, embedded systems, and VLSI design for applications in Automotive, Space, IoT, and High-Performance Computing. He specializes in cybersecurity modules for automotive systems, space-grade FPGAs, and digital signal processing in satellite communications. His teaching includes electronics laboratory practices and cybersecurity principles, with a recent course on hardware's role in security for the Ph.D. program in Information Engineering. He has authored over 20 publications and holds 3 patents (1 national, 2 international), with notable work on cryptographic cores, secure boot mechanisms, and automotive cybersecurity. His contributions span efficient hardware implementations of AES, SHA-3, and other cryptographic algorithms, emphasizing compliance with standards like CCSDS for space applications. His research trends highlight a focus on hardware-efficient architectures, modular design for scalability, and robust security protocols for trusted environments. Notable publications address cryptographic co-processors for the European Processor Initiative, PUF-based security for RISC-V, and FPGA-based RNGs. While no formal awards are listed, his active role in cutting-edge cybersecurity projects underscores his contributions to embedded and space system security. His teaching and research emphasize hands-on lab experiences and real-world applications of hardware security principles.
Sandip Kundu is a Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst since 2005. Prior roles include Senior Researcher at Intel (1997–2005) and IBM Research (1988–1997). He holds a Ph.D. from the University of Iowa (1988) and a B.Tech from IIT Kharagpur (1984). Research Interests: Focuses on hardware security, VLSI design, CAD algorithms, microarchitecture, and neural processing. Notable contributions include work on physically unclonable functions (PUF), blockchain-based IC traceability, and securing embedded systems against adversarial attacks. Key Activities: Served as Associate Editor for multiple IEEE journals and held visiting professorships at institutions like University of Freiburg (Germany), Kyushu Institute of Technology (Japan), and Tsinghua University (China). Awarded IEEE Fellow and JSPS Invitational Fellowships. Awards: Includes five best paper awards, Intel’s Development Leadership Pioneer Award, IBM’s Outstanding Technical Achievement Award, and recognition as a Distinguished Visitor by IEEE Computer Society. Grants & Labs: Active in NSF-funded research and leads the Advanced VLSI Design and Test Group, exploring secure hardware design, neuromorphic computing, and resilient architectures for edge devices.
Patanjali Sristi is an Assistant Professor at Augusta University's School of Computer and Cyber Sciences, specifically within the Department of Cybersecurity Engineering. Located at 100 Grace Hopper Lane in Augusta, Georgia, Dr. Sristi joined the university in January 2025 after previously working as a Postdoctoral Researcher at the University of Florida with Dr. Swarup Bhunia. Their academic journey began with a B.Tech in Electrical and Electronics Engineering from Pondicherry University in 2011, followed by both MS and Ph.D. in Computer Engineering from the Indian Institute of Technology (IIT Madras). Dr. Sristi's educational background demonstrates a strong foundation in electrical engineering and computer science, with advanced specialization in hardware security. Their Ph.D. research at IIT Madras was supervised by Dr. Kamakoti Veezhinathan, focusing on critical aspects of hardware security that would form the basis of their future research career. Dr. Sristi's research program centers on addressing one fundamental question: "How can we design, measure and build efficient and affordable security assurances for a given hardware design in the context of an untrusted supply chain while respecting the design constraints at each level of abstraction?" This research vision spans three interconnected domains: AI for System Design: Developing data models and AI techniques for next-generation hardware systems AI for Hardware Security: Creating AI models for vulnerability detection, countermeasure evaluation, and mitigation of supply chain threats Cybersecurity for AI: Establishing metrics and algorithms for secure development, deployment, and operation of AI systems Dr. Sristi's scholarly output reveals a consistent focus on hardware security challenges within the modern distributed electronics supply chain. Their work demonstrates a progression from foundational research on hardware trojans and side-channel attacks toward comprehensive frameworks addressing the emerging "zero trust" paradigm in hardware security. A notable trend is the integration of AI/ML techniques with traditional hardware security approaches, reflecting the evolving nature of security threats and countermeasures. Their publications span prestigious venues including IEEE Transactions on VLSI Systems, IEEE Transactions on Computers, and various IEEE conferences, indicating strong recognition within the hardware security community. While specific awards aren't detailed in the available information, Dr. Sristi's research impact is evident through multiple US patents (including US Patent 11,899,827 and US Patent App. 17/392,376) and invitations to deliver talks at prominent organizations including Sony Finishing School, Northrop Grumman, and IEEE events. Their work on Netflix Privacy Analysis was featured in Wired, demonstrating real-world relevance and impact. Dr. Sristi actively engages with students through courses including CSCI 8940 (Dissertation Research), CSCI 8720 (Problems in Computer & Cyber), and CSCI 7900 (Research Colloquium). Their research program appears well-supported through collaborations with major institutions and industry partners, as evidenced by workshops conducted for the Indian Army in conjunction with Pravartak and IIT Madras. These partnerships suggest substantial research funding and collaborative opportunities that enhance the educational experience for students. Though specific lab information isn't provided in the available text, Dr. Sristi's research scope suggests involvement with hardware security laboratories equipped for VLSI design, testing, and security evaluation. Their work on IoT security, hardware trojans, and supply chain security would require facilities for physical device testing, side-channel analysis, and hardware emulation. The focus on "zero trust" implementation for hardware security indicates a research environment that bridges theoretical security models with practical implementation challenges.
Dr. Dimitrios Bakalis is an Assistant Professor at the Department of Physics, University of Patras, specializing in Digital Electronic Circuits and Systems. He joined the faculty in 2004 and focuses on the design and control of digital circuits, emphasizing low-power testing and built-in self-test (BIST) methodologies. His academic roles include teaching courses such as Computer Programming I, Digital Electronics, and Microcomputer Architecture at both undergraduate and postgraduate levels. Education: Diploma in Computer Engineering and Informatics (University of Patras) Master’s Degree in Computer Science and Technology (University of Patras) PhD in Computer Engineering and Informatics (University of Patras) Research Interests: His work revolves around VLSI design, arithmetic circuits, and low-power techniques. Key areas include modulo arithmetic circuits, fault-tolerant systems, and reconfigurable computing architectures. He has published over 50 papers in top-tier journals and conferences, contributing to advancements in digital circuit efficiency and reliability. Teaching: He instructs core courses in digital electronics and computer architecture, integrating cutting-edge research into his pedagogy. His MSc courses focus on FPGA-based digital system design, emphasizing practical applications. Labs/Teams: His research aligns with the Electronics & Computers sector within the Department of Physics, collaborating on projects involving arithmetic core optimization and low-power testing strategies.
James Morizio serves as an Adjunct Professor in the Department of Electrical and Computer Engineering at Duke University, leveraging 35+ years of expertise in analog CMOS microelectronics for biomedical applications. His research bridges electrical engineering with neuroscience through disruptive sensor interface technologies for neural recording/stimulation and ultrasonic microfluidics. His educational background includes a Ph.D. in Electrical Engineering from Duke University (1995) M.S. in Electrical Engineering from University of Colorado, Boulder (1984) B.S. in Electrical Engineering from Virginia Polytechnic Institute and State University (1982) Morizio's research focuses on developing high-performance neural interfaces and acoustofluidic systems. Key areas include wireless neural instrumentation for closed-loop electrophysiology, CMOS-based ultrasonic transducers for microfluidic manipulation, and low-power VLSI design for implantable devices. His work emphasizes translating microelectronics innovations into biomedical solutions for neuroscience and diagnostics. His publication portfolio demonstrates consistent contributions to neural engineering and microfluidics, with recent trends showing increased focus on acoustofluidic diagnostics (e.g., AIMDx chip) and osseointegrated neural interfaces for prosthetic control. The research spans fundamental circuit design to translational applications in cancer metabolism and neuroprosthetics. Scientific recognition includes 15-year service award from Triangle BioSystems International/Harvard Bioscience Inc. (2016) Current research is supported by major grants including Neuro-CROWN (ultra-flexible electrode arrays), digital acoustofluidic systems for biomedical automation, and osseointegrated neural interfaces for prosthetic control. His teaching portfolio spans advanced VLSI design and special topics courses, though specific advising roles are not documented. Collaborative work involves interdisciplinary teams in neuroscience and biomedical engineering, particularly through partnerships with Triangle BioSystems International and translational projects using ovine models for neural interface validation.
Youhua Shi is a full Professor in the Faculty of Science and Engineering at Waseda University, Japan. He obtained his Doctor of Engineering from Waseda in 2005 and is an active member of IEICE, IPSJ, IEEE, and two Japanese academic societies. His research portfolio integrates trustworthy computing, hardware security of AI accelerators, energy-harvesting interface circuits for triboelectric nanogenerators, and low-power VLSI design-for-test methodologies. Education: Doctor of Engineering, Waseda University (2005) Graduate studies, Waseda University, Division of Engineering (completed 2005) Research Interests: Prof. Shi pursues trustworthy and secure silicon systems, spanning hardware Trojans in automated AI-accelerator flows, radiation-hardened latch design for soft-error resilience, and power-efficient CNN accelerators exploiting zero-gating and data-reuse techniques. Parallel work targets energy-autonomous IoT through advanced interface circuits for triboelectric nanogenerators, achieving record energy-per-cycle beyond the classical CMEO limit. Publication Trends: Recent articles (2024-2025) emphasize two thrusts: (i) security of AI/FPGA accelerators—proposing stealthy hardware-Trojan frameworks embedded within design-space-exploration flows that can misclassify up to 97% of inputs—and (ii) power electronics for triboelectric harvesters—introducing dual-output rectifiers and Bennet-doubler biasing that multiply output power >150× over conventional full-wave rectifiers, enabling battery-free IoT nodes. Scientific Awards: APCCAS Best Student Paper Award – 2020 IEEK Best Paper Award – 2012 Students & Collaboration: He has mentored numerous doctoral and master’s scholars, including Yirui Su, Chao Guo, Jinghao Ye, Lin Ye, Saki Tajima, and Masaru Oya, many of whom serve as first authors on his high-impact publications, indicating an active and productive advising role. Labs & Teams: While the text does not name a specific laboratory, his continued affiliation with Waseda University’s Faculty of Science and Engineering and his extensive project output imply he leads a research group focused on secure & energy-efficient VLSI systems, collaborating closely with colleagues such as Prof. Masao Yanagisawa and Prof. Nozomu Togawa.
Damu Radhakrishnan is an Associate Professor in the Department of Computer Engineering at SUNY New Paltz. He holds a Ph.D. in Electrical Engineering from the University of Idaho, following B.Sc. and M.Tech. degrees from the University of Kerala and IIT Kanpur, India. His research focuses on low-power digital architectures, high-performance arithmetic circuits, reversible logic, and bio-medical instrumentation. He teaches courses including Introduction to Engineering Science, Digital Logic Lab, Digital Systems Design, and Senior Design Project 2. Dr. Radhakrishnan has contributed to over 20 publications since 1983, emphasizing low-power circuit design, residue arithmetic, and biomedical device development. His work spans analog-to-residue converters, fault-tolerant systems, and medical instrumentation. Key technical reports include contributions to NASA Langley Research Center and EG&G Corporation projects. His research trends reflect a sustained focus on energy-efficient digital systems, with early contributions to CMOS power optimization and later advancements in biomedical device testing. His publications demonstrate expertise in both theoretical foundations (e.g., switching theory textbooks) and applied engineering (e.g., defibrillator analyzers). Dr. Radhakrishnan maintains an active lab in Resnick Engineering Hall, where he oversees senior design projects and collaborates on interdisciplinary engineering solutions. His technical reports highlight contributions to medical simulation tools, VLSI implementation methods, and analog-digital interface design.
