Xiaokang Qiu

Xiaokang Qiu is an Associate Professor in the Elmore Family School of Electrical and Computer Engineering at Purdue University. His research focuses on program synthesis, formal verification, and hardware/software design with an emphasis on automated reasoning and system resilience. He holds a leadership role in advancing techniques for scalable verification of hardware systems and developing efficient program synthesis methods.

His research interests include program synthesis, formal methods, hardware design, and algorithm optimization. He explores applications in concurrent systems, network protocols, and safety-critical systems, often integrating machine learning and automated reasoning approaches.

Recent work trends show a focus on leveraging large language models for invariant generation, optimizing network and hardware systems through formal methods, and advancing recursive algorithm verification. His publications span topics from concurrent programming to runtime verification frameworks for autonomous systems.

Xiaokang Qiu’s contributions include over 20 peer-reviewed articles since 2004, with recent highlights in 2025-2024 addressing cutting-edge challenges in program synthesis and hardware verification. He maintains an active research lab focusing on resilient autonomous systems and compiler optimizations. Office: BHEE 329 | Email: xkqiu@purdue.edu | Website: https://engineering.purdue.edu/~xqiu/