Tim A.C. Willemse

Tim A.C. Willemse is an Associate Professor in the Formal System Analysis group at Eindhoven University of Technology (TU/e), Department of Mathematics and Computer Science. His research focuses on formal methods, model checking, and verification technologies, with applications in high-tech industries such as CERN and Dezyne. He holds a part-time affiliation with CERN as a software engineer and researcher. Key areas include parameterised Boolean equation systems, parity games, and mCRL2 toolset development. He has led projects like AVVA, VICTORIA, and VOCHS, supported by NWO and the European Commission.

Education: PhD and MSc in Computer Science from TU/e. Former roles include researcher at ASML and Radboud University, Nijmegen. Served as Managing Director of IPA (2017) and is active in societies like ACM SIGACT and EATCS.

Research Interests: Formal verification, model checking algorithms, industrial software reliability, and verification of real-time systems. His work bridges theoretical computer science with practical applications in high-tech and industrial software.

Publications: Recent work emphasizes efficient evidence generation for model checking, formal methods in industry, and domain-specific language engineering. His articles reflect trends in scalable formal methods and industrial collaboration.

• Awards: Best Paper Awards (FACS 2018, EATCS 2020), FORTE Best Artefact Award (2022).

Grants & Advising: Secured funding from NWO, EU, and industry partners. Supervised 47+ academic works. Teaches courses on Model Checking and Process Theory. Active in national and international research networks.

Labs/Teams: Leads the Formal System Analysis group, contributing to mCRL2 toolset development and verification technologies for industrial tools like Dezyne.