Rachit Nigam

Rachit Nigam serves as an Assistant Professor in the Department of Electrical Engineering and Computer Science (EECS) at the Massachusetts Institute of Technology's School of Engineering. He leads the FLAME Lab, focusing on the intersection of programming languages and computer architecture. His research profile demonstrates significant involvement in major programming languages conferences including PLDI, SPLASH, and ICFP, where he has served in various committee roles from Artifact Evaluation to Student Research Competition Chair.

Dr. Nigam's research centers on programming languages and hardware systems, with particular emphasis on creating compilers that transform programs into architectures. His work bridges theoretical type systems with practical hardware implementation, developing tools like Calyx (an intermediate language for hardware accelerator generators) and Dahlia (implementing time-sensitive affine types). His approach combines formal methods with practical compiler design to address challenges in predictable accelerator generation and hardware compilation.

His publication record reveals a consistent trajectory in hardware-aware programming language design, with recent work focusing on unifying static and dynamic intermediate languages for accelerator generators. The publications demonstrate expertise across multiple subfields including type systems for hardware timing constraints, modular hardware design methodologies, and synthesis-aided compiler techniques for specialized architectures like DSPs.

As an active member of the programming languages community, Nigam has served on numerous conference committees including PLDI, OOPSLA, and LCTES. He has chaired sessions, organized tutorials (including 'DSL-based Hardware Generation'), and contributed to community initiatives like PL Tea. His GitHub presence shows active development in projects related to hardware compilation with significant contributions to repositories like Calyx, Filament, and Dahlia.

Dr. Nigam leads the FLAME Lab at MIT, which focuses on creating programming models and compiler infrastructure for hardware acceleration. His work with the Calyx compiler ecosystem represents a significant contribution to the field of hardware accelerator generation, providing tools that enable more predictable and efficient hardware compilation processes. His research has practical implications for domain-specific hardware accelerators and the broader challenge of making hardware design more accessible through programming language techniques.