Kaushik Patra

Kaushik Patra is a Lecturer in the Department of Computer Science at San José State University (SJSU). He holds a Master of Science in Computer Engineering from CSU-San Jose (2013). His research interests focus on VLSI design, circuit analysis, parallel computing, and software testing methodologies.

Key publications include work on parallel flip-flop timing analysis (2014), resource estimation for computational jobs (2011), transistor-level device identification algorithms (2008), and software test coverage frameworks using BIT (2008).

Dr. Patra's academic profile emphasizes practical applications in hardware design optimization and computational resource management. He can be reached at kaushik.patra@sjsu.edu.