Jianyi Cheng

Jianyi Cheng is a Lecturer in Computer Architecture at the School of Informatics, The University of Edinburgh, where he is affiliated with the Institute for Computing Systems Architecture. His work focuses on advancing computing systems through innovative hardware design and optimization.

His research interests lie primarily in computer architecture and reconfigurable computing, with emphasis on FPGA-based acceleration, high-level synthesis, and energy-efficient system design. These areas are critical for next-generation computing platforms in domains such as AI, scientific computing, and embedded applications.

The trends in his research, though not detailed in specific publications here, align with modern challenges in hardware-software co-design and domain-specific architectures. His work bridges the gap between theoretical algorithms and practical implementations on programmable logic.

Jianyi Cheng has not been listed with any scientific awards in the provided text.

He is actively involved in research within the Institute for Computing Systems Architecture, contributing to advancements in computing systems. While specific grants or advising roles are not mentioned, his position suggests engagement in research leadership and student supervision.