Jiafeng Xie

Jiafeng (Harvest) Xie is an Assistant Professor in the Department of Electrical and Computer Engineering at Villanova University, where he directs the Security and Cryptography (SAC) Lab. He holds a Ph.D. in Electrical Engineering from the University of Pittsburgh and has prior faculty experience at Wright State University. His research focuses on cryptographic engineering, post-quantum cryptography, hardware security, and digital design for telemetry systems.

Education includes a Ph.D. from University of Pittsburgh (2013-2014), M.E. from Central South University (2007-2010), and B.E. from Yanshan University (2002-2006). He has received prestigious awards like the 2024 IEEE Philadelphia Engineer of the Year Award and the 2023 Art Ryan Award. His work spans over 66 peer-reviewed publications, with a focus on hardware acceleration for post-quantum cryptographic systems.

Research interests include post-quantum cryptographic engineering, fully homomorphic encryption, fault detection methodologies, and digitalization of aeronautical telemetry systems. His grants include NSF SaTC and NIST-funded projects. Teaching includes courses like Embedded Systems and Post-Quantum Computing. Current advisees include Ph.D. students Pengzhou He, Tianyou Bao, and Yazheng Tu, along with several M.S. and undergraduate researchers.

The SAC Lab collaborates with AFRL and explores novel cryptographic hardware designs, with recent breakthroughs in compact accelerators for lattice-based cryptography and approximate homomorphic encryption. His work emphasizes algorithm-architecture co-design for security and efficiency in emerging computing systems.