Francesco Pontiggia

Francesco Pontiggia is a PreDoc Researcher at the Institute of Computer Engineering, Faculty of Informatics at TU Wien. His research focuses on formal verification of probabilistic systems, cyber-physical systems, and automated controller synthesis. He contributes to the ProbInG project (2020–2025), developing model checkers for probabilistic operator precedence languages and related formalisms.

Key research interests include probabilistic hyperproperties, formal methods for probabilistic programming, and verification techniques for recursive stochastic systems. His work bridges theoretical foundations with practical tools such as POPACheck and POMC, targeting applications in automated planning and program analysis.

Recent publications (2019–2025) emphasize advancements in model checking algorithms for probabilistic systems, operator precedence languages, and exception handling mechanisms. These works address challenges in verifying complex systems with stochastic behaviors and conditional probabilities.

He collaborates on projects integrating formal methods with compiler design, runtime verification, and cyber-physical system design. His research has led to tool implementations and theoretical frameworks published in top-tier venues like QEST and ACM Transactions on Programming Languages and Systems.