Theo MarkettosView profile
Research Fellow
Dr. Theo Markettos is a Senior Research Associate at the Department of Computer Science and Technology, University of Cambridge. His research focuses on computer architecture, security, and systems & networking, with notable contributions to the CHERI capability system and FPGA-based hardware prototyping. He teaches the ECAD and Architecture Practical Classes (Part IB) for undergraduate students. His work spans secure hardware-software interfaces, memory protection mechanisms, and parallel computing architectures. He has contributed to projects like Bluehive (a FPGA-based neural network simulator) and CHERI, which enhances system security through compartmentalization and capability-based protections. Recent publications address heterogeneous accelerators, dynamic scalarization for GPGPUs, and termination detection in message-passing architectures. Markettos has collaborated extensively with researchers from academia and industry on topics such as FPGA cluster interconnect design, DMA vulnerability analysis (Thunderclap), and FPGA-based SoC prototyping. His teaching emphasizes hands-on exploration of full-stack computer design using FPGAs. He is based at the William Gates Building in Cambridge and leads efforts in secure computing systems through hardware innovation and interdisciplinary collaboration.











