Pan Li is a Lecturer at Queen Mary University of London's School of Electronic Engineering and Computer Science. His research focuses on cybersecurity vulnerabilities in machine learning systems, particularly adversarial attacks and defense mechanisms. Key research areas include: Security analysis of machine learning models Poisoning attack detection and mitigation Knowledge transfer regularisation Multi-view data analysis Few-shot learning robustness Recent work demonstrates expertise in cross-domain learning security, network embedding for fraud detection, and spectral clustering-based defense mechanisms. Publications from 2018-2024 reveal consistent contributions to academic journals and conferences in computer science and cybersecurity. Email contact: pan.li@qmul.ac.uk
Nicolo' Bellarmino is a Research Fellow and Research Assistant at the Department of Automatic Control and Computer Science (DAUIN) of Politecnico di Torino. His roles include teaching and collaborating in courses such as System Programming, Computer Science, and Future of Work across Computer Engineering and Aerospace Engineering programs. He is affiliated with the CAD - Electronic CAD & Reliability Group (DAUIN), focusing on research in machine learning, embedded systems, and hardware testing. His research interests center on computational intelligence applied to computer-aided design, particularly in machine learning techniques for microcontroller performance screening. He has also explored neural network resiliency, fault detection in CNNs, and device-aware testing methodologies. Recent work emphasizes compressed sensing, feature selection, and transfer learning in resource-constrained systems. Bellarmino's publications span conference proceedings and journals, addressing challenges in embedded systems testing, neural network optimization, and biomedical applications like COVID-19 detection via exhaled breath analysis. His contributions bridge theoretical machine learning advancements with practical hardware validation and optimization. He actively contributes to academic teaching, maintaining an email contact at nicolo.bellarmino@polito.it for professional inquiries.
Prof. Martin Horauer is a Professor and Head of both the Bachelor in Electronics Engineering and Master in Embedded Systems programs at Technikum Wien, Austria. He holds a Doctoral degree from Vienna University of Technology and has over two decades of expertise in embedded systems, automotive electronics, and real-time communication protocols. His research focuses on fault tolerance, high-level synthesis, and verification of embedded systems. Education: Electrical Engineering from Vienna University of Technology (1994 Ph.D.) Affiliations: Research Group Embedded Systems, Vienna University of Technology (1997–2002), Technikum Wien (2002–present) His work spans FlexRay automotive networks , FPGA reliability , and system-on-chip verification . Notable contributions include the SynUTC synchronization project and contributions to the Josef Ressel Center for Verification of Embedded Systems. Awards include the Vienna MA27 Research Prize (2008) and best paper awards at FMICS 2011 and DSN 2001. Grants include EU EFRE-funded projects (AC-Centrope II) and FFG initiatives (Flexicount). He chairs review boards for academic programs and serves on technical committees for DATE, RTAS, and MESA conferences.
Stelios Neophytou is an Associate Professor and Head of the Department of Engineering at the University of Nicosia. He holds a PhD in Computer Engineering from the University of Cyprus (2009) and a Bachelor's degree in Computer Engineering and Informatics from the University of Patras, Greece (2003). His research focuses on Electronic Design Automation, specifically developing algorithms for integrated circuit design verification and post-manufacturing testing. This includes methodologies for enhancing Automatic Test Pattern Generation (ATPG), test size compaction, and multiprocessing environments, alongside work on Built-In Self-Test architectures and graph-theoretic problems involving Binary Decision Diagrams. Dr. Neophytou has held academic roles such as Special Scientist and Teaching Assistant at the University of Cyprus (2003–2008) and Special Teaching Staff (2008). His expertise aligns with UN Sustainable Development Goals, particularly in advancing quality education and innovation. Notable contributions include research on IoT performance estimation frameworks, underwater sound classification using edge computing, and cross-national studies on automated vehicle acceptance. His work emphasizes scalability in testing processes, leveraging multicore systems and shared-memory architectures to improve efficiency. Recent studies explore real-time signal processing in IoT systems and agile edge classification for environmental monitoring. Dr. Neophytou maintains active collaborations in both technical and interdisciplinary research areas, contributing to both academic and practical advancements in engineering and computer science.
Manikandan Palanichamy is an Associate Professor at Østfold University College, specializing in green energy transitions, smart energy systems, and emerging ICT technologies. He holds a PhD in Electronics and Telecommunications Engineering from NTNU, Norway, and has extensive international academic and industry experience. Education: PhD (2013): NTNU, Norway Master’s (2006): National Cheng Kung University, Taiwan Bachelor’s (2004): MKU, India Engineering Diploma (2001): Alagappa Polytechnic, India Research Interests: His work focuses on green energy, Industry 5.0, circular economy, IoT integration, and hardware security. He has pioneered novel CAM cell designs, path delay fault testing methodologies, and sustainable energy solutions. Recent projects include bilateral collaborations on renewable energy and smart industrial IoT systems. Publications: Over 30 peer-reviewed articles in journals like IEEE Proceedings and International Journal of Engineering and Advanced Technology. Key themes include AI integration in networks, LoRaWAN for industrial IoT, and hardware security. Awards: IEEE Best Paper Award (2006) Roles: International Coordinator at Østfold University College, managing student exchanges and partnerships. He also advises industrial projects in software development and IIoT integration. Labs/Teams: Involved in the Green Energy Research Hub and collaborates with institutions globally on projects like BioSolar Hydrogen and ReSAG (Remote Sensing for Agriculture).
Minah Lee is a Postdoctoral Fellow at Georgia Tech's Electrical and Computer Engineering department. Her research integrates edge intelligence, energy-efficient computing, and reliable sensor platforms. Publications feature cross-layer hardware designs (AFE-CIM macro), cryogenic computing efficiency (Cool-CIM), and uncertainty estimation for neural accelerators. Recent work explores multi-agent dynamics and analog computing robustness.
Gülay YALÇIN is an Assistant Professor at Abdullah Gul University since 2016. She holds a Ph.D. in Computer Architecture from Universitat Politècnica de Catalunya (2014), an MS in Computer Engineering from TOBB University (2007), and a BS in Computer Engineering from Hacettepe University (2003). Her research focuses on reliable computer design, fault detection, parallel architectures, and low-power systems. She has led projects like ParaDIME (2012-2015) and Velox (2008-2011), advancing energy-efficient computing and transactional memory. Education: Ph.D., Universitat Politècnica de Catalunya, Department of Computer Architecture (2008-2014) M.S., TOBB University of Economics and Technology, Computer Engineering (2007) B.S., Hacettepe University, Computer Engineering (2003) Research Interests: Her work spans fault-tolerant computing, energy-efficient designs, hardware transactional memory, and parallel architectures. She has contributed to error detection techniques leveraging comparators, voltage scaling for reliability, and novel cache designs like Flexicache. Key Projects: ParaDIME (2012-2015): Energy minimization in data centers. Shortlisted for the 2016 Innovation Radar Prize. Velox (2008-2011): Transactional memory for multi-core systems. Reliable Embedded Processors (2007-2008): Fault mitigation in embedded systems. Teaching: She teaches undergraduate courses on 'Exploring Profession' and graduate courses on 'Computer Architecture.' Advising: Currently advising M.S. student Albert Njoroge Kahira on reliable microarchitecture design. Labs/Teams: Active in the Barcelona Supercomputing Center (BSC) during her postdoc (2014-2015) and as a graduate researcher (2009-2014).
Jim Plusquellic is a Professor in the Department of Electrical and Computer Engineering at the University of New Mexico. He holds leadership roles including Director of the Integrated Circuit Hardware Analysis Laboratory (IC-HAL) and President/CEO of IC-Safety, LLC. His research focuses on hardware security, trust, and IoT systems, with contributions to PUF-based authentication and Trojan detection. He has authored/co-authored over 100 refereed publications and holds multiple patents. Plusquellic has been honored with awards such as the IEEE Computer Society's Outstanding Contribution Award and induction into the HOST Hall-of-Fame. Education: Ph.D., Computer Science, University of Pittsburgh, 1997 M.S., Computer Science, University of Pittsburgh, 1995 B.S., Biology, Indiana University of Pennsylvania, 1983 Research & Grants: Lead PI for the "Trusted and Assured Microelectronics Theme" under ASU's SWAP Hub ($2.5M, 2024-2028) NSF-funded projects on hardware security primitives and DFM (e.g., $300K for regional process variation analysis) Industry collaborations with Sandia National Labs, IBM, NASA, and commercial entities Key Contributions: Co-founder of the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) Developed PUF-based authentication protocols (e.g., PUF-Cash for digital currency) Authored book chapters on hardware security and Trojan detection Labs & Teams: Integrated Circuit Hardware Analysis Laboratory (IC-HAL) Collaboration with Enthentica Inc. and IC-Safety for hardware security commercialization
Metafas Dimitrios is a Lecturer in the Department of Electrical and Electronic Engineering at the University of West Attica, School of Engineering. His office is located in Building Z, Room ZB201. He holds a Doctoral Degree from the University of Patras (1993) and an Electrical Engineering Diploma (1987). His research focuses on Real-Time Software, System-On-a-Chip design, DSP architectures, and applications of AI/Machine Learning in games and education. Teaches courses such as Introduction to Programming, Algorithms and Data Structures, and UML-based system design methodologies. Active in interdisciplinary research, including educational technology and embedded systems. Recent work emphasizes AI-driven educational tools and reinforcement learning applications in gaming. Earlier contributions span wireless communication systems, VLSI design, and hardware-software co-development.
Costas J. Spanos is a Professor in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. He holds academic leadership roles including former Director of the Berkeley Microfabrication Laboratory (1994-2000), Director of the Electronics Research Laboratory (2004-2005), and Associate Dean for Research in the College of Engineering (2004-2008). His research focuses on statistical analysis in integrated circuit design, semiconductor manufacturing optimization, and sensor technologies for process control. He has authored over 200 refereed articles and a seminal textbook on semiconductor manufacturing. Education: Electrical Engineering Diploma, National Technical University of Athens (1980) M.S. Electrical and Computer Engineering, Carnegie Mellon University (1981) Ph.D. Electrical and Computer Engineering, Carnegie Mellon University (1985) Research Interests: His work combines statistical methodologies with advanced manufacturing techniques. Key areas include process control systems , sensors for real-time monitoring , and automated diagnostics in semiconductor fabrication. He pioneered innovations in wafer-level sensor arrays and thermal management solutions for plasma etch processes. Awards: IEEE Fellow (2000) Building and Environment Best Paper Award (2018) Distinguished Berkeley Faculty Mentor (2016) Grants & Labs: Directs research at the Berkeley Microfabrication Laboratory and collaborates with the Berkeley Power and Energy Center. His work is supported by grants focusing on semiconductor process modeling and energy-efficient manufacturing systems. Labs/Teams: Associated with the Integrated Modeling Process and Computation for Technology (IMPACT) initiative and CITRIS People and Robots (CPAR) collaborative projects.
Paillisse Vilanova Jordi is a researcher at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture within the College of Engineering. He is actively involved in the JPV Research Group CBA - Broadband Communication Systems and Architectures and the IDEAI-UPC - Intelligent Data Science and Artificial Intelligence Research Group. Department: Department of Computer Architecture Research Groups: JPV CBA, IDEAI-UPC Email: jordi.paillisse@upc.edu ORCID: 0000-0001-7733-9713 His research interests span artificial intelligence, data science, broadband communication systems, and computer architecture. He focuses on intelligent data processing, network design, and high-performance computing systems, contributing to both theoretical and applied advancements in engineering and computer science. The recent publications and projects (2017–2024) reflect a strong trend in AI-driven systems, communication architectures, and technical innovation. His work integrates machine learning with hardware systems, advances in network efficiency, and competitive R&D initiatives, indicating a multidisciplinary approach to modern computing challenges. Scientific recognition includes a formal award or recognition ( Premi o reconeixement ). This highlights his contributions to research excellence. Premi o reconeixement He has participated in competitive R&D projects and has advised or contributed to doctoral research, as evidenced by a listed doctoral thesis. While specific students are not named, his involvement in high-level research suggests mentorship and collaborative academic leadership. His work is centered within the JPV CBA and IDEAI-UPC research groups, which focus on broadband communication systems and intelligent data science, respectively. These labs drive innovation in network architectures and AI applications, positioning him at the forefront of technological research at UPC.
Shambhu J. Upadhyaya is a Professor in the Department of Computer Science and Engineering at the University at Buffalo, SUNY . He also serves as Director of the SEAS/SOM Cybersecurity MS Program and the Center of Excellence in Information Systems Assurance Research and Education (CEISARE) , recognized by the NSA/DHS as a Center of Excellence. His research spans information assurance , computer security , behavioral biometrics , and fault-tolerant computing . Ph.D., Electrical & Computer Engineering, University of Newcastle, Australia (1987) M.E./B.E., Electrical Engineering, Indian Institute of Science, Bangalore (1982/1979) His research projects focus on insider threat assessment , continuous authentication , deception techniques , secure wireless communications , and game-theoretic security models . He has directed 300+ publications and mentored Ph.D./M.S. students like A. Sanzgiri , R. Mehresh , and M. Jadliwala , many of whom hold prominent roles in tech companies. Key scientific recognitions include: IEEE Fellow IEEE Region 1 Technological Innovation Award (2018) SUNY Chancellor's Award for Scholarship (2019) Best Poster at IEEE BTAS Conference (2016) IBM Faculty Partnership Fellowship (2000-01) He has taught courses like CSE566 Wireless Networks Security , CSE341 Computer Organization , and CSE552 VLSI Testing , while leading departmental initiatives such as ABET accreditation and internship coordination. His Electronic Test and Design Automation Lab was sponsored by IBM and supported research on VLSI testing.
Selahattin Sayil is a Professor at the Philip M. Drayer Department of Electrical and Computer Engineering at Lamar University. His research focuses on radiation effects in integrated circuits, low power design, crosstalk noise mitigation, and contactless VLSI testing. He earned his Ph.D. in Electrical and Computer Engineering from Vanderbilt University, M.Sc. from Pennsylvania State University, and B.Sc. in Electronics Education from Gazi University, Turkey. His research explores soft error mechanisms in nanoscale CMOS, thermal-aware radiation hardening , and asynchronous circuit design for robustness in harsh environments. Funded by NSF and NASA, he developed online engineering labs and Hardware-in-Homework concepts to enhance student learning. Scientific awards include the Distinguished Faculty Teaching Fellow, Lamar University (2018-2021) . He has mentored over 35 master's theses and 3 doctoral students, with many advisees pursuing careers at Intel, NVIDIA, and academia. He serves as Graduate Advisor for the ECE Program and has held editorial roles for the International Journal of Electronics and IEEE Potentials .
Adit Singh is the Godbold Endowed Chair Professor in the Department of Electrical and Computer Engineering at Auburn University's College of Engineering. He holds a Ph.D. and M.S. in Electrical Engineering from Virginia Tech and a B.S. (B.Tech.) from IIT Kanpur. He previously served on the faculty at the University of Massachusetts and Virginia Tech, and has held visiting professorships at the University of Freiburg (2012), University of Tokyo (2018), and is scheduled to be a Guest Professor at the University of Stuttgart in Fall 2025. His research centers on VLSI design, integrated circuit testing, reliability, and design for testability. He is renowned for pioneering statistical and adaptive testing methods in semiconductor validation. His work spans digital systems, computer architecture, and electronic design automation (EDA), with strong industrial impact through licensed patents and consulting for major semiconductor and EDA firms. Professor Singh has authored over 300 research papers and holds international patents. He has led numerous IEEE conferences as General or Program Chair and served on editorial boards, including IEEE Design and Test. He chaired the IEEE Test Technology Technical Council (2007–2011) and was on the Board of Governors of the IEEE Council on Design Automation (2011–2015). His scientific honors include IEEE Life Fellowship, IEEE Computer Society Golden Core Membership, and the 2021 Auburn University Award for Excellence in Faculty Outreach. He actively mentors students and collaborates globally, with ongoing research projects in resilient computing and transistor-level reliability. Ph.D., Electrical Engineering, Virginia Tech M.S., Electrical Engineering, Virginia Tech B.S. (B.Tech.), Electrical Engineering, Indian Institute of Technology-Kanpur Scientific Awards: IEEE Life Fellow Golden Core Member, IEEE Computer Society Auburn University 2021 Award for Excellence in Faculty Outreach Professor Singh has led major research initiatives, including one of only five resilient computing projects funded by the Open Compute Project. His work bridges academia and industry, serving as an expert witness in patent litigation and advising semiconductor leaders worldwide. He leads a dynamic research group at Auburn focused on next-generation VLSI test methodologies.
Adit D. Singh is a Professor and the Godbold Endowed Chair in the Department of Electrical and Computer Engineering at Auburn University's College of Engineering. He has previously served on the faculty at the University of Massachusetts, Amherst, and Virginia Tech, and has held visiting professorships at the University of Freiburg (2012), the University of Tokyo (2018), and will be a Guest Professor at the University of Stuttgart in Fall 2025. His educational background includes a B.Tech. from IIT Kanpur and M.S. and Ph.D. degrees from Virginia Tech, all in Electrical Engineering. Dr. Singh's research focuses on VLSI technology, particularly integrated circuit test, reliability, design for testability, and statistical and adaptive testing methodologies. His work bridges theoretical innovation and industrial application, with over 300 research papers and licensed international patents. His expertise has been recognized through extensive service in leadership roles in IEEE conferences and technical councils. The trends in his research, reflected across his publications, emphasize robust testing frameworks for digital systems, reliability enhancement in nanoscale circuits, and the development of adaptive and statistical test solutions for modern semiconductor devices. His work intersects computer architecture, electronic design automation (EDA), and fault tolerance in digital systems. IEEE Fellow (2002) IEEE Life Fellow Golden Core Member, IEEE Computer Society Godbold Endowed Chair Professor Dr. Singh has been actively involved in academic leadership and professional service, having served as General Chair, Co-Chair, and Program Chair for numerous international VLSI design and test conferences. He has served two elected terms as Chair of the IEEE Test Technology Technical Council (2007–2011) and on the Board of Governors of the IEEE Council on Design Automation (2011–2015). He has also served on the editorial boards of journals including IEEE Design and Test and on steering committees of major IEEE conferences. As a consultant, he has advised major semiconductor, test, and EDA companies and served as an expert witness in patent litigation cases, demonstrating strong industry engagement. He is associated with research initiatives in integrated circuit testing and reliability at Auburn University, where his lab focuses on developing advanced transistor testing methods and design-for-test solutions. His team contributes to improving the reliability and yield of modern integrated circuits, with ongoing projects likely supported through industry collaboration and federal funding, though specific grants are not listed.
