Frank Kagan Gürkaynak is Director of the Microelectronics Design Center (DZ) and a Researcher at ETH Zurich's Department of Information Technology and Electrical Engineering (D-ITET). He leads the PULP open-source hardware project and works closely with Prof. Luca Benini in the Integrated Systems Laboratory (IIS). His academic journey includes BSc/MSc from Istanbul Technical University and a PhD from ETH Zurich. Roles: Microelectronics Design Center Director, Senior Scientist in IIS, VLSI course lecturer Research focuses on energy-efficient digital circuits, cryptographic hardware security, and open-source processor architectures. Key projects include EU-funded initiatives like European Processor Initiative (EPI), Convolve, and NeuroSoC, along with SNSF grants Tiny Trainer and PEDESITE. Active in teaching VLSI design, embedded systems, and essential engineering skills. Publications emphasize secure cryptographic accelerators, low-power processor clusters, and GALS system design methodologies. Contributions include energy-efficient ASICs for IoT to HPC domains and pioneering work in side-channel attack-resistant hardware.
George Tsiatouchas is a Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He has held leadership roles, including Chair of the department from 2018 to 2022. His research focuses on Microarchitecture, VLSI Systems, and Integrated Circuit Design. He has authored over 130 publications and holds two patents. Education: B.Sc. in Physics (1990), National and Kapodistrian University of Athens M.Sc. in Informatics and Telecommunications (1993), University of Athens Ph.D. in Informatics and Telecommunications (1999), University of Athens Professional Experience: Director of R&D programs at Integrated Systems Development SA (1998–2002) Adjunct Lecturer at University of Patras (1999–2000) His research interests emphasize analog/digital VLSI circuits and computer architecture. He has earned prestigious awards at IEEE conferences and is a Senior Member of IEEE, EDAA, and the IEEE Test Technology Technical Council. Awards: Best Paper at ISQED (2002) Best Paper at DDECS (2009) He leads the VLSI Systems and Computer Architecture Laboratory (VCAS) and participates in the Artemis Program for supply chain traceability. His lab focuses on secure hardware design and low-power electronics.
Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits. Education: Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995) PhD in Computer Science, University of Manchester (2002) Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems. Awards: None explicitly mentioned. Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.
Dr. Kris Seunarine is a Research Fellow in the Department of Materials Science and Engineering at Swansea University, Faculty of Science and Engineering. He contributes to the GENERATION project, focusing on sustainable, self-powered interactive technologies. With a PhD in Semiconductor Technology from the University of Edinburgh and over 25 years of experience in both industry and academia, his work spans electronics, photonics, and human-computer interaction. His research interests lie at the intersection of Materials Science , Energy Harvesting , and Human-Centered Design . He explores how novel materials—especially printed and photovoltaic materials—can power and enhance interactive systems. His expertise includes VLSI design, bioelectronics, carbon composites, and signal integrity, with a recent emphasis on sustainable IoT and smart surfaces. His recent publications, presented at leading venues like CHI and NordiCHI , demonstrate a trend toward community-driven design , energy-autonomous interfaces , and real-world performance of perovskite solar cells . These works highlight applications in aging populations, slum communities, and ambient-powered communication displays. Dr. Seunarine is available for postgraduate supervision and actively contributes to interdisciplinary research. His scientific contributions are reflected in impactful work on self-powered IoT, though no specific awards or fellowships are listed. He advises on or leads projects involving energy-harvesting materials and has collaborated widely across engineering and HCI domains. His work is supported through research grants associated with the GENERATION project, though specific funding sources are not detailed. He is affiliated with research teams focused on sustainable digital materials and human-centered innovation. He maintains a presence on Google Scholar and ResearchGate , and is based in the Engineering East Building at Bay Campus, Swansea University.
Nima Kolahimahmoudi is a Ph.D. student in Computer and Systems Engineering at the Polytechnic of Turin, currently in his 38th cycle (2022-2025). He is affiliated with the Department of Control and Computer Engineering (DAUIN) and serves as an external lecturer and teaching assistant. His research is supervised by Professor Paolo Bernardi and Richard Cantoro. Education: Master’s in Electronic Engineering (2022) from Polytechnic of Turin Research Group: CAD - Electronic CAD & Reliability Group (DAUIN) His research focuses on functional safety techniques for automotive-oriented Systems-on-Chip (SoCs), particularly targeting analog and mixed-signal circuits, embedded memories, and reliability testing. He has contributed to advancements in low-area ADC design, irradiation-based memory parameter extraction, and automated self-test methodologies for fault coverage improvement. Recent publications highlight trends in automotive electronics reliability, including analog/mixed-signal circuit design, SoC measurement systems, irradiation testing, and fault coverage optimization. These works span conferences like IEEE DTTIS, VLSI-SoC, and IEEE European Test Symposium. Nima collaborates in teaching the 2024/25 1st-level degree course in Computer Sciences at Polytechnic of Turin, specifically for Automotive Engineering. His academic work emphasizes test automation, memory reliability, and functional safety frameworks for automotive systems.
Chris Kim serves as a Professor in the Department of Electrical and Computer Engineering at the University of Minnesota's College of Science and Engineering. He holds the prestigious McKnight Presidential Endowed Chair and was named a Distinguished McKnight University Professor in 2022, one of the highest honors at the university. His research focuses on designing energy-efficient, robust, and intelligent integrated circuits and systems with expertise in building chips and collaborating across materials, devices, algorithms, systems, and signal processing. Professor Kim's research interests span quantum-inspired computing, cryogenic computing, machine learning hardware, neuromorphic computing, hardware security, internet-of-things, medical devices, sensor networks, and radiation hardened chips. His group has transferred key technologies to the semiconductor industry, including silicon odometer circuits for measuring circuit wear out, radiation monitoring circuits, and SPICE models for magnetic tunnel junctions. Analysis of Professor Kim's recent publications reveals a strong trend toward quantum-inspired computing and combinatorial optimization using coupled oscillator-based Ising chips. His work bridges theoretical computer science with practical circuit implementation, with significant contributions in electromigration characterization, aging sensors, and compute-in-memory architectures. The research demonstrates a clear trajectory from fundamental circuit design to application-specific implementations for real-world problems. Intel Outstanding Researcher Award (2024) for contributions to coupled oscillator based Ising chip research Semiconductor Research Corporation (SRC) Sustainable Future award (2024) for quantum-inspired computing chips McKnight Presidential Endowed Chair (2024) Distinguished McKnight University Professor (2022) Louis John Schnell Professor in Electrical and Computer Engineering (2021) Professor Kim actively mentors numerous Ph.D. and Master's students, with over 50 graduates who now work at leading technology companies including Intel, Apple, Samsung, and NVIDIA. His research is supported by significant grants from the National Science Foundation, Semiconductor Research Corporation, Samsung Electronics, and the Department of Defense. Current projects include electromigration lifetime characterization, energy-efficient circuits for cryogenic operation, characterization of single event effects in DRAM chips, and development of CMOS oscillator-based Ising computers. The VLSI Research Group at the University of Minnesota, led by Professor Kim, focuses on developing core circuit technologies for smart and energy-efficient integrated systems. The group has produced notable achievements including a 48-spin all-to-all connected Ising solver chip published in Nature Electronics (featured on the cover), and a quantum-inspired Ising chip with nearly 2,000 coupled ring oscillators. The group maintains strong industry connections and has transferred multiple technologies to semiconductor companies.
Erik Jan Marinissen serves as Scientific Director at imec (Leuven, Belgium) and holds a Visiting Researcher position at Eindhoven University of Technology's Department of Electronic Systems. With over 270 publications and 18 patent families, his career spans NXP Semiconductors, Philips Research, and imec since 1992. He holds MSc and PDEng degrees from Eindhoven University of Technology (1990, 1992). His research focuses on semiconductor test engineering for advanced technologies, particularly 3D-stacked ICs , chiplet-based packages , and sub-5nm CMOS nodes . Key contributions include diagnostic frameworks for Network-on-Chips, test standards for TSV-based integration, and cell-aware testing methodologies. His work bridges industrial applications (NXP, Philips) and academic research through imec's ecosystem. Marinissen's publication trends show increasing focus on heterogeneous integration (2018-2024), with 60% of recent articles addressing chiplet interconnect testing and 3D IC validation. His 2023-2024 work pioneers device-aware testing for quantum components and 3nm technology nodes. Most Significant Paper Awards at IEEE ITC (2008, 2010) Best Paper Awards at IWLPC (2018), LATS (2019), DATE (2020) IEEE Standards Association Emerging Technology Award (2017) HiPEAC Tech Transfer Award (2015) IEEE Fellow (2011) As founder of the 3D-TEST workshop series and IEEE Std P1838 Working Group, he has secured industry-wide adoption of test standards. His supervision of 43 MSc/PhD students demonstrates strong academic mentorship, while his editorial roles at IEEE Design & Test and Springer's Journal of Electronic Testing shape research dissemination. Current work at imec focuses on test solutions for STT-MRAMs and silicon photonics.
Professor Otmane Ait Mohamed is a faculty member at the Department of Electrical and Computer Engineering, Concordia University. His research focuses on formal methods, hardware verification, model checking, and radiation effects on digital circuits. Education: Ph.D., University Henri Poincaré Nancy I (1996) Research Interests: Hardware specification and verification Formal methods for system-level modeling VLSI design automation Radiation effects on FPGA and digital circuits Quantitative analysis of cyber-physical systems Publication Trends: His work spans formal verification of hardware/software systems, radiation-induced faults in aerospace applications, model checking techniques, and abstraction frameworks for SysML/UML diagrams. He has contributed to journals and conferences like IEEE Transactions on Nuclear Science, Expert Systems with Applications, and IEEE International Symposium on Circuits and Systems. Scientific Recognition: Best Paper Award at NEWCAS-2010 Teaching: He teaches courses in Digital Design (COEN313), Computer Architecture (COEN316), and Functional Hardware Verification (COEN413/COEN6541).
Charlotte Frenkel is a Tenure-Track Assistant Professor in the Microelectronics Department at Delft University of Technology (TU Delft), where she leads research in neuromorphic engineering and low-power AI hardware. Her work bridges the gap between biological intelligence and artificial neural networks, focusing on energy-efficient computing at the edge. Dr. Frenkel's research spans digital and mixed-signal IC design, computer architecture, learning algorithms, and neuroscience. She directs the Cognitive Sensor Nodes and Systems (CogSys) lab, which develops neuromorphic processors like ODIN, MorphIC, SPOON, and ReckOn that demonstrate competitive advantages over conventional neural network accelerators. Her publications reveal a strong focus on spiking neural networks, event-based processing, and on-chip learning. Key trends include developing hardware that leverages sparsity for energy efficiency, creating bio-inspired learning algorithms that solve weight transport and update locking problems, and establishing frameworks for benchmarking neuromorphic systems through initiatives like NeuroBench. Scientific Awards: IBM Innovation Award 2021 Nokia Bell Labs Scientific Award 2021 IEEE ISCAS 2020 Best Paper Award NEUROTECH/NICE Best Early Researcher Presentation 2021 AiNed Fellowship Grant Dr. Frenkel is actively expanding her research group through PhD and postdoc positions. She serves as Associate Editor for IEEE Transactions on Biomedical Circuits and Systems and Frontiers in Neuroscience, and has held numerous leadership roles in conference organization including Program Chair for tinyML Research Symposium 2024 and Neuro-Inspired Computational Elements conference 2023-2024. Her service includes extensive reviewing activities for top IEEE journals and conferences in her field.
Donatella Sciuto is a Full Professor in Computer Engineering at the Department of Electronics and Information of Politecnico di Milano, where she conducts research in System Architectures. She serves as Deputy Director of Education at CEFRIEL, managing executive company education training programs. Her academic career spans multiple leadership roles in professional organizations including the Council of EDA (CEDA) where she served as VP of Finance (2008-2009) and is currently President Elect. Her research focuses on embedded systems design methodologies, with particular expertise in Multiprocessor System on Chip, reconfigurable systems, hardware/software co-design, and design space exploration techniques. She leads the Embedded Systems Design and Design Methodologies research group (sagroup.elet.polimi.it) and has contributed significantly to the field of Electronic Design Automation. Her publication record shows a consistent focus on reconfigurable computing and MPSoC design, with recent work emphasizing dynamic reconfiguration techniques, hardware/software synchronization in multiprocessor systems, and optimization algorithms for heterogeneous architectures. Her research demonstrates a progression from foundational work in embedded systems to more complex system-level design methodologies for modern reconfigurable architectures. She has held editorial positions with prestigious journals including IEEE Transactions on Computers, Journal of Design Automation of Embedded Systems, and IEEE Embedded Systems Letters. She has served on program committees for major conferences including DAC, ICCAD, DATE, and CODES+ISSS, and has held leadership roles including Publications Chair for IEEE/ACM ESWEEK 2007 and Co-General Chair of ESWEEK 2009. Prof. Sciuto has advised more than 10 PhD students and currently mentors 4 PhD candidates at Politecnico di Milano. She teaches courses in Computer Architecture, Operating Systems, and High Performance Processors and Systems. She has published 5 teaching books in Italian across multiple editions and maintains active research collaborations through European and national research projects she coordinates.
Dr. A. Yousefzadeh is an Assistant Professor in Edge AI at the University of Twente (joined February 2024), affiliated with the Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS) within the Department of Computer Architecture Design and Test for Embedded Systems. He holds a Ph.D. in Neuromorphic Engineering from IMSE (Instituto de Microelectrónica de Sevilla), where his thesis focused on bio-inspired vision processing. His research specializes in neuromorphic computing systems, with emphasis on: Designing ultra-low-power AI processors and event-based vision systems Developing hardware accelerators for spiking neural networks (SNNs) Edge AI deployment for sensor-based applications Hardware-software co-design for energy-efficient computing His publication trends (2015-2025) reveal core foci on neuromorphic processor architectures (e.g., SENECA, NeuronFlow), event-based vision processing, hardware-aware neural network optimization, and 3D integration techniques. Recent work explores activation sparsification in transformers and hybrid analog-digital neuromorphic systems. Prior to academia, he contributed to industry neuromorphic projects: Architected the NeuronFlow processor at GrAI Matter Labs (acquired by Snap) Led SENECA processor development at imec's Hardware Efficient AI group He currently leads research on next-generation edge AI processors at UT's Embedded Systems lab.
Leyla Nazhandali is a Professor in the Bradley Department of Electrical and Computer Engineering at Virginia Tech. Her research focuses on low-power computing, hardware security, and VLSI design with applications in embedded systems and cybersecurity. She has advised over 13 PhD and Master’s students, many of whom now work in leading tech companies like Intel, Samsung, and NVIDIA. Her work has been supported by NSF, SRC, NIST, and other agencies. Education: B.S. from Sharif University of Technology (2000), M.S./Ph.D. from the University of Michigan (2002/2006). She is a recipient of the NSF CAREER Award (2008) and the Bradley Faculty Fellow of Education (2024). Her teaching emphasizes cognitive disruptive techniques and threshold concepts in introductory courses, contributing to inclusive STEM education reforms. Research Interests: Low-power architectures, secure hardware design, and embedded systems for environmental monitoring. Notable projects include micro gas chromatography systems for hazardous air pollutant detection and fault-resistant cryptographic hardware. She co-leads initiatives integrating MEMS-based power-gating techniques for energy efficiency. Key Awards: 2025: W.S. 'Pete' White Innovation in Engineering Education Award 2024: Bradley Faculty Fellow of Education 2008: NSF CAREER Award 2008: IEEE Real World Engineering Project Contest Winner Outreach: Leads initiatives like the CEED Imagination Camp (middle school outreach) and Women in Computing Day, aiming to diversify STEM participation. Served as a NASA INSPIRE session chair and advisor for IEEE Women in Engineering programs. Grants & Labs: Active projects include NSF-funded work on fault-aware microprocessor extensions and NIST-supported cryptographic hardware evaluations. Her lab collaborates on implantable medical devices and secure embedded systems through Virginia Tech's ICTAS grants.
David Z. Pan is a Professor at the University of Texas at Austin, where he leads a prominent research group specializing in Electronic Design Automation (EDA) and Computer-Aided Design for Integrated Circuits. His extensive publication record spanning from 1997 to the present demonstrates his leadership in advancing the field of electronic design. Dr. Pan's research focuses on solving fundamental challenges in analog/mixed-signal circuit design automation, physical design methodologies, and the integration of machine learning techniques with traditional EDA problems. His work bridges theoretical advances with practical applications in semiconductor design, with particular emphasis on photonic computing, quantum circuit design, and FPGA optimization. His research has evolved from traditional layout and placement algorithms to incorporate cutting-edge AI and machine learning approaches for next-generation design automation. Analysis of his recent publications reveals a strong trend toward integrating artificial intelligence with EDA, including the use of large language models for circuit design automation, reinforcement learning for placement optimization, and deep learning for various aspects of the design flow. His work consistently addresses critical industry challenges while pushing the boundaries of what's possible in electronic design. Dr. Pan has advised numerous graduate students who have become significant contributors to the field, with many continuing their research careers in academia and industry. His research group has developed several influential tools and methodologies that have been adopted by both academic and industrial researchers. He actively contributes to major conferences in the field including ICCAD, DAC, ASP-DAC, and ISPD, often presenting invited talks that shape the future direction of EDA research. His work on open-source EDA tools has been particularly impactful, promoting accessibility and reproducibility in electronic design research.
Konstantinos Efstathiou is a Professor at the Department of Informatics and Computer Engineering, University of West Attica, Greece. He holds a PhD in Computer Science from the University of Thessaloniki, an MSc in Electronic Engineering, and a Bachelor's in Physics, both from the University of Athens. Previously, he worked as a professor at the Technological and Educational Institute of Athens and held engineering roles at the Hellenic Air Force Research Center, Greek Government's Informatics Development Department, and Hellenic Telecommunication Organization's Data Communication Department. Education: Bachelor's Degree in Physics, University of Athens MSc in Electronic Engineering, University of Athens PhD in Computer Science, University of Thessaloniki Research Interests: Focus on Computer Architecture, Computer Arithmetic, VLSI System Design and Testing, Nanotechnologies, and Telecommunication Systems. He owns an International Patent and has authored numerous articles in international journals and conferences. Professional Activities: Serves as an invited reviewer for international conferences/journals and a member of program committees for international conferences.
Shubham Yadav is a Researcher specializing in Integrated Circuit Design with significant contributions to hardware implementation and low-power electronics. His work appears in top-tier IEEE publications, demonstrating expertise in CMOS technology and energy-efficient circuit design. His research program centers on Integrated Circuit Design with emphasis on Low-Power Electronics and Hardware Implementation . Key focus areas include energy-delay product (EDP) optimization for standard cells, voice activity detection systems, and super-threshold CMOS operation. Yadav bridges theoretical circuit design with practical silicon validation, particularly in 65nm LP CMOS processes where he develops toolchain-compatible solutions for real-world applications. Analysis of his 2023-2025 publications reveals a cohesive research trajectory in energy-efficient integrated circuits. His works systematically address EDP reduction through novel standard cell architectures while expanding into voice activity detection hardware. The progression shows increasing sophistication from conference-level explorations to journal-validated silicon implementations, establishing him as an emerging contributor in low-power VLSI design and real-time signal processing hardware.