Hans-Joachim WunderlichView profile
Professor
Prof. Hans-Joachim Wunderlich is a Professor at the University of Stuttgart's Institute of Computer Architecture and Computer Engineering, within the Faculty of Computer Science, Electrical Engineering, and Information Technology. His research focuses on hardware reliability, fault tolerance, and testing methodologies for VLSI circuits and embedded systems. He specializes in areas such as delay fault testing under PVT variability, approximate communication, and aging-aware design. Key research interests include robust testing techniques for small delay faults, error-tolerant communication protocols (e.g., RAPPER and Gray code-based approaches), and GPU-accelerated simulation of faults. His work addresses challenges in functional safety, interconnect reliability, and securing reconfigurable architectures against security violations. He explores energy-efficient iterative solvers for approximate computing environments and develops methods for predicting device aging and early life failures. Prof. Wunderlich’s contributions span academic and industrial applications, with a focus on real-time systems and dependable multi-processor systems-on-chip (MPSoCs). His research integrates formal verification, machine learning for defect detection, and hybrid protection schemes for reconfigurable scan networks. Recent work emphasizes stress-aware testing strategies and optimization of sensor data streaming in resource-constrained environments.
