Find Academic Supervisors

Nooshin NosratiView profile

Research Fellow

• Hardware Design and Modeling
• Computer Architecture
• Embedded Systems Reliability
• +4 more

Nooshin Nosrati is a Digital Futures Postdoctoral Fellow at KTH Royal Institute of Technology, where she leads the "Lego Inspired accessible and automated design framework for demanding Edge AI Systems" project (21 August 2024 – 31 May 2026). Her research focuses on developing the SiLago framework, a modular ASIC design automation tool achieving 10X-100X energy efficiency gains over GPUs/FPGAs. The project bridges system-level implementation with application synthesis for industrial Edge AI applications. She completed her Ph.D. in Digital Electronic Systems at the University of Tehran, with a thesis on hybrid reliability provisions in embedded systems . Her expertise includes hardware modeling, VLSI, and system architecture design. Supervisors: Main Supervisor: Ahmed Hemani (Full Professor, Department of Electrical Engineering, KTH) Co-Supervisor: Artur Podobas (Associate Professor, Division of SCS, School of EECS, KTH) Project Context: Funded by KTH's Digital Futures initiative, the work aligns with societal goals in digitalized industry and cooperative research. The SiLago framework integrates computation, storage, and interconnect requirements to streamline ASIC design from application-level concepts to manufacturable silicon.

Rickard EwetzView profile

Associate Professor

• In-Memory Computing
• Hardware Security
• Machine Learning
• +2 more

Rickard Ewetz is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Florida. His research develops novel computing paradigms including in-memory processing and hardware accelerators for AI applications. Research focuses on: Nanoscale crossbar architectures for energy-efficient computation Robust deep learning hardware resistant to adversarial attacks Formal verification methods for emerging computing systems Quantum circuit synthesis and optimization Honors include multiple Best Paper nominations at premier conferences and the 2024 Research Incentive Award. His group collaborates with industry partners to bridge theoretical innovations with practical hardware implementations.

Syed Rafay HasanView profile

Professor

• Hardware Security
• Deep Learning
• Internet of Things
• +4 more

Syed Rafay Hasan is a Professor in the Department of Electrical and Computer Engineering at Tennessee Tech University , Cookeville, TN. He holds a Ph.D. in Electrical Engineering (2009) and M.Eng. (2002) from Concordia University, Montreal, Canada, and a B.Eng. (1997) from NED University, Karachi, Pakistan. Research Focus: Hardware Security , Deep Learning , Internet of Things , Edge Intelligence , and Digital VLSI Design Current Projects: Center for Agile and Intelligent Power Systems (CAIPS) cybersecurity research (subcontractor role with Florida International University, $160,000 budget) Key Contributions: 15+ years of continuous NSF REU Site leadership (2016–2019, renewed 2018) for cybersecurity-focused undergraduate research His recent work examines edge computing vulnerabilities , including adversarial attacks on CNN inference ( StAIn , 2023), hardware intrinsic attacks ( SoWaF , 2021), and runtime Trojan detection ( MacLeR , 2020). Publications span hardware security in 3D ICs, formal verification techniques, and FPGA-based neural network implementations. Scientific Recognition : Best Paper Award (Honorable Mention) in Multimedia Systems and Applications at VTC-2024 Research Trends : 15 most recent articles (2021–2025) analyze edge intelligence security (60%), collaborative CNN models (45%), and hardware Trojan detection (35%) using machine learning and formal verification Students under his supervision have secured positions at Intel , Georgia Tech Research Institute , and Whirlpool Inc . He teaches core courses in computer design (ECE 4120/5120, 11 years), Digital VLSI (ECE 4130, 10 years), and deep learning implementation (ECE 6900). Collaborations include institutions in Canada, UAE, Pakistan, and industry partners like Intel and Air Force Research Lab .

• Electronics Education
• Computer Simulation
• Digital Circuits
• +2 more

Julio Ricardo Garcia is a Professor in the Technology department at San José State University. With a PhD from the University of Northern Iowa (1988), he has established expertise in electronics education, industrial technology, and computer simulation applications. His work bridges theoretical concepts with practical industrial applications. Education: Doctor of Philosophy, University of Northern Iowa (1988) Research Focus: Investigates innovative approaches to technology education, particularly in electronics and digital systems. His scholarship emphasizes practical laboratory methodologies, distance learning frameworks, and curriculum development for industrial technology programs. Research extends to computer simulation applications in physics and electronics education. Publications Focus: Garcia's extensive publication record centers on educational methodologies in technology fields. Recent works demonstrate consistent focus on circuit design pedagogy, simulation tools, and international technology education. Articles frequently address practical implementation challenges in academic and industrial training contexts. Professional Service: Contributed as a translator (English/Spanish) for electronics communications and quality control documentation (2004).

Christopher AnandView profile

Associate Professor

• Computer Science Education
• Programming Languages
• Domain-Specific Languages
• +8 more

Dr. Christopher Anand is an Associate Professor in the Department of Computing and Software and the McMaster School of Biomedical Engineering at McMaster University. He holds roles as Graduate Advisor for the MEng in Computing and Software and is a Fellow of IBM Canada Advanced Studies. His research spans computer science education, programming languages, compilers, and high-performance computation, with collaborations at IBM and global educational initiatives. Education: PhD in Differential Geometry. He focuses on making computing education accessible globally through projects like McMaster Start Coding and the Fondation STaBL, emphasizing design thinking and innovation. His work bridges academia and industry, addressing challenges in medical imaging, scanning electron microscopy, and educational technology. Research Interests: Includes scientific computing, optimization, and the application of design thinking in education and innovation. Notable achievements include the IBM Project of the Year Award (2018) for technology impacting IBM processors. He teaches courses such as Mobile User Interface Design and Model-Based Image Reconstruction, and his outreach efforts engage students from elementary schools to global post-secondary institutions.

• Parallel Computing
• Distributed Systems
• Electronic Design Automation
• +6 more

Lorenzo Cardone is a PhD student (38th cycle, 2022-2025) in Computer and Systems Engineering and serves as an External Lecturer at Politecnico di Torino's Department of Control and Computer Engineering (DAUIN). His academic appointments include: Part-time Teaching Assistant for Operating Systems courses (2023-2026) Research collaboration with the Formal Methods (FM) research group Education background includes: Bachelor's in Computer Science (2019) Master's in Computer Graphics and Multimedia (2021) Research focuses on parallel computing infrastructures, software optimization for complex graph problems, and Electronic Design Automation (EDA) applications. Specific interests span: Parallel/distributed systems architecture Quantum computing implementations Circuit simulation techniques Fault tolerance in digital systems Automotive SoC testing methodologies Recent publications (2024-2025) demonstrate specialization in test program optimization, SoC validation, and heuristic approaches for large-scale circuit analysis, primarily published in IEEE Transactions on Computers and major test engineering conferences. No awards or student advisement mentioned. Research conducted within DAUIN's Formal Methods group under supervisors Stefano Quer and Paolo Bernardi.

Paolo MontuschiView profile

Professor

• Computer Engineering
• Computer Arithmetic
• Computer Architecture
• +10 more

Paolo Montuschi is a Professor of Computer Engineering at Politecnico di Torino, Italy, and former Chair of the Control and Computer Engineering Department (2003–2011). He holds leadership roles in the IEEE, including Editor-in-Chief of the IEEE Transactions on Emerging Topics in Computing (2021–23) and Chair of the IEEE TAB Awards and Recognition Committee (2020–21). His academic career includes a PhD in Computer Engineering (1989) and full professorship since 2000. Research interests span computer arithmetic, computer architecture, graphics, and semantics in education. Notable contributions include work on decimal arithmetic, cryptography, error-tolerant systems, and virtual reality applications. He pioneered the first Italian/European IEEE-HKN chapter (Mu Nu) and received prestigious awards like the IEEE Computer Society Distinguished Service Award. Montuschi has advised notable students including Silvia Vitali (founder of Mu Nu Chapter), Luca Nassi (ARM), and Alessandro Sorniotti (IBM). His service spans over 30 roles in IEEE committees, focusing on publications, awards, and strategic planning. Current activities include advancing emerging computing topics and promoting interdisciplinary research through the GRAINS lab.

Sunil KhatriView profile

Professor

• VLSI Design
• Secure Computing Systems
• Machine Learning Hardware
• +7 more

Sunil Khatri is a Professor in the Department of Electrical and Computer Engineering at Texas A&M University, affiliated with the College of Engineering and the Computer Engineering and Systems Group. He holds a Ph.D. from the University of California, Berkeley (1999), an M.S. from the University of Texas at Austin (1989), and a B.S. from the Indian Institute of Technology Kanpur (1987). His academic progression includes roles as Assistant Professor (2000–2004) at the University of Colorado Boulder and Associate Professor (2010–2015) at Texas A&M. Educational Background: Ph.D., University of California, Berkeley, 1999 M.S., University of Texas at Austin, 1989 B.S., Indian Institute of Technology Kanpur, 1987 Research Interests: Intelligent and Secure Computing Systems: Focused on hardware architectures for machine learning (e.g., neuromorphic circuits, NoCs, sub-threshold circuits) and secure hardware design (blockchain, physically unclonable functions). Logic Synthesis and Applications: Includes VLSI CAD, gene regulatory network modeling, noise-based logic, and Boolean satisfiability (SAT) solvers. Interdisciplinary Extensions: Explores routing table compression, radar signal processors, optical networking (DWDM), and LDPC decoders. Research Trends in Publications: Recent work emphasizes neuromorphic hardware acceleration (e.g., CapsPDNet for insulator discharge prediction, FFIR filters for IoT), secure protocols (multi-factor authentication frameworks), and energy-efficient circuits (flash-based designs, low-voltage regulators). His contributions span VLSI, machine learning, and cybersecurity, often leveraging FPGA/GPU acceleration. Grants & Labs: Leads projects in the Computer Engineering and Systems Group, focusing on secure computing, machine learning hardware, and interdisciplinary VLSI applications. Active in grant-driven research with a focus on practical implementations in industry.

Kurt MehlhornView profile

Adjunct Professor

• Algorithms
• Data Structures
• Computational Geometry
• +7 more

Kurt Mehlhorn is a renowned Adjunct Professor at the Max Planck Institute for Informatics and holds an honorary professorship at Saarland University. He leads the 'Algorithms and Complexity' department at MPI, where he has mentored numerous PhD students and postdocs, many of whom now hold academic positions globally. Education: Not explicitly detailed in the text, but his career has spanned foundational contributions to computer science. Affiliations: Max Planck Institute for Informatics (since its founding), Universität des Saarlandes (honorary), and multiple academic societies. His research focuses on algorithms, data structures, computational geometry, parallel computing, and algorithmic economics. He pioneered projects like LEDA, a foundational library for efficient algorithms and data structures, influencing tools like CGAL and STXXL. His work bridges algorithm correctness and efficiency, impacting fields from genome sequencing to VLSI design. Recent articles emphasize fair division (EFX allocations), market equilibria, and algorithmic game theory, reflecting his enduring influence on theoretical and applied computer science. Awards: Erasmus Medal (2014), Leibniz Prize, Konrad-Zuse Medal, and honorary doctorates from Magdeburg, Waterloo, and Aarhus. Labs/Teams: Leads MPI's Algorithms and Complexity group; collaborates with institutions like DFKI and the Center for IT-Security, Privacy, and Accountability on Saarland's interdisciplinary campus.

Alexios Balatsoukas-StimmingView profile

Assistant Professor

• VLSI Circuits for Communications
• Error-Correction Coding Theory
• Non-Linear Signal Processing
• +3 more

Dr. Alexios Balatsoukas-Stimming is an Assistant Professor in the Electronic Systems group of the Department of Electrical Engineering at Eindhoven University of Technology (TU/e). His research focuses on the intersection of communications, hardware design, and machine learning, with specific interests in VLSI circuits for communications, error-correction coding, non-linear signal processing, and massive MIMO systems. He also explores applications of approximate computing and machine learning in communication signal processing. Education: Dipl.-Ing. (2010) Electronics and Computer Engineering, Technical University of Crete MSc (2012) Electronics and Computer Engineering, Technical University of Crete PhD (2016) Computer and Communications Sciences, École polytechnique fédérale de Lausanne (EPFL) Research Interests: His work emphasizes interdisciplinary approaches to improve communication systems' speed, reliability, and energy efficiency. Key areas include VLSI implementation of coding algorithms, belief propagation decoding, and leveraging machine learning for signal processing tasks. He has contributed to advancements in polar codes, LDPC codes, and full-duplex communication systems. Affiliations: Holds an honorary adjunct assistant professor position at Rice University (USA). Active in conferences and journals as a committee member, founding editor (IEEE journal), and reviewer. Labs/Teams: Associated with the Signal Processing for Communications Lab , Electronic Systems group, Center for Wireless Technology Eindhoven , and the EAISI initiative at TU/e.

Горан Љ. ЂорђевићView profile

Professor

• Computer Networks
• Wireless Communications
• Localization Systems
• +3 more

Goran Lj. Djordjevic is a Professor at the Department of Electronics, Faculty of Electronic Engineering, University of Nis, Serbia. Appointed full professor in 2009 after progressive promotions from assistant professor (1999) to associate professor (2004), he represents a cornerstone of the institution where he completed all academic degrees. His three-decade career exemplifies deep institutional commitment and scholarly excellence in electronic engineering. His academic foundation was built entirely at the University of Nis: Diploma Engineer in Electronics (1989) Master of Science in Electronics (1994) Doctor of Philosophy in Electronics (1998) Professor Djordjevic's research forms three interconnected pillars: Networks-on-Chip (NoC) innovation with breakthroughs in deflection routing and port allocation; UWB localization systems solving multipath challenges in complex indoor environments through multi-algorithm fusion; and error control coding for storage systems with applications in optical media. His work consistently bridges theoretical rigor and practical implementation, evidenced by 22 impact-factor journal publications spanning VLSI design, wireless communications, and parallel computing. Analysis of his publication timeline reveals strategic evolution: recent work (2021-2022) focuses on real-world NoC optimization and robust indoor positioning, mid-career research (2015-2005) established CDMA bus architectures and fault-tolerance frameworks, while foundational contributions (2001, 1996) in constraint coding and task scheduling underpin his later breakthroughs. This trajectory demonstrates exceptional continuity in advancing communication reliability across hardware and software domains. Scientific recognition includes: No formal awards documented in source materials Regarding academic mentorship, while specific students aren't listed, his sustained research output implies active graduate supervision. Project funding shows zero current national grants, though international collaborations remain unspecified. His 22 impact-factor publications across IEEE, Elsevier, and Springer journals demonstrate consistent productivity through completed research initiatives, with recent work indicating ongoing laboratory activity in wireless and NoC domains.

Georg SiglView profile

Professor

• Hardware Security
• Cryptography
• Embedded Systems Security
• +6 more

Prof. Dr.-Ing. Georg Sigl is a Professor of Information Technology Security at the Technical University of Munich (TUM) and Director of the Fraunhofer Institute for Applied and Integrated Security (AISEC). His research focuses on hardware security, including secure embedded systems design and hardware attack analysis. He holds a doctorate in design automation from TUM (1992) and has extensive industry experience at Siemens and Infineon, where he led chip card platform development. Notable achievements include award-winning chip card controllers (SLE88/SLE78) and foundational contributions to tamper-resistant hardware. Education: Doctorate in Design Automation, Technical University of Munich (1992) Diploma in Electrical Engineering, Technical University of Munich Research interests include hardware security, cryptographic implementations, physical unclonable functions (PUFs), post-quantum cryptography, and defense against invasive/side-channel attacks. His work bridges academic research and industrial applications, emphasizing practical security solutions for embedded systems and IoT. Awards: Best Paper Award at IEEE HOST 2018 Sesames Award 2008 (SLE78 chip card) Sesames Award 2001 (SLE88 chip card) Rohde & Schwarz Prize 1993 (Dissertation) Leadership: Founded TUM's Chair of Information Security (2010) Director of Fraunhofer AISEC Labs/Teams: Chair of Information Security at TUM collaborating closely with Fraunhofer AISEC, focusing on advanced security research and industry partnerships.

• Digital Circuits
• VLSI Design
• Signal Processing
• +4 more

Paulo Flores holds the position of Associate Professor at the Department of Electrical and Computer Engineering within the Instituto Superior Técnico of the University of Lisbon. His academic career is deeply rooted in Electronics and Digital Systems, with a focus on VLSI design, FPGA optimization, and hardware acceleration for bioinformatics applications. He has contributed extensively to research in multiplierless constant multiplication algorithms, low-power circuit design, and quaternary logic implementations. Notable achievements include the SAT Competition 2014 and 2013 Bronze Medals for innovative contributions in formal methods and algorithmic efficiency. His teaching responsibilities include advanced courses in digital systems design, electronic engineering projects, and laboratory guidance in topics like operational amplifiers and FIR filters. Flores actively collaborates with research units like INESC-ID and has supervised multiple academic projects in electronic engineering and digital signal processing. Research interests span across circuit testing, embedded systems optimization, and multi-valued logic architectures. His work frequently explores trade-offs between computational efficiency and energy consumption in hardware implementations.

Jens SimonView profile

Professor

• Electrical Engineering
• Computer Engineering
• VLSI design
• +3 more

Prof. Dr. Jens Simon serves as a Professor within the Department of Electrical Engineering and Information Technology at the Technical University of Central Hesse in Gießen, Germany, contributing to the institution's engineering education and research infrastructure through his specialized academic appointment. His research centers on integrated circuit design and VLSI systems , with deep technical expertise in FPGA implementation using VHDL . This work spans critical areas of semiconductor engineering and reconfigurable computing , addressing hardware optimization challenges in modern electronic systems development. Contact Professor Simon via email at jens.simon@ei.thm.de or telephone at +49 641 309-1939. His office is located in Building A21, Room 1.02a at Wiesenstrasse 14, 35390 Gießen, with appointments available by prior arrangement.

• Blockchain
• Data Mining
• Cybersecurity
• +3 more

Азир Алиу serves as a Full Professor in the Faculty of Technical Sciences at South East European University (SEEU) in Tetovo since September 2022, employed on a part-time basis. His role centers on advancing computer science research and education within the university's technical disciplines. His research spans blockchain applications in higher education and real estate, data mining for academic/job market alignment, cybersecurity frameworks, and natural language processing for Albanian language analysis. He pioneers practical implementations of blockchain for institutional management and develops sentiment analysis tools for low-resource languages, bridging theoretical computer science with societal challenges in Southeast Europe. Recent publications (2023-2024) reveal a strong focus on blockchain-driven solutions for research evaluation systems and real estate management, alongside cybersecurity threat analysis. His work consistently targets institutional innovation in North Macedonia, with emerging emphasis on AI-driven curriculum-market alignment and Albanian NLP techniques, demonstrating a trajectory toward locally relevant technological interventions.