Herman Bruyninckx is a Part-Time Full Professor at Eindhoven University of Technology (TU/e) in the Mechanical Engineering department, specifically within the Control Systems Technology group and EAISI High Tech Systems initiative. He also serves as a professor (Hoogleraar) at KU Leuven in Belgium. Academic focus on robotics, control systems, and multi-agent coordination Active research in model predictive control , semantic mapping , and dynamic constraint algorithms Recent publications address industrial automation , agro-food robotics , and haptic technology Research Highlights : Developed hybrid decision-making frameworks for multi-agent navigation Innovated swing-free control methods for robotic pick-and-place operations Formulated constrained dynamics algorithms with LQR-Gauss principle integration Created ExoTen-Glove for haptic feedback in virtual environments Collaborative Projects : Coordinated with researchers like René van de Molengraft , Elena Torta , and Koen de Vos Contributed to NWO/TTW FlexCRAFT project for cognitive robotics in agro-food technology
Prashanth Krishnamurthy is a Research Scientist in the Department of Electrical and Computer Engineering at New York University Tandon School of Engineering. His research focuses on robotics, control systems, and cybersecurity, particularly in cyber-physical systems such as power grids and embedded devices. He holds a Ph.D. in Electrical Engineering from NYU. Key research areas include hardware security (e.g., detecting Trojans in chips), anomaly detection in critical infrastructure, and resilient control strategies for robotic systems. He has led or contributed to projects funded by the U.S. Department of Energy (DOE), Office of Naval Research (ONR), and others, including the Tracking Real-time Anomalies in Power Systems (TRAPS) initiative and hardware Trojan detection using short-term aging phenomena. Education: Ph.D., Electrical Engineering, NYU His work bridges theoretical advancements and practical implementations, such as developing FPGA-based testbeds for hardware security validation and creating AI-driven cybersecurity tools like the CRAKEN LLM agent. Collaborators include institutions like SRI International, Karlsruhe Institute of Technology, and the NYU Center for Cybersecurity. Grants include a $1.94M DOE grant for TRAPS and a $359K DURIP grant for hardware Trojan detection. His technical contributions span control systems, anomaly detection algorithms, and cybersecurity frameworks for embedded systems. He is actively involved in advancing secure cyber-physical systems through innovations in real-time monitoring, robust control mechanisms, and AI-augmented security solutions.
Dr. Andrea Bastoni is a Postdoctoral Researcher and Research Fellow at the Chair of Cyber-Physical Systems in Production Engineering at Technical University of Munich (TUM), Faculty of Mechanical Engineering. He is also the CTO and co-founder of Minerva Systems , developing operating system solutions for AI-ready embedded applications. His expertise spans real-time operating systems, cyber-physical systems, and predictable system design for heterogeneous platforms. His research focuses on enhancing predictability of memory hierarchies in complex SoCs through techniques like memory bandwidth regulation and cache partitioning. This work has industrial applications in safety-critical domains such as avionics and railways, where he contributes to certifiable hypervisors and operating systems. As former Software Architect of the PikeOS hypervisor at SYSGO GmbH (2012-2020), he specialized in DO-178C, IEC 61508, and EN 50128 standards. His academic background includes a Ph.D. in Computer Engineering from the University of Rome Tor Vergata (2007-2011), where he developed LITMUS^RT as part of UNC's Real-Time Systems Group during a visiting researcher period (2009-2010). His publications reflect ongoing work on Multicore Real-Time Scheduling , Mixed-Criticality Task Isolation, and Arm DynamIQ shared unit analysis. He actively participates in program committees for conferences like RTSS, DSN, and DATE.
Dr. John Wickerson is an Associate Professor in the Circuits and Systems group at the Department of Electrical and Electronic Engineering, Imperial College London. His research focuses on improving the reliability of high-performance computing through formal methods, with contributions to high-level synthesis, memory models, and concurrency verification. He holds leadership roles including Course Director for the Electrical and Information Engineering degree and Deputy Tutor for PhD students. Research Interests: Formal Verification of Hardware/Software Systems High-Level Synthesis (HLS) and FPGA Compilation Weak Memory Models and Concurrency Semantics Fuzz Testing for Hardware Tools Compiler Optimization and Correctness Digit Elision and Arbitrary-Precision Arithmetic Notable Achievements: Best Paper Award at EuroSys 2024 (database isolation validation) Pioneered formal methods for HLS tools (e.g., QuteFuzz, C4) Co-developed the C4 C compiler concurrency checker Published over 60 peer-reviewed papers across top venues (ASPLOS, PLDI, FPGA) Lab/Team: Part of the Circuits and Systems group at Imperial College, collaborating with industry partners like Kaihong Yann and ARM.
Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.
Martin Berzins is a Professor of Computer Science at the University of Utah, affiliated with the School of Computing and the Scientific Computing and Imaging (SCI) Institute. His research focuses on parallel scientific computing, numerical methods for partial differential equations, and high-performance computing frameworks. He is a leading developer of the Uintah framework, a scalable simulation tool used for large-scale engineering and scientific problems. Research Interests : Parallel algorithms, adaptive mesh refinement, material point method (MPM), exascale computing, computational fluid dynamics, and performance portability. His work emphasizes scalable software solutions for complex multiscale and multiphysics simulations, with applications in environmental modeling, explosive detonation analysis, and computational mechanics. Recent articles highlight advancements in Uintah's portability to exascale systems, error estimation in MPM, and high-order numerical methods. Berzins has contributed significantly to the development of task-based parallelism strategies and heterogeneous computing optimizations. His research bridges theoretical numerical analysis with practical large-scale computational challenges. Collaborations include DOE projects on hazard analysis and exascale computing. He has pioneered the integration of runtime systems like Hedgehog with Uintah to enhance scalability on modern architectures. His work ensures computational frameworks remain viable for emerging hardware trends, emphasizing both algorithmic innovation and software engineering rigor.
Kimia Zamiri Azar serves as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Central Florida, focusing on hardware security and verification methodologies. Her research bridges theoretical formal methods with practical security implementations in semiconductor design and testing. Her educational background includes: Ph.D. in Electrical and Computer Engineering, George Mason University (2021) Postdoctoral Research, University of Florida Dr. Azar's research spans hardware security with emphasis on system-level verification, VLSI design-for-trust, and advanced IC testing. She pioneers techniques in logic locking, secure heterogeneous integration, and IC supply chain security, developing frameworks for authenticated encryption in Systems-in-Package and runtime security monitoring. Her work integrates formal verification with innovative testing methodologies to address hardware trust challenges across the semiconductor lifecycle. Analysis of her recent publications reveals two dominant trends: (1) Application of large language models (LLMs) to hardware design tasks including high-level synthesis code generation and RTL optimization, and (2) Advancement of secure heterogeneous integration techniques for System-in-Package architectures with focus on counterfeit prevention and split-test security protocols. These directions address critical gaps in hardware trustworthiness amid increasingly complex semiconductor supply chains. Her scientific contributions have earned significant recognition: Best Paper Award at ICCAD 2019 Best Paper Award at ISVLSI 2020 Best Paper Award at ICCAD 2020 Best Paper Award at IEEE DCAS 2020 Best Paper Award at HOST 2022 Best Paper Award at DATE 2023 Dr. Azar secures substantial research funding from premier agencies including NSF, SRC, DARPA, AFRL, DoD (NG), and Microsemi. Her grants support projects spanning hardware security validation frameworks, secure heterogeneous integration, and AI-augmented verification methodologies. She actively mentors students in her research group, guiding publications in top venues like IEEE D&T, IEEE TC, and DAC while fostering industry-academic collaborations. Her work directly impacts semiconductor security standards through patented innovations and open-source verification tools. As an active IEEE and ACM member, she contributes to community advancement through conference organization (HOST, DATE), journal editorial roles, and workshop leadership on hardware security standards. Her research group collaborates with semiconductor industry leaders to translate theoretical security frameworks into practical design-for-trust methodologies for next-generation integrated circuits.
Saikat Dutta is an Assistant Professor in the Department of Computer Science at Cornell University. He is affiliated with the Software Engineering Group and focuses on the intersection of Software Engineering and Machine Learning . His work aims to enhance the reliability of ML-based systems while applying ML techniques to solve software engineering challenges. PhD in Computer Science from University of Illinois Urbana-Champaign (Summer 2023) Postdoctoral Researcher at University of Pennsylvania Bachelor's in Computer Science and Engineering from Jadavpur University Research Interests: Dr. Dutta's research spans several key areas: Automated test generation and debugging for ML/DL libraries Using AI/ML for automated software engineering tasks Improving performance of regression tests in ML libraries Static and dynamic analysis for probabilistic programming Article Trends: His recent publications emphasize: Automated testing of ML systems Security vulnerability detection using LLMs Probabilistic program analysis Neurosymbolic learning frameworks Flaky test management in stochastic environments Stochastic regression test optimization Scientific Awards: Meta AI LLM Evaluation Research Grant (2025) Mavis Future Faculty Fellowship (2022-23) Facebook PhD Fellowship (2020-22) 3M Foundation Fellowship (2019-2020) Advising & Grants: Dr. Dutta actively recruits PhD students and postdocs. He leads research projects supported by grants from Meta AI and participates in program committees for top conferences like ICSE and ISSTA. His lab focuses on neurosymbolic systems and ML-based software verification.
Yan Chen is an Assistant Professor at the Virginia Tech College of Engineering , where he leads the PRIME Lab (Programming with Intelligent Machines & Environments) . His work focuses on creating interactive Human-AI systems to enhance real-time data analysis and programming education, particularly addressing barriers in collaborative learning environments. University of Toronto (Postdoctoral Fellow) University of Michigan (Ph.D., Information Science) University of Colorado, Boulder (BS/MS in Applied Math & Electrical & Computer Engineering) His research bridges Human-Computer Interaction (HCI) and Computer Science Education , with a focus on real-time data analysis , AI-driven programming assistance , and scalable learning tools . He employs LLMs and human-centered design to simplify complex computational processes, enabling data workers to detect critical patterns efficiently. Recent publications highlight trends in generative AI for education , proactive AI programming support , and collaborative analytics . Key themes include real-time classroom insights , intergenerational smartphone learning , and automated feedback systems . Scientific recognition includes: 🏆 Best Paper at L@S 2024 🏅 Best Paper Honorable Mention at CHI 2023 🏅 Best Paper Honorable Mention at UIST 2022 🏆 Best Short Paper at VL/HCC 2020 He mentors a team of PhD and MS students in projects spanning AI-assisted education, web automation, and collaborative coding tools, with active recruitment for future research directions.
Professor Klaus McDonald-Maier is a full Professor in the School of Computer Science and Electronic Engineering (CSEE) at the University of Essex , where he leads the Embedded and Intelligent Systems (EIS) Research Laboratory and heads the Intelligent Embedded Systems and Environments Research Group . He is also Director of Impact , Visiting Professor at the University of Kent, and Visiting Research Affiliate at NASA Jet Propulsion Laboratory, California Institute of Technology. Education PhD in High-Performance Parallel Neural Network Architectures, Friedrich-Schiller-University Jena (Germany, 1999) Electronic Engineering studies, University of Ulm (Germany) Electronic Engineering studies, Cardiff University (Wales) Electronic Engineering studies, École Supérieur de Chimie Physique Électronique de Lyon (CPE-Lyon) (France) Research Interests Professor McDonald-Maier’s research integrates embedded systems , System-on-Chip (SoC) architectures , and AI-driven robotics . He pioneers visual place recognition techniques that remain robust under severe appearance and viewpoint changes, develops cybersecurity frameworks based on ICMetrics for autonomous vehicles and IoT, and designs approximate real-time computing solutions for energy-constrained multicore and FPGA platforms. His work on radiation-tolerant systems supports space and nuclear applications, while his bio-inspired algorithms enable lightweight, neuromorphic perception on resource-limited robots. Publication Trends Between 2022 and 2025 his output converges on FPGA-accelerated AI , secure edge intelligence , visual navigation for autonomous systems , and healthcare analytics . He repeatedly couples rigorous algorithmic innovation with practical hardware deployment, yielding energy-efficient, real-time systems validated in domains ranging from autonomous driving to post-stroke rehabilitation. Scientific Awards & Recognition Best Paper Award – IEEE Transactions on Sustainable Computing (2024) Best Paper Award – IEEE/ACM DATE (2024) Best Paper Award – IEEE Systems Journal (2022) Best Paper Award – IEEE Sensors Journal (2021) Best Paper Award – IEEE Access (2020) Research Grants & Industrial Collaboration He has secured major funding from EPSRC , EU Horizon 2020 , Innovate UK , and industry partners. Current projects span trustworthy autonomy, radiation-hardened edge AI, and AI-enhanced rehabilitation technologies. He is Chief Scientist of UltraSoC Technologies Ltd and CEO of Metrarc Ltd , commercialising University research in semiconductor debug and cybersecurity respectively. Laboratory & Team Leadership As Director of the Embedded and Intelligent Systems Laboratory (EIS Lab) , he oversees a multidisciplinary team of researchers and PhD students, providing state-of-the-art FPGA, robotics, and embedded-systems facilities. The lab collaborates closely with NASA JPL, UK Atomic Energy Authority, and leading semiconductor firms to translate fundamental research into high-impact industrial solutions.
Marc C.W. Geilen is an Associate Professor at the Electronic Systems group , Eindhoven University of Technology. He leads the Model-Based Design Lab and contributes to the CompSOC Lab and High Tech Systems Center . His work focuses on model-based design methods, design automation, and optimization for real-time and embedded systems. Research Keywords: Cyber-Physical Systems, Real-Time Systems, Embedded Systems, Performance Analysis, Design Automation Key Collaborations: EU ECSEL TRANSACT project, SAM-FMS project, Arrowhead Tools initiative His recent publications address weakly-hard timing constraints in server-based systems, hybrid performance modeling for cyber-physical systems, and neural network optimization for communication. Article trends span Real-Time Scheduling , Trustworthy Modeling , Neural Network Efficiency , and Resource Allocation in distributed environments. Scientific Awards : Partial-Order Reduction for Performance Analysis (2018) Teaching activities include courses in Computational Modeling , Embedded Signal Processing , and Discrete Mathematics . He collaborates across projects like TRANSACT, SAM-FMS, and Arrowhead Tools, focusing on flexible manufacturing and cloud-to-edge transitions.
Khanh Nguyen is an Assistant Professor in the Department of Computer Science & Engineering at Texas A&M University, part of the College of Engineering. His research focuses on improving scalability and efficiency in Big Data systems through compiler and runtime innovations, particularly in memory management and distributed computing. Education: Ph.D. in Computer Science, University of California, Los Angeles (2019) M.S. in Computer Science, University of California, Irvine (2015) B.S. in Computer Science, University of California, Irvine (2012) His research interests include programming languages, compiler design, memory management, and Big Data systems. He has developed techniques such as Gerenuk for thin computation over big data, Skyway for distributed heap connectivity, and Yak , a high-performance garbage collector. His work emphasizes resource efficiency and workload scalability, particularly for machine learning and data-parallel applications. Recent publications (2021–2024) highlight advancements in adaptive memory management for warehouse-scale computers, semantics-aware swapping in disaggregated systems, and query-driven distributed tracing. Awards: Google Ph.D. Fellowship (2017) Facebook Ph.D. Fellowship Finalist (2017) His research bridges compiler/runtime systems with large-scale data processing, addressing challenges in distributed systems and far-memory utilization. He collaborates with industry and academic partners to advance practical, scalable solutions for modern data-intensive workloads.
Mateo Valero Cortés is a renowned Professor of Computer Architecture at the Polytechnic University of Catalonia and Director of the Barcelona Supercomputing Center (BSC). He has held academic and leadership roles since 1974, advancing high-performance computing (HPC) and computer architecture research. His work includes pioneering contributions to vector architectures, multithreading, and instruction-level parallelism. Education includes a Telecommunications Engineering degree from the Polytechnic University of Madrid (1974) and a PhD in Telecommunications Engineering from the Polytechnic University of Catalonia (1980). His research spans over 700 publications, focusing on HPC systems, parallel computing, and supercomputing infrastructure. Key research interests include vector processing, super-scalar processors, and task-based programming models. Recent work emphasizes scalable architectures for exascale computing and energy-efficient hardware-software co-design. Notable achievements include the Eckert-Mauchly Prize (highest in computer architecture), Seymour Cray Award, and Charles Babbage Prize. He has led initiatives like the Spanish Supercomputing Network (RES) and PRACE (European HPC partnership). Academic affiliations include the Royal Academy of Engineering of Spain, ACM Fellow, and IEEE Fellow. He has received 13 honorary doctorates and awards such as Mexico’s Order of the Aztec Eagle. Current projects include the Mont-Blanc HPC prototype and ERC-funded research on multi-core chip design. His BSC oversees over 300 researchers and manages MareNostrum supercomputers.
Bradley Schmerl serves as a Principal Systems Scientist in the Software and Societal Systems Department (S3D) within Carnegie Mellon University's School of Computer Science. His research advances software engineering practices for modern challenges in distributed heterogeneous systems, self-adaptation, and cyber-physical integration. He leads the ABLE research group and actively mentors students in the Masters in Software Engineering program while teaching core courses like Software Architecture and Software Engineering Practicum. Dr. Schmerl's work addresses critical challenges in composing continuously evolving software systems, including components from untrusted third parties and on-the-fly recomposition for environmental changes. His research develops reusable, analyzable tools for software composition with emphasis on model-based adaptation, uncertainty management, and cross-language integration. Key projects include Rainbow for runtime architecture reflection, Acme for formal architectural foundations, and Cyber-physical Systems research linking software models with physical dynamics. Analysis of his 2023-2025 publications reveals intensifying focus on robotics software architecture (particularly ROS-based systems), explainable AI for architectural tradeoff analysis, and configuration management in adaptive systems. Trends show growing integration of machine learning for auto-tuning, empirical studies of misconfigurations, and dimensionality reduction techniques for visualizing design spaces—consistently bridging theoretical rigor with practical tool development for real-world applications. Scientific Awards: No specific awards were documented in the source materials. Dr. Schmerl serves as Practice Area Lead and mentor in CMU's Masters in Software Engineering program, guiding client projects including Rainbow UI for self-adaptive framework interfaces, CoBot UI for telepresence robots, and Educational Telepresence Tasking Language development. His research receives support through ABLE group projects funded by grants targeting software architecture foundations, adaptation mechanisms, and cyber-physical system validation. As a core member of the ABLE research group, he directs investigations into architecture-based self-adaptation with active projects spanning Rainbow (runtime architecture models for dynamic adaptation), Acme (formal architectural styles and tools), and Cyber-physical Systems (software-physical model integration). The group also maintains legacy work in End-User Architecting, Architecture Evolution, and service-oriented platforms for intelligence analysis through SORASCS.
Shawki M. Areibi is a Professor and Area Head of Engineering Systems and Computing in the School of Engineering at the University of Guelph. His research focuses on VLSI Physical Design Automation, Reconfigurable Computing Systems, and Hardware/Software Co-design for Embedded Systems. He leads efforts in developing advanced algorithms for CAD tools, FPGA design, and machine learning applications. His work addresses challenges in VLSI layout optimization, parallel processing, and embedded systems design. Affiliations: AI Affiliated Faculty, Area Heads, Computer Engineering, Engineering Systems and Computing Research. Research Interests: VLSI Circuit Layout, Reconfigurable Computing, Machine Learning, and FPGA-based Accelerators. His research integrates meta-heuristics like Genetic Algorithms and Tabu Search to solve complex optimization problems. He has contributed to hardware acceleration frameworks for machine learning algorithms and embedded systems, with applications in domains like signal processing and data mining. His recent work includes congestion-estimation models for modern FPGAs and analytic placement tools for ultra-scale architectures. Publications span VLSI design, reconfigurable computing, and machine learning, emphasizing algorithmic innovation and hardware-software co-design. His students have explored topics ranging from FPGA placement to domain adaptation in remote sensing. Grants and Advising: Advises graduate and undergraduate students on projects involving FPGA acceleration, machine learning, and embedded systems. His labs focus on developing next-generation CAD tools and hardware accelerators.
