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Zhenman FangView profile

Associate Professor

• Customizable Computing
• Heterogeneous Computing
• FPGA Acceleration
• +8 more

Dr. Zhenman Fang is an Associate Professor at the School of Engineering Science , Simon Fraser University (SFU) , where he founded and directs the HiAccel Lab . He also holds an associate membership in the School of Computing Science at SFU. His research focuses on customizable computing with software-defined hardware acceleration , addressing performance, energy-efficiency, and reliability in post-Moore’s law computing across domains like machine learning , big data analytics , quantum chemistry , and precision medicine . Education: Ph.D. in Computer Science from Fudan University (2014), with a visit to University of Minnesota during his studies. Postdoctoral Work: University of California, Los Angeles (UCLA) (2014-2017). Industry Experience: Staff Software Engineer at Xilinx (2017-2019). Dr. Fang’s research spans the entire computing stack , including application characterization , accelerator-rich architecture design , and programming/tool support . He has developed frameworks like HiSpMV , SyncNN , and SQL2FPGA , emphasizing FPGA acceleration for vision transformers , quantum chemistry , and spiking neural networks . His work has been recognized with 3 best paper awards (FPL 2024, TCAD 2019, MEMSYS 2017) and 3 best paper nominees (FCCM 2025, HPCA 2017, ISPASS 2018). Recent publications highlight trends in low-precision machine learning ( ShiftQuant , ESRU ), quantum chemistry acceleration ( SERI ), and vision transformer optimization ( Quasar-ViT ). His HiAccel Lab actively mentors PhD and MASc students , with notable graduates like Alec Lu (PhD 2024, now at Meta) and Philip Stachura (MASc, now with BC Graduate Scholarship). Scientific Awards: Inaugural SFU Research Excellence Award - Horizon Award (2025) FPL 2024 Stamatis Vassiliadis Best Paper NSERC Alliance Award (2020) CFI JELF Award (2019) Xilinx University Program Award (2019) IEEE Senior Member (2023) Grants: NSERC Discovery Grant (2019) CFI JELF Funding (2019) Huawei and Xilinx sponsorships Dr. Fang leads open-source initiatives like SyncNN , PASTA , and SQL2FPGA , and serves as General Chair for ASAP 2025 and Program Co-Chair for RAW 2025 . His lab collaborates globally with institutions such as UCLA , Northeastern University , and Xidian University .

Guofu NiuView profile

Professor

• Semiconductor Devices
• Compact Modeling
• RF Circuit Design
• +3 more

Guofu Niu is a Professor in the Department of Electrical and Computer Engineering at Auburn University, holding the Ed and Peggy Reynolds Family endowed chair. His research specializes in semiconductor device physics, compact modeling of SiGe heterojunction bipolar transistors (HBTs), FinFETs, and cryogenic electronics for RF and power applications. Key research areas include RF linearity characterization, avalanche effects, thermal noise, and low-temperature device performance. He has developed advanced models (e.g., Mextram) for circuit simulation tools, enhancing the accuracy of semiconductor design workflows. Publications focus on nano-scale device reliability, tunneling currents, and optimization of RF amplifiers, with applications in 5G technology and extreme-environment electronics. Collaborative projects span industry and academia to advance semiconductor modeling frameworks.

Mark LawView profile

Professor

• Semiconductor Device Modeling
• Integrated Circuit Fabrication
• Superconductivity
• +4 more

Mark Law is a Professor in the Department of Electrical & Computer Engineering at the University of Florida, part of the Herbert Wertheim College of Engineering. His research focuses on semiconductor process modeling, integrated circuit fabrication, and superconductivity. He leads the ColdFlux superconductor design tool project and has contributed to advancements in Ga2O3 and GaN-based devices. Education: PhD, Electrical Engineering, Stanford University (1988) MS, Electrical Engineering, Stanford University (1982) BS, Computer Engineering, Iowa State University (1981) Research Interests: Design and modeling of IC fabrication processes, semiconductor device behavior, superconducting electronics, radiation effects in semiconductors, and TCAD simulation tools. His work emphasizes practical applications of advanced materials like Ga2O3 and GaN in power electronics and high-voltage devices. Notable Contributions: Developed the ColdFlux EDA tool for superconducting circuits, pioneered edge termination techniques for β-Ga2O3 rectifiers, and modeled radiation damage in wide-bandgap semiconductors. Awards: Fellow, National Collegiate Honors Council (2023) UF Academy of Distinguished Teaching Scholars (2019) IEEE Electron Device Society J.J. Ebers Award (2010) Multiple teaching awards, including College of Engineering Teacher of the Year (1996). Advising & Grants: While no specific students are listed, his research has been supported by industry and government grants. He advises on semiconductor fabrication processes and has led collaborative projects with SEMI and the Semiconductor Research Corporation. Labs & Teams: Leads the ECE Device Simulation Group and collaborates with the University of Florida’s Materials Science Department on advanced semiconductor projects.

• Semiconductor Devices
• Millimeter-Wave Electronics
• Electronics Engineering
• +3 more

Prof. Colombo R. Bolognesi is a Full Professor of Millimeter-Wave Electronics at ETH Zürich's Department of Information Technology and Electrical Engineering. He holds a PhD in Electrical Engineering from the University of California, Santa Barbara, and has held academic positions at Simon Fraser University (1995-2006) before joining ETH in 2006. His research focuses on III-V semiconductor devices, particularly InP/GaAsSb and InP/GaInAsSb double heterojunction bipolar transistors (DHBTs), with applications in millimeter-wave and terahertz electronics. His work emphasizes device physics, high-frequency performance, and optoelectronic integration, including uni-traveling carrier (UTC) photodiodes and compact modeling. He has authored over 175 publications and holds prestigious awards such as IEEE Fellow (2008) and the Frontiers in Research Award (2001). Education: Bachelor of Electrical Engineering, McGill University (1987) Master of Electrical Engineering, Carleton University (1989) PhD in Electrical Engineering, University of California, Santa Barbara (1994) Research Interests: Millimeter-wave transistors, semiconductor device physics, high-frequency electronics, terahertz applications, UTC photodiodes, and compact modeling. His recent work includes record-breaking power-added efficiency (PAE) in InP/GaAsSb DHBTs at 170 GHz, advanced UTC photodiodes for 300 Gbps communications, and terahertz characterization of DHBTs. He leads a research group at ETH Zurich focused on pushing the boundaries of III-V semiconductor device performance for next-generation RF and optoelectronic systems. Awards: IEEE Fellow (2008), IEEE Senior Member (2003), Frontiers in Research Award (2001), GaAs IC Symposium Best Paper Award (1999), IEE Electronics Letters Premium Award (1998). Advising & Grants: While specific student names are not listed, his research involves collaboration with PhD/Master's students and postdoctoral researchers. His work is supported by grants from the Swiss National Science Foundation and industry partnerships in semiconductor technology. Key projects include developing UTC photodiodes and DHBT-based power amplifiers for 5G/6G applications. Labs/Teams: His research is conducted within ETH Zurich's Millimeter-Wave Electronics group, leveraging state-of-the-art fabrication facilities and characterization tools for III-V semiconductor devices.

• Advanced Device Technologies
• Materials Science
• Nanoengineering
• +4 more

Olin Hartin serves as a Professor of Practice in Arizona State University's School of Electrical, Computer and Energy Engineering, leveraging over 30 years of Fortune 500 industry experience in science and technology. Based at the Tempe campus (GWC 340, Mailcode 5706), he maintains an active research profile with 25 patents and more than 60 scholarly publications. His academic credentials include: Ph.D. in Electrical Engineering M.S. in Electrical Engineering M.S. in Physics B.S. in Physics Hartin's research centers on advanced device technologies and materials, with demonstrated expertise in nanoengineering, RF circuit design, and semiconductor physics. His work bridges theoretical modeling with practical fabrication challenges, particularly in gallium nitride transistor development and electromagnetic compatibility. Recent projects address thermal management in high-power devices and noise isolation techniques for mixed-signal integrated circuits, driven by industry applications in wireless infrastructure. Analysis of his publication history reveals sustained focus on GaN HEMTs since 2010, with increasing emphasis on machine learning applications for FPGA deployment. His work consistently targets real-world implementation challenges, reflecting his industry background through patents in antenna design, ESD protection, and RF component optimization. Professional recognition includes: Senior Member of IEEE In teaching, Hartin supervises senior design laboratories (EEE 488/489) and instructs core courses including Hardware Design Language/Programming Logic (EEE 333), Circuits II (EEE 334), and Machine Learning with FPGA Deployment (EEE 405). His industry perspective enriches curriculum development, though specific grant funding details are not publicly documented. While no dedicated research lab is specified, his patent portfolio indicates ongoing collaboration with semiconductor industry partners.

Luiz Felipe AguinskyView profile

Lecturer

• Computational Nanoelectronics
• Semiconductor Process Simulation
• Machine Learning-Enhanced Modelling
• +7 more

Dr. Luiz Felipe Aguinsky is a Lecturer in Computational Nanoelectronics and Deputy Group Leader of the DeepNano Research Group at the University of Glasgow. He holds a PhD (Dr. techn.) from TU Wien, Austria, where he specialized in semiconductor fabrication process modeling. As an Erwin Schrödinger Fellow at ETH Zurich, he developed machine learning-enhanced models for memristors. His research focuses on computational nanoelectronics, combining advanced simulation techniques with cutting-edge materials science. Education: PhD (Dr. techn.) in Microelectronics, TU Wien (Austria), 2019 (with distinction) Erwin Schrödinger Fellowship at ETH Zurich's Computational Electronics Group (2021–2023) Research Interests: His work integrates machine learning with atomistic simulations to address challenges in semiconductor manufacturing. Key areas include: High-performance TCAD for nanofabrication processes Quantum transport and neuromorphic computing Applied computer graphics for nonimaging applications Level-set methods for surface evolution modeling Publications Trends: Recent work emphasizes knudsen diffusion modeling for nanofabrication, atomic layer deposition simulations, and plasma etching optimization. Cross-disciplinary methods like ray tracing and machine learning feature prominently in his latest projects. Awards & Fellowships: EUROSOI-ULIS Best Poster Award (2021) Erwin Schrödinger Fellowship (FWF, 2023–2025) Professional Activities: Active member of IEEE Nanotechnology Council's Modelling & Simulation Technical Committee. Co-author of over 15 peer-reviewed publications since 2019, with contributions to IEEE NANO, SISPAD, and EuroSOI conferences. Labs/Teams: Leads computational modeling efforts in the DeepNano Research Group, collaborating globally on TCAD innovations for next-generation semiconductor devices.

• Semiconductor Device Simulation
• Nanoelectronics
• TCAD (Technology Computer-Aided Design)
• +3 more

Daniel Nagy is an Assistant Professor at the Department of Electronics and Computing within the Higher Polytechnic School of Engineering at the University of Seville. His research focuses on nanoelectronics, semiconductor device simulation, and TCAD technologies. He leads the ARQCOMP research group, specializing in computer architecture and novel transistor design. Education details are not explicitly provided in the texts, but his academic focus suggests advanced training in electronics engineering or related fields. His research interests include quantum transport phenomena, nanoscale device variability analysis, and computational modeling of FinFETs, nanowire FETs, and nanosheet transistors. He has extensively contributed to TCAD simulation frameworks such as NESS (Nano-Electronic Simulation Software), emphasizing open-source tools. Research Trends: His work emphasizes transistor scaling challenges for sub-2nm nodes, device variability mitigation, and the development of modular simulation tools. Key topics include nanosheet FET optimization, POM-based molecular memory systems, and benchmarking of emerging transistor architectures. His studies often bridge quantum mechanics (via Schrödinger equation modeling) with classical transport phenomena. No scientific awards are mentioned in the provided texts. He has advised no publicly listed PhD/Master’s students. His ARQCOMP group collaborates on next-generation electronic device architectures and simulation methodologies. Labs/Teams: The ARQCOMP group focuses on advancing computer architecture and nanoelectronic device simulation through interdisciplinary approaches, integrating computational physics, materials science, and electrical engineering.

Oves BadamiView profile

Assistant Professor

• Semiconductors Physics
• Computational Nanoelectronics
• TCAD Tool Development
• +3 more

Oves Badami is an Assistant Professor in the Department of Electrical Engineering at the Indian Institute of Technology Hyderabad. His research focuses on semiconductor devices, computational nanoelectronics, and TCAD tool development for modeling and simulation of nanoscale transistors. Research includes carrier transport in nanoelectronic devices and multiscale modeling. Advises doctoral and master’s students on projects like physics-aware machine learning simulations and RRAM-based authentication systems. Contact: oves.badami@ee.iith.ac.in , Room B-204, Academic Block B, IIT Hyderabad, Kandi, Sangareddy, Telangana - 502285.

Kaveh ShamshiView profile

Assistant Professor

• Hardware Security
• Circuit Obfuscation
• Side-Channel Resilient Design
• +3 more

Dr. Kaveh Shamshi is an Assistant Professor in the Electrical and Computer Engineering Department at the University of Texas at Dallas (UTD), affiliated with the Erik Jonsson School of Engineering and Computer Science. He joined UTD in 2020 after completing his Ph.D. at the University of Florida under Dr. Yier Jin. His research focuses on formal methods, hardware security (e.g., circuit obfuscation, side-channel resilience), and CAD tools for trustworthy hardware. He has received best paper awards at HOST’17 and GLSVLSI’18, and was a best paper candidate at DATE’19. Education: B.S., Sharif University of Technology (2014); M.S., University of Central Florida (2017); Ph.D., University of Florida (2020) Key Research Areas: IP protection via circuit obfuscation, side-channel-resistant designs, and beyond-CMOS circuit security His work integrates formal verification and machine learning to combat hardware threats like reverse engineering and supply chain attacks. Recent projects include SAT-based deobfuscation techniques and machine-learning attacks on logic locking schemes. Shamshi teaches courses in applied cryptography and computer architecture, mentoring Ph.D. students in hardware security. He leads a research group developing tools like IcySAT and AppSAT for circuit analysis, and contributes to open-source repositories (e.g., Bitbucket/GitHub projects like scadec and neosat). Current students include Dipali Jain, Guangwei Zhao, and Rajesh Datta.

ENRIQUE COMESAÑA FIGUEROAView profile

Professor

• Spintronics
• Semiconductor Devices
• Nanoelectronics
• +5 more

Enrique Comesaña Figueroa is a Professor at the University of Santiago de Compostela (USC), affiliated with the Department of Electronics and Computing within the Higher Polytechnic School of Engineering. He holds a PhD in Electronics from USC (2013), focusing on tools for simulating magnetic semiconductor devices. His research expertise spans spintronics, semiconductor device simulation, nanoelectronics, and variability in advanced transistor architectures like FinFETs and GAA MOSFETs. Key projects include developing ML-driven tools (e.g., MLFoMpy) for TCAD data analysis and exploring materials like GaN and SiC for high-efficiency photovoltaic systems. He collaborates extensively on optimizing semiconductor devices for space applications and energy conversion. His work emphasizes machine learning integration with solid-state physics for predictive modeling of device performance under statistical variability. Notable contributions include studies on metal grain granularity impacts and thermal management in nanoscale devices. Education: PhD in Electronics (2013), University of Santiago de Compostela Research Groups: ARQCOMP (Computer Architecture) Research Interests: Spin-polarized transport in magnetic devices, nanoelectronics variability, semiconductor materials (GaN/SiC), TCAD simulation tools, and machine learning applications in device optimization. His work bridges theoretical modeling with practical device design, particularly for space and energy systems. Recent Work Trends: Focus on high-efficiency laser power converters using SiC and GaN, statistical variability in advanced transistors (FinFET/NWFET), and AI-driven simulation tools for predictive device analysis. Ongoing projects include optimizing solar cell performance through textured interfaces and photonic designs. Grants & Labs: Involved in projects like RePowerSiC and MLFoMpy development, but specific grant details are not provided. Collaborates with industry on semiconductor toolchain innovations.

• Nanoelectronics
• Spintronics
• Semiconductor Devices
• +4 more

Shaloo Rakheja is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC), where she leads the Quantum Nanoelectronics Laboratory. She holds a Ph.D. from Georgia Institute of Technology and has held academic roles at New York University and postdoctoral positions at MIT. Her research focuses on nanoelectronics, spintronics, and semiconductor devices, with emphasis on energy-efficient computing and magnetic materials. She directs the NSF-funded Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics (ASAP). Education: Ph.D., Electrical and Computer Engineering, Georgia Tech (2012) M.S., Electrical and Computer Engineering, Georgia Tech (2008) Bachelor of Technology, Electrical Engineering, IIT Kanpur (2005) Research Interests: Shaloo’s work spans compact modeling of wide-bandgap semiconductors, spin-based devices for memory and computing, and reconfigurable devices using van der Waals materials. She develops physics-based models to bridge materials, devices, and circuits for next-generation technologies. Key Achievements: Recipient of Intel Alumni Faculty Fellowship and Engineering Council Outstanding Advisor Award Co-author of over 200 publications, including books on hardware security and semiconductor devices Principal Investigator on NSF grants and industry partnerships Developed open-source simulation tools on nanoHUB since 2013 Outreach: Founded the Creative Circuit Design (C²D) workshop to inspire high school students in engineering. Active in K-12 STEM education initiatives.

ANTONIO JESUS GARCIA LOUREIROView profile

Professor

• Semiconductor Device Modeling
• Parallel Computing
• Nanoelectronics
• +4 more

Antonio Jesús García Loureiro is a Professor at the University of Santiago de Compostela, affiliated with the Faculty of Physics and the Department of Electronics and Computing. He is part of the Center for Research in Intelligent Technologies (CITIUS) and the ARQCOMP research group in Computer Architecture. His PhD, completed in 2000 at the same university, focused on semiconductor device simulation (BIPS3D). His research emphasizes semiconductor device modeling, parallel computing, solar cell optimization, and cloud infrastructure evaluation. He has developed advanced 3D simulators for nanoscale devices and studied high-efficiency solar cells, including tandem and thin-film technologies. His work spans computational electronics, nanoelectronics, and high-performance computing, with applications in space and environmental technologies. Collaborations include studies on GaInP-based laser converters and CuO-ZnO thin films for environmental remediation. Education: PhD in Electronics and Computing (2000). Research interests include semiconductor device variability, nanowire and nanosheet FETs, and parallel algorithms for large-scale simulations. He has contributed to optimizing cloud platforms like Apache CloudStack and evaluated hypervisors (Xen, KVM). His recent work involves machine learning integration with TCAD simulations for defect analysis and process optimization. Key projects include GaAs vertical tunnel junction solar cells and SiC-based laser power converters for space applications. He is also involved in interdisciplinary studies, such as gas sensor development and antibiotic degradation using doped oxides.

Antonio Jesús García LoureiroView profile

Professor

• Semiconductor Device Modeling
• Semiconductor Physics
• Parallel Computing
• +3 more

Antonio Jesús García Loureiro is a Professor at the University of Santiago de Compostela (USC), affiliated with the Department of Electronics and Computing within the Faculty of Physics. He is part of the ARQCOMP research group and the Center for Research in Intelligent Technologies (CITIUS). His primary research focuses on semiconductor device modeling, semiconductor physics, and parallel computing, with significant contributions to solar cell technology and high-performance computing. He holds a PhD from USC (2000) with a thesis on semiconductor device simulation. His work bridges computational modeling, nanoelectronics, and renewable energy systems, emphasizing applications like photovoltaic converters and advanced materials. Research Interests : 3D semiconductor device simulation using finite element methods Optimization of solar cell efficiency (CIGS, tandem structures) Nanoscale transistor performance under process variability Laser power conversion systems for space and terrestrial use Machine learning tools for semiconductor data analysis Labs/Teams : Active in CITIUS and ARQCOMP, leading projects on semiconductor device simulation, parallel computing architectures, and energy-efficient systems. Recent Trends in Publications : Current work emphasizes GaN-based photovoltaic systems for space, high-efficiency tandem solar cells, and quantum transport effects in nanoscale FETs.

• Semiconductor Device Simulation
• Nanoelectronics
• Quantum Transport in Nanostructures
• +3 more

Natalia Seoane Iglesias is a Professor at the University of Santiago de Compostela, affiliated with the Department of Electronics and Computing within the Higher Technical School of Engineering. She holds a PhD from the same institution (2007), focusing on optimizing parallel 3D simulators for studying HEMT device fluctuations under the guidance of Dr. Antonio García Loureiro. Her research expertise spans semiconductor device simulation, nanoelectronics, and quantum transport phenomena in nanostructures. She has pioneered work on advanced transistor architectures (e.g., nanosheet/nanowire FETs), materials like GaN and SiC for space applications, and machine learning-driven optimization tools for semiconductor technologies. Her work bridges computational modeling (Monte Carlo, NEGF methods) with experimental nanofabrication challenges. Recent contributions include developing MLFoMpy for TCAD data analysis, high-efficiency laser power converters using SiC, and benchmarking future transistor nodes below 2nm. Her research group (ARQCOMP) focuses on variability reduction in nanoscale devices and sustainable semiconductor manufacturing. Her publications emphasize statistical variability studies in FinFET/NFET architectures, quantum corrections in 3D simulations, and the application of AI to reduce carbon footprint in nanodevice design. She has co-authored over 100 peer-reviewed articles, with a focus on device physics, materials innovation, and computational tools for nanoelectronics.

• Semiconductor Devices
• Statistical Variability Modeling
• Machine Learning in Semiconductor Research
• +3 more

Julian Garcia Fernandez is an Assistant Professor at the Department of Electronics and Computing, affiliated with the Higher Technical School of Engineering at the University of Santiago de Compostela. He holds a Doctorate from the same institution, awarded in 2023 for his thesis on "Statistical study of fluctuations in ultrascaled multigate MOSFET transistors," supervised by Dr. Antonio García Loureiro and Dr. Natalia Seoane Iglesias. His research focuses on semiconductor device variability, machine learning integration in semiconductor research, and advanced transistor architectures such as gate-all-around nanowire and nanosheet FETs. Key areas include statistical modeling of process variations (e.g., line edge roughness, metal grain granularity), thermionic cooling optimization, and sustainable semiconductor fabrication practices. His recent publications (2021-2025) emphasize machine learning-driven approaches to semiconductor device optimization, with trends toward predictive modeling of variability effects and energy-efficient cooling solutions. Notable work includes the development of MLFoMpy—a TCAD data post-processing tool—andPelgrom-based models for advanced FET architectures. No scientific awards or grants are explicitly mentioned in the provided texts. He has not listed advisees or lab affiliations, though his research implies involvement in nanoelectronics and semiconductor technology teams.