John Morgan Sampson is an Associate Professor in the Department of Computer Science and Engineering. His research focuses on energy-efficient computing, neuromorphic systems, and memory safety. Active in energy harvesting systems and in-memory computing Specializes in dark silicon, non-volatile memory, and deep neural networks Collaborates on projects related to distributed sensor networks and secure architectures Research Trends: Recent articles highlight advancements in energy-efficient computer architecture , memory safety validation , and neuromorphic computing . Key subfields include spiking neural networks , edge-cloud partitioning , and heap memory protection .
Dr. Hunmin Kim serves as Assistant Professor in the Department of Electrical and Computer Engineering at Mercer University's School of Engineering, specializing in security and operational resilience of cyber-physical systems with applications in autonomous vehicles, UAVs, and smart grids. His educational background includes: PhD in Electrical Engineering from Pennsylvania State University (2018) BSE in Mechanical Engineering from Pusan National University (2012) Dr. Kim's research centers on developing attack/fault detection mechanisms, robust control frameworks, and path planning algorithms for cyber-physical systems operating in dynamic environments. His work addresses critical security vulnerabilities and coordination challenges in multi-agent systems, with emphasis on verifiable safety guarantees for autonomous operations. Analysis of his 2023-2025 publications reveals strong thematic convergence in resilient control under adversarial conditions, motion planning in complex environments, and assistive technology applications. His work consistently bridges theoretical control systems with practical implementations in autonomous vehicles and UAVs, featuring increasing integration of machine learning techniques for adaptive security. Professional recognition includes: Nomination for 2024 Clayton R. Paul Teaching Excellence Award Dr. Kim actively mentors undergraduate researchers through Mercer's Bear Day events and honors projects, guiding student teams in developing gesture-based drone controls, EMG signal processors, and assistive navigation devices for visually impaired individuals. He maintains extensive peer review commitments across 45+ journals/conferences annually including IEEE Transactions on Automatic Control and Automatica. He contributes to the Collaborative Center for Computing at Mercer University and serves on the IEEE CSS Technology Conferences Editorial Review Board.
Hayssam El-Razouk serves as Associate Professor in the Electrical and Computer Engineering Department at California State University, Fresno within the Lyles College of Engineering. He holds a PhD in Electrical and Computer Engineering from Western University (2015) and maintains active industry connections through prior roles at IBM Canada and RedIron Technologies. Education: PhD in Electrical and Computer Engineering, Western University, London, Ontario, Canada (2015) MESc in Electrical and Computer Engineering, Western University, London, Ontario, Canada (2006) BEng in Electrical and Computer Engineering, Beirut Arab University, Beirut, Lebanon (2002) - First Rank Research Focus: Dr. El-Razouk's work centers on Hardware Security and Cryptographic Hardware , with significant contributions to VLSI Circuits Design for finite field arithmetic. His research bridges theoretical cryptography with practical implementations, emphasizing defect tolerance in digital circuits, data compression techniques, and pseudo-random sequence generation for secure communications. Current projects address emerging threats in embedded systems and IoT security. Publication Trends: Analysis of his 15 most recent publications (2025-2016) reveals consistent specialization in GF(2^m) arithmetic optimization using Gaussian Normal Basis and Polynomial Basis representations. His work demonstrates progressive refinement from foundational finite field operations (2016-2019) toward integrated security solutions (2020-2025), with increasing focus on side-channel attack resistance and hardware-software co-design for real-world applications including automotive systems and smart homes. Scientific Recognition: Natural Sciences and Engineering Research Council (NSERC) Canada Graduate Scholarship-Doctoral (2011-2015) Best Presenter Award, IEEE CCWC 2023 Best Paper Award, IEEE CCWC 2021 Outstanding Faculty Publication Award, CSU Fresno (2019, 2020) Jamal Abdul Nassir Golden Medal Distinction Award (2002) Research Funding and Mentorship: Dr. El-Razouk secured a $378,002 Department of Defense grant (W911NF-21-1-0210) in 2021 for hardware security research. He teaches core courses including ECE 150 (Cloud and Cybersecurity) and ECE 156 (Cryptography), supervising senior design projects on topics like RFID security and temperature monitoring systems. As an IEEE and ASEE member, he actively contributes to conference program committees and journal reviews.
Guillem Aromí Bedmar is a University Professor in the Department of Inorganic and Organic Chemistry at the Faculty of Chemistry, University of Barcelona. He serves as Director of the Institute of Nanoscience and Nanotechnology (IN2UB) and Science Coordinator for the Catalan Agency for Management of University and Research Grants (AGAUR). His academic training includes a Bachelor's Degree in Chemistry from the University of Barcelona (1994), an Ingénieur Chimiste from EHICS Strasbourg (1994), and a Ph.D. in Inorganic Chemistry from Indiana University (1999). University of Barcelona: Bachelor's Degree in Chemistry (1994) EHICS Strasbourg: Ingénieur Chimiste (1994) Indiana University: Ph.D. in Inorganic Chemistry (1999) Prof. Aromí pioneers molecular spin-based quantum computing, focusing on synthesis of coordination complexes and supramolecular assemblies for spintronics, spin crossover, single-molecule magnetism, and photo-responsive quantum devices. His seminal work established molecular qubits and quantum gates, with recent breakthroughs in light-switchable qugates and multi-qubit systems (6-qubit protocols). His research bridges chemistry, physics, and quantum information science , developing molecular platforms for next-generation quantum processors. Analysis of his 15 most recent publications reveals a dominant focus on heterometallic lanthanide complexes for quantum computing applications (70% of articles), with growing emphasis on error correction protocols and multi-qubit architectures . His work consistently integrates spin-crossover phenomena with photo-responsive elements to create externally controllable quantum systems, positioning molecular spintronics at the forefront of quantum information hardware development. Key recognitions include: Three-time recipient of the ICREA Academia Award (2008, 2013, 2018) ERC Starting Grant (ERC-2010-StG-258060) for quantum computing research Prof. Aromí has secured >4.3 MEUR as PI from EU, Spanish, and Catalan grants, including FATMOLS (EU FET-OPEN), SUMO (QUANTERA NET), and Quantum Communications Complementary Plan. His mentoring record spans seven doctoral theses, ten postdocs, and numerous master's students. As Director of IN2UB (re-elected 2022), he oversees one of UB's largest research institutes and leads acquisition of major infrastructure like Spain's only PULSED EPR spectrometer. He leads the Lab of Molecular Design (LabMolDesign), evolving from his foundational Group of Magnetism and Functional Molecules (GMMF). His international leadership includes chairing MOLMAT2012, representing Catalan Chemical Society at EuChemS, and delivering 77+ invited talks worldwide.
Swarnendu Biswas is an Assistant Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Kanpur. He teaches courses including Programming for Performance (CS 610), Analysis of Concurrent Programs (CS 636), and Compiler Design (CS 335), demonstrating his expertise across multiple areas of computer systems. His research interests center on Programming Languages, Compilers, Runtime Systems, and Parallel Software Systems. He leads the PROSPAR (Programming Languages and PARallel Systems) research group, which focuses on developing techniques to build efficient and correct parallel software through program analysis, compiler optimizations, and runtime systems. His recent publications reveal a strong trend in addressing fundamental challenges in parallel computing, with work spanning cache coherence, false sharing detection, data race analysis for GPUs, verification of neural networks, and thermal-aware management of heterogeneous systems. His research bridges theory and practice with significant contributions to both hardware and software aspects of parallel systems. His scientific achievements have been recognized through multiple prestigious awards: Google India Research Award 2021 Google Explore CSR 2022 Research Grant from Intel Corporation SERB Start-up Research Grant 2019 Google Cloud Platform Research Credits (2019, 2020) IITK Initiation Grant 2019 As an advisor, he mentors several PhD and MTech students working on cutting-edge research in parallel systems. His PROSPAR group has secured significant funding from industry and government sources, supporting innovative research in programming languages and parallel systems. The group actively collaborates with industry partners including Google and Intel, addressing real-world challenges in parallel computing. He leads the PROSPAR research group at IIT Kanpur, which brings together faculty, PhD students, and MTech researchers to tackle challenging problems at the intersection of programming languages, compilers, and parallel systems. The group maintains strong industry connections and focuses on practical solutions that can be deployed in real systems.
Rolf Drechsler is a Full Professor and Head of the Group of Computer Architecture at the University of Bremen's Institute of Computer Science since 2001, and Director of the Cyber-Physical Systems Group at DFKI Bremen since 2011. He holds an adjunct professorship at the Indian Statistical Institute and has been affiliated with Duke University. Education: Diploma (1992) and Dr. phil. nat. (1995) in Computer Science from Goethe University Frankfurt Academic Leadership: Dean of Mathematics and Computer Science Faculty (2018-2025), Vice Rector for Research (2008-2013) His research focuses on formal verification , RISC-V architectures , and quantum/in-memory computing . Recent work explores LLM integration in hardware testing and polynomial-based verification techniques. Publications from 2024-2025 span IEEE Transactions , DATE , and DAC , emphasizing automated verification , quantum circuit mapping , and LLM-driven testbench generation . Scientific Awards IEEE/ACM Best Paper Awards (2013, 2018) Berninghausen-Preis for Innovative Teaching (2018) IEEE Fellow (2015) Founder Award for Solvertec (2013) He has served on program committees for DAC, ICCAD, DATE, and founded graduate schools in Embedded Systems and System Design under Germany's Excellence Initiative.
Professor Luca Fanucci is a Full Professor of Electronics at the Department of Information Engineering , University of Pisa. He serves as Rector's Delegate for Inclusion of Students with Disabilities and leads research in integrated circuits, embedded systems, and assistive technologies . Institutional roles include membership in the National University Conference of Delegates for Disability (CNUDD) and leadership in the PhD program in Information Engineering. Born: Montecatini Terme (1965) Education: Laurea in Electronic Engineering (1992), PhD in Information Engineering (1996), University of Pisa Professional Journey: ESA research (1992-1996), CNR researcher (1996-2004), University of Pisa faculty (2004-present) His research focuses on: System-level design of integrated circuits and embedded systems Hardware-software co-design for low power consumption Spacecraft and satellite communication systems Medical devices and telemonitoring platforms Assistive technologies for disabilities Recent publications highlight AI in space applications and telemedicine systems . Key projects include the Ingeniars spin-off for satellite communications and the AsTech National Laboratory for assistive technologies. Scientific Recognition : IEEE Fellow (2019) 40+ patents H-index 34 (5000+ citations) He coordinates international conferences (DATE, HiPEAC, Spacewire) and serves as Associate Editor for Technology and Disability and Microprocessors and Microsystems journals.
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
Jenna DiVincenzo is an Assistant Professor in the Elmore Family School of Electrical and Computer Engineering at Purdue University, where she conducts research at the intersection of programming languages, software engineering, and formal methods. Her work focuses on making verification techniques more usable and scalable for developers. Dr. DiVincenzo earned her PhD in Software Engineering from Carnegie Mellon University in December 2023, where she was co-advised by Dr. Jonathan Aldrich and Dr. Joshua Sunshine. Her dissertation focused on gradual verification technology for recursive heap data structures. She also holds a BS in Mathematics and Computer Science from Youngstown State University. Her primary research area is gradual verification, which seamlessly combines static (compile time) and dynamic (run time) verification techniques to support incremental specification and verification of code. She takes a holistic approach to research, exploring new techniques through mathematical formalizations, user studies, and tool development. Her current projects include gradual verification for Rust, proof synthesis and repair for gradual verifiers, educational impact of gradual verification, evaluating gradual verifiers' soundness, and gradual program analysis. Analysis of her recent publications reveals a strong focus on practical verification techniques that balance developer productivity with software assurance. Her work consistently bridges theoretical foundations with practical implementation, often incorporating empirical evaluation through user studies and performance measurements. She has made significant contributions to understanding how to make verification more incremental and accessible to developers. Google PhD Fellow NSF GRFP Fellow 2022 Rising Star in EECS Dr. DiVincenzo is actively mentoring PhD students in her research group, with recent student achievements including Craig Liu winning first place in the undergraduate category of the SPLASH'24 SRC and Conrad Zimmerman receiving an NSF GRFP award. She previously interned at IBM Research, MIT Lincoln Laboratory, and contributed to language designs for Penrose and Obsidian. Her research has been supported by various grants, though specific current grants aren't detailed in the provided text. Her lab focuses on building practical verification tools, with projects including Gradual C0 (a gradual verifier for recursive heap data structures) and developing gradual verification techniques for Rust. She collaborates with researchers across institutions, including Dr. Lin Tan at Purdue on LLM applications for verification.
Håkan Grahn is a Professor of Computer Engineering at the Department of Computer Science, School of Computing, Blekinge Institute of Technology (BTH) in Sweden. He has been a faculty member since 1996, becoming a full professor in 2007. His academic leadership includes serving as Head of Department (1999-2002) and Dean of Research (2011-2013) at BTH. He leads multiple significant research projects including GPAI (General Purpose AI Computing) and Green Clouds, with funding from ELLIIT, the Knowledge Foundation, and Vinnova. His educational background includes: M.Sc. in Computer Science and Engineering (1990) from Lund University Ph.D. in Computer Engineering (1995) from Lund University Håkan's research spans several interconnected domains in computer science and engineering, with a strong emphasis on practical applications. His work in computer architecture focuses on optimizing system performance through innovative cache coherence protocols and memory management techniques. In the realm of parallel computing , he investigates multicore systems, GPU computing, and thread-level speculation to enhance computational efficiency. His research in AI and machine learning addresses energy efficiency, data stream mining, and practical applications in areas like district heating systems and airborne networks. The integration of image processing with machine learning forms another significant strand of his work, particularly in historical document analysis and medical imaging applications. These research areas converge in his leadership of major initiatives like BigData@BTH and GPAI, where he bridges theoretical advances with real-world implementation challenges. Analysis of Håkan's recent publications reveals a clear trajectory toward increasingly applied research with strong industry connections. While maintaining foundational work in computer architecture, his output increasingly focuses on practical AI applications, energy efficiency in computing, and domain-specific implementations in sectors like telecommunications, energy systems, and defense. The interdisciplinary nature of his work is evident in collaborations spanning computer science, engineering, and domain-specific applications, with a growing emphasis on sustainability and resource optimization in computing systems. Håkan has successfully supervised numerous doctoral students, with ten graduates and six current Ph.D. candidates. His research has been supported by substantial funding from: The Knowledge Foundation (BigData@BTH, HINTS, Green Clouds) ELLIIT (GPAI project) Vinnova (FANET-MCA, Directed COM & EW) Industry partners including Ericsson, Saab, Telenor, and Fortnox He is actively involved in multiple research groups including DISL (Distributed and Intelligent Systems Lab), CCS-Lab (Communication and Computer Systems Research Lab), and previously PAARTS (Parallel Architectures and Applications for Real-Time Systems). His leadership extends to organizing academic events like the Nordic workshop on Multi-Core Computing and the Swedish Artificial Intelligence Society workshop.
Margaret Martonosi is the Hugh Trumbull Adams ’35 Professor of Computer Science at Princeton University. She is a leading figure in power-efficient computer architecture, with pioneering work in narrow-bitwidth operand optimization, thermal management, and mobile sensor networks. Her mentorship initiatives, including the Discipline Specific Workshop program, have significantly impacted diversity and inclusion in computing. Research Interests: Power-aware computer architecture and microarchitecture Mobile sensor networks (e.g., ZebraNet for wildlife tracking) Thermal management in high-performance processors Memory consistency model verification Formal methods for security and hardware validation Article Trends: Her publications focus on energy efficiency in computing, spanning foundational microarchitectural innovations (e.g., narrow operands and thermal management) to full-stack systems like ZebraNet. These works emphasize cross-layer solutions integrating hardware, software, and theoretical modeling. Scientific Awards: 2023 : ACM Frances E. Allen Award for Outstanding Mentoring 2021 : ACM-IEEE CS Eckert-Mauchly Award 2009 : ACM Fellows Mentoring & Grants: Founded the Discipline Specific Workshop program for NSF Broadening Participation in Computing Alliance Mentored 36 PhD students and numerous undergraduates, including women from institutions like Columbia and Georgia Tech Secured funding for diversity-focused initiatives Labs & Teams: Led the ZebraNet Wildlife Tracking Project, collaborating with biologists and engineers to develop energy-efficient mobile sensor networks. Also contributed to the development of the Wattch power estimation tool and Check suite for memory consistency verification.
Anne C. Elster is a Professor and Director of the Heterogeneous and Parallel Computing Lab (HPC-Lab) at NTNU's Department of Computer Science, with additional roles as HPC Leader at the Center for Geophysical Forecasting and Senior Research Fellow at the Oden Institute. She holds board positions at NTNU and its Faculty of Information Technology. Her research spans: High-Performance Computing : GPU acceleration, auto-tuning, and heterogeneous systems Machine Learning : Applied to optimization and computational geosciences Parallel Algorithms : For scientific computing and real-time simulations Her recent publications (2021-2024) focus on GPU auto-tuning, quantum-HPC integration, distributed systems, and ML-driven geophysical data analysis, with strong emphasis on performance optimization across architectures. Awards and honors: IEEE Computer Society Distinguished Contributor (2021) IEEE Distinguished Speaker (2019-2022) IEEE Senior Member (2000) She has supervised 100+ master's students, 15+ PhDs, and secured major grants including EU H2020 projects. Current Post Docs focus on HPC acceleration and AI applications. Her HPC-Lab collaborates with CERN, Equinor, and international universities, specializing in GPU-accelerated scientific computing and tools for performance portability.
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
François-Raymond Boyer is an Associate Professor in the Department of Computer Engineering and Software Engineering at Polytechnique Montréal. He holds a B.Sc. and Ph.D. from Université de Montréal and teaches courses in programming and digital audio. His research spans: Computer architecture and VLSI systems Network processing and traffic management Digital audio signal processing Hardware acceleration and optimization He is affiliated with ReSMiQ (Strategic Cluster for Microsystems) and OICRM (Music Research Observatory). Recent publications focus on 5G network processing, modular programming frameworks, and high-speed traffic management architectures, primarily in IEEE Access and IEEE Transactions on VLSI Systems. Professor Boyer has supervised 3 PhD and 6 Master's students, with research topics including network architecture, audio processing, and hardware design. No scientific awards are mentioned in the available records.
Volkan GÜNEŞ is a Lecturer in the Department of Computer Engineering at Kırşehir Ahi Evran University's Faculty of Engineering and Architecture . He holds a PhD in Computer Science from the University of California, Irvine (2015) and a Master's degree (2010) from the same institution, with a focus on computer engineering. His academic career spans roles at Süleyman Demirel University (2016-2018), Isparta Applied Sciences University (2018-2019), and Kırşehir Ahi Evran University since 2019. Education : PhD in Computer Science and Engineering (2015), MS (2010), BS in Electronics and Computer Education (2006). Research Areas : Cyber-physical systems, smart building optimization, embedded processor design, and fault mitigation in sensor networks. Publications : His work explores CPS applications, energy-efficient HVAC systems, and scalable many-core architectures. Collaborators : Tony Givargis, Steffen Peter, Frank Vahid.
