Michael Carbin is the Jamieson Career Development Assistant Professor of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology (MIT) and leads the MIT Programming Systems Group. His research focuses on programming systems that address system uncertainty to enhance performance, energy efficiency, and resilience, particularly in environments involving neural networks , approximate computing , and unreliable hardware . His work spans probabilistic programming , quantum computing , and machine learning systems . Articles highlight contributions in pruning neural networks , quantum data structures , and compiler optimization , reflecting trends in deep learning , formal verification , and language-driven systems . Scientific Awards : MIT Frank E. Perkins Award (2020) Sloan Research Fellowship (2020) Facebook Research Award (2019) NSF CAREER Award (2018) Best Paper Awards at OOPSLA (2013, 2014) He has advised numerous graduate students and postdocs including Eric Atkinson, Cambridge Yang, and Charles Yuan, and served on program committees for conferences like POPL, OOPSLA, and ICLR. His group collaborates with institutions such as MIT CSAIL and explores applications in quantum algorithms and probabilistic inference .
Cristian Cadar is a Professor in the Department of Computing at Imperial College London, leading the Software Reliability Group . His research focuses on improving software reliability and security through practical techniques in software engineering, computer systems, and program analysis. Education: Ph.D. in Computer Science, Stanford University M.Eng. in Computer Science, MIT B.S. in Computer Science and Mathematics, MIT His research interests center on software engineering and software security , particularly symbolic execution , dynamic symbolic execution (DSE) , and multi-version execution . Current work explores techniques for scalability, constraint solving, and runtime security in software systems. Key trends in his recent articles include optimizing symbolic execution for testing, addressing path explosion in constraint-based test generation, and advancing multi-version execution for dynamic software updates. His publications also cover program analysis , automated testing , and formal methods for software reliability. Awarded prestigious honors such as the Humboldt Research Award (2024) , ERC Consolidator Grant (2018) , and IEEE New Directions Award (2022) . Other accolades include the BCS Roger Needham Award (2019) and SIGOPS Hall of Fame (2018) . Cadar supervises PhD and postdoctoral researchers in software reliability and security. His group has secured grants from the ERC and EPSRC , including a Consolidator Grant (2018) and Early-Career Fellowship (2013) . He actively contributes to conference organizing committees and editorial boards. The Software Reliability Group at Imperial College, led by Cadar, specializes in techniques like KLEE and EXE for automated testing. Their work has been adopted by industry partners such as Fujitsu, IBM, and Microsoft, particularly in runtime security tools like WIT .
Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.
Prof. Akash Kumar is a Professor at the Chair of Embedded Systems at Ruhr University Bochum, Germany. He previously held professorships at TU Dresden (2015–2024) and the National University of Singapore (NUS; 2011–2015). His research focuses on design automation of embedded systems, reliability optimization, and approximate computing, with a strong emphasis on FPGA and emerging technologies. He leads projects such as Lean-MICS (DFG-funded) and SecuREFET-II, addressing cross-layer reliability and secure circuits. Education: PhD in Multimedia Multiprocessor Systems from Eindhoven University of Technology (TUe) and NUS (2005–2009), Master of Technological Design (Embedded Systems) from NUS (2003–2004), and B.Eng (Computer Engineering) from NUS (1999–2002, First Class Honours). Research interests span embedded systems, reconfigurable architectures, and hardware-software co-design. His work includes optimizing energy efficiency, fault tolerance, and cross-layer approximation techniques. Recent publications highlight advancements in FPGA-based accelerators, machine learning optimizations, and mixed-criticality systems. Active in grants and leadership, Kumar is Principal Investigator on multiple DFG and industry-funded projects, emphasizing collaborative research in distributed computing and approximate architectures. His contributions bridge theory and practice, with applications in edge AI, IoT, and cybersecurity.
Prof. Dr.-Ing. Richard Membarth is a Research Professor for System-on-a-Chip and AI at the Edge Computing at Technische Hochschule Ingolstadt (THI). He is affiliated with the Hardware-Software Co-Design group and holds a secondary position at the German Research Center for Artificial Intelligence (DFKI) Saarbrücken. Co-creator of DSL frameworks like AnyDSL and Hipacc Key contributor to MetaDL (AI metaprogramming) and PRIME (predictive rendering) His research bridges GPU computing , domain-specific languages , and compiler technology , with recent work on Vulkan SPIR-V compilation and device-driven SpMV algorithms . Notable awards include the HiPEAC Paper Award (2018) and multiple Best Paper Awards for his compiler frameworks.
Stefano Markidis is a leading researcher in High-Performance Computing (HPC) and quantum computing. His work focuses on developing advanced simulation frameworks, such as the Neko framework for computational fluid dynamics, and optimizing algorithms for heterogeneous architectures. He collaborates extensively with institutions and researchers globally, contributing to fields like plasma physics, quantum systems, and machine learning applications. His research emphasizes scalability, performance optimization, and the integration of cutting-edge technologies like GPU acceleration and quantum computing. Key research interests include extreme-scale simulations, quantum algorithms, and in-situ data analysis techniques. He has published over 200 articles, with recent work addressing challenges in NISQ systems, tensor network simulations, and CUDA-based performance enhancements. His contributions span theoretical and applied domains, bridging computational methods with real-world applications in fusion energy, materials science, and space exploration. Notable collaborations include projects with Philipp Schlatter, Niclas Jansson, and the NISQ application development community. Markidis also explores hybrid frameworks combining classical and quantum computing, aiming to leverage emerging hardware for scientific breakthroughs.
Sergei Savitsky is a Professor at Wedel University of Applied Sciences, where he serves as Head of the Bachelor of Computer Science program and Senate Chairman. He has been a university lecturer at the institution since October 2008, following professional experience at NXP Semiconductors (2006-2008) and Philips Research Europe (2001-2006). His educational background includes: Doctorate in Engineering (Dr.-Ing.) from Technical University of Dresden (2002) with distinction "summa cum laude" Habilitation (Dr.-Ing. habil.) from Technical University of Dresden (2024) with teaching authorization in "Technical Computer Science" Diplom-Informatiker (equivalent to MSc) in Computer Science from Technical University of Dresden (1998) Savitsky's research focuses on reconfigurable computing systems , with particular expertise in FPGA design, hardware acceleration, and error correction coding. His work bridges theoretical computer science with practical hardware implementation, resulting in numerous patents and publications in top venues. He has made significant contributions to the development of adaptive hardware architectures for forward error correction, which are critical for modern communication and storage systems. His recent publications demonstrate a strong trajectory in optimizing hardware design processes, with particular focus on applying machine learning techniques like self-organizing maps and gradient descent algorithms to improve FPGA placement efficiency. His research spans both theoretical foundations and practical applications, with patents filed in collaboration with industry partners like NXP Semiconductors and ST-Ericsson. Among his recognitions is the Best Paper Award at CENICS 2019 for his work on accelerating FPGA placement algorithms. As an educator, Savitsky teaches courses related to digital system design, including "Computer-aided design of digital systems," where he emphasizes algorithmic aspects of Electronic Design Automation beyond basic digital technology concepts.
Zahra Ebrahimi Mamaghani is an academic researcher affiliated with the Embedded Systems team at the Faculty of Electrical Engineering and Information Technology, Ruhr University Bochum. Her work focuses on approximate computing, reconfigurable accelerators, and energy-efficient embedded systems. She completed her B.Sc. and M.Sc. at Sharif University of Technology (Iran) and is a PhD student at TU Dresden. She managed the X-DNet (BMBF-funded, collaborating with Huawei) and GREEN-DNN (acatech/BMDV-funded) projects, emphasizing distributed and in-network computing for 5G/6G applications. Education: B.Sc. and M.Sc. in Electrical Engineering, Sharif University of Technology, Iran PhD Candidate at TU Dresden (Cfaed Institute, 2018–2024) Research Projects: ReAp (DFG, 2018–2021) Relearning (ESF, 2021–2023) X-ReAp (DFG, 2023–2025) X-DNet (BMBF, with Huawei) GREEN-DNN (acatech/BMDV) Research Interests: Approximate computing, energy-efficient edge-to-cloud systems, SW/HW co-design, and reconfigurable architectures for 5G/6G. Her recent publications emphasize cross-layer approximation techniques, energy-efficient CGRAs, and distributed computing frameworks for multi-kernel applications. She advises students on topics like approximation of ML models for high-throughput systems, requiring expertise in FPGA programming (Verilog/VHDL), Python, and ML frameworks like TensorFlow/PyTorch. Her lab focuses on embedded systems and collaborates with industry partners like Huawei. She holds a notable position in managing interdisciplinary projects bridging academia and industry, particularly in sustainable computing for next-generation networks.
Prof. Dr.-Ing. Richard Membarth is a faculty member at Technische Hochschule Ingolstadt , where he holds the professorship for System-on-a-Chip and AI for Edge Computing. He is also affiliated with the German Research Center for Artificial Intelligence (DFKI) as a Senior Researcher and Team Leader for Compiler Technologies and High-Performance Computing, and with the Saarland University Computer Graphics Lab . His research spans GPU computing, domain-specific languages, and compilers. PhD from Friedrich-Alexander University Erlangen-Nürnberg (2013) Postgraduate diploma from Auckland University of Technology His research focuses on: Parallel computer architectures and programming models Automatic code generation for embedded to HPC systems Image processing, computer graphics, and deep learning applications Domain-specific languages for performance-portable code Recent publications highlight compiler design, GPU acceleration, and parallel algorithms. Scientific awards include the HiPEAC Paper Award (2018) and GPCE Best Paper Award (2015) . Professional roles include organizing High-Performance Graphics conferences as Treasurer (2024-2025) and Papers Chair (2020).
Laura Carrington is a researcher at the University of California, San Diego, specializing in High Performance Computing (HPC) with a focus on energy efficiency, memory management, and performance optimization. She has contributed to the development of tools like PEBIL for binary instrumentation, ADAMANT for data movement analysis, and frameworks for power management in large-scale systems. Her research spans multiple domains including ARM processor evaluation, Xeon Phi vectorization, and communication reduction in graph algorithms. Key collaborations include work with Michael Laurenzano, Allan Snavely, Ananta Tiwari, and Pietro Cicotti. Laura's work addresses critical challenges in HPC such as DVFS configuration optimization, workload colocation, and energy-aware algorithm design. While no explicit academic rank is stated, her extensive publication record across 2002-2019 in top venues like SC, IPDPS, and IJHPCA establishes her as a significant contributor to HPC research. Her work has influenced practices in system-level power management, scientific application characterization, and energy-efficient computing for both CPU/DRAM domains and emerging memory technologies.
Walter Binder is a Professor at the University of Lugano, Switzerland, specializing in performance analysis and optimization of Java-based and parallel systems. He has actively contributed to academic committees in conferences such as GPCE, CGO, and ‹Programming›, focusing on virtual machine efficiency, compiler design, and benchmarking methodologies. His research centers on performance profiling tools for the Java Virtual Machine (JVM), including the development of the P3 profiler suite for parallel applications and the Renaissance benchmark suite. Key areas of interest include concurrency, synchronization, dynamic compilation, and multi-language program analysis, with applications in big data processing and stream computing frameworks. Recent publications highlight trends in compiler-level event profiling, AST interpreter optimization, and SQL-to-stream benchmark generation. These works span subfields like SIMD vectorization, task granularity analysis, and native-image startup performance, emphasizing platform independence and low overhead. Notable tools and methodologies developed by Binder have been instrumental in advancing JVM-based parallel computing research. His contributions extend to automated large-scale analysis of public code repositories and performance coaching for fork/join applications.
Oliver Lenke is a Scientific Assistant at the Chair of Integrated Systems , Technical University of Munich (TUM), affiliated with the TUM School of Computation, Information and Technology . He completed his Bachelor’s (2015-2018) and Master’s (2018-2020) in Electrical Engineering at TUM and has been a PhD student since 2020 . His research focuses on MPSoC architectures , memory hierarchies , hardware preloading mechanisms , and FPGA-based system prototyping . His recent publications address topics like near-memory computing , cache prefetching , and runtime adaptive MPSoCs . He supervises students in projects involving VHDL coding , C programming , and MPSoC optimization , collaborating with industry partners such as Infineon AG , BMW AG , and Huawei . His work includes developing non-intrusive performance monitoring frameworks and dynamic memory preloading solutions .
Joachim Jenke is a researcher at RWTH Aachen University, Germany, focusing on parallel computing and high performance computing (HPC). He has published extensively on topics related to data race detection, MPI correctness, OpenMP, and hybrid parallel programming approaches. His research includes developing tools and frameworks for runtime error detection in parallel applications, particularly for remote memory access (RMA) programs, CUDA-aware MPI applications, and hybrid MPI+OpenMP programs. He has contributed to projects like MUST, ThreadSanitizer, and DataRaceBench. Jenke's publications cover the full spectrum of parallel programming challenges, including benchmarking approaches for assessing MPI correctness tools, microbenchmark suites for evaluating race detection tools, and techniques for transparently adding metadata to MPI handles. He works closely with colleagues like Simon Schwitanski, Matthias S. Müller, Alexander Hück, and Christian H. Bischof, and his research has been presented at prestigious conferences such as SC, EuroMPI, and IWOMP.
Roland Leißa is an Assistant Professor in the School of Business Informatics and Mathematics at the University of Mannheim, Germany. His research focuses on programming languages, compilers, and domain-specific languages (DSLs) for high-performance computing across heterogeneous architectures. He teaches courses on parallel programming, compiler construction, and advanced programming topics. His work emphasizes automatic parallelization, intermediate representations, and program optimizations, particularly through partial evaluation techniques. He has contributed to tools like MimIR, AnyDSL, and FLOWER, which address challenges in GPU programming, FPGA synthesis, and ray tracing. Roland leads research on abstracting industrial and scientific application problems into reusable, theoretically sound compiler solutions. His projects span sequence alignment accelerations, dataflow compilation, and vectorization strategies, targeting modern hardware including GPUs and SIMD architectures. Contact: leissa@uni-mannheim.de | Personal Website | ORCID: 0000-0002-2444-6782
Angela Pohl serves as a Professor in the Department of Computer Science and Media at Brandenburg University of Technology. Her academic office is located in Building C, Room C.2.18 at Magdeburger Straße 50, 14770 Brandenburg an der Havel, Germany, with contact available via telephone (+49 3381 355 - 459) and email (angela.pohl@th-brandenburg.de). Her research program centers on high-performance computing and compiler optimization , with critical contributions in: Vector length agnostic programming models for modern SIMD architectures Cost modeling and performance prediction for auto-vectorizers Architecture-specific optimizations for ARM NEON, Intel AVX, and SVE Application of vectorization to multimedia (VVC decoder) and scientific computing (RICH particle detector) Analysis of her 2015-2020 publications reveals a progression from foundational SIMD model evaluation to advanced portable cost modeling. Her work demonstrates consistent focus on bridging compiler technology with hardware capabilities, particularly emphasizing real-world applications in video coding and high-energy physics where vectorization delivers substantial performance gains.
