Find Academic Supervisors

Andrea Arpaci-DusseauView profile

Professor

• File and Storage systems
• Operating systems
• Distributed systems
• +1 more

Andrea Arpaci-Dusseau is the Susan Beth Horwitz WARF Professor of Computer Sciences and Catherine A. Erickson Professor in the School of Computer, Data & Information Sciences at the University of Wisconsin-Madison. She has been a professor at UW-Madison since January 2000 and currently serves as Graduate Advising Chair for the Computer Sciences Department. Her research focuses on computer systems with primary emphasis on file and storage systems, but also making significant contributions in distributed systems, virtualization, and scheduling. According to csrankings.org, she has published the fourth-most papers in premier systems conferences (SOSP and OSDI) and the most at the top file and storage conference (FAST). Professor Arpaci-Dusseau's recent publications demonstrate continued leadership in storage systems research, with increasing focus on cloud architectures, persistent memory technologies, and system reliability. Her work bridges theoretical foundations with practical implementations, consistently addressing real-world challenges in modern computing environments. ACM SIGOPS Mark Weiser Award 2018 (highest honor in systems field) UW-Madison Van Hise Outreach Teaching Award 2017 Multiple Best Paper awards at FAST, SOSP, OSDI, and EuroSys conferences Carolyn Rosner Award for Excellence in Teaching (2010, 2017) Co-chaired major conferences including USENIX ATC '04, FAST '07, OSDI'18, and SOSP'24 Professor Arpaci-Dusseau has co-advised 28 Ph.D. students and is deeply committed to educational outreach through the CaTaPuLT project, which connects UW-Madison students with K-12 schools to teach computational thinking using Scratch. This initiative has reached hundreds of students across Madison and earned her significant recognition for teaching excellence. She leads the Arpaci-Dusseau Systems Lab (ADSL) and is involved with the Wisconsin Institute on Software-defined Datacenters in Madison (WISDoM), where her research group continues to advance state-of-the-art solutions in computer systems.

Chengmo YangView profile

Professor

• Embedded Systems
• Design Automation
• Computer Architecture
• +6 more

Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.

Shweta ShindeView profile

Assistant Professor

• Trusted Computing
• System Security
• Hardware Security
• +4 more

Shweta Shinde is an Assistant Professor in the Department of Computer Science at ETH Zurich where she leads the Secure & Trustworthy Systems (SECTRS) research group. She is also a member of the Institute of Information Security and the ZISC Center at ETH Zurich. Her work bridges theoretical foundations with practical implementations in hardware and system security. Dr. Shinde's research focuses on the intersection of trusted computing, system security, and program analysis. Her group investigates both foundational aspects of security to protect phones, servers, and accelerators, as well as practical aspects of realizing these solutions through large-scale system building. Her work spans hardware security primitives, trusted execution environments, confidential computing, and secure system design across multiple platforms including mobile devices, cloud infrastructure, and blockchain systems. Her publication record demonstrates significant impact in the field, with numerous papers in top security venues including IEEE S&P, USENIX Security, CCS, and NDSS. Her research has uncovered critical vulnerabilities in major hardware security technologies like Intel SGX and AMD SEV-SNP while also proposing novel frameworks for building more secure systems. The work spans multiple domains including hardware security, cloud security, mobile security, and blockchain security, with a consistent thread of identifying and addressing fundamental security challenges in trusted computing. Among her notable achievements are multiple best paper awards including at SysTEX 2025 and nominations at DATE 2025, a Distinguished Paper Award at IEEE S&P 2024, and recognition as a Most Innovative Research Pwnie Award Nominee in 2024. Her work on WeSee received particular attention for breaking AMD SEV-SNP through novel interrupt-based attacks. Dr. Shinde actively mentors PhD students including Mark Kuhne, Supraja Sridhara, Mélisande Zonta-Roudes, Benedict Schlüter, Andrin Bertschi, and others. She teaches courses on Systems Security, Information Security Lab, Seminar on Systems Security, and Current Topics in Information Security at ETH Zurich. Her service to the community includes extensive program committee work for major security conferences including Oakland (S&P), NDSS, USENIX Security, and CCS, where she has served as track co-chair and program co-chair for several workshops.

Insup LeeView profile

Professor

• Cyber-physical Systems
• Real-time and Embedded Systems
• Safe Autonomy
• +3 more

Insup Lee is the Cecilia Fitler Moore Professor in the Department of Computer and Information Science and Director of the PRECISE Center at the University of Pennsylvania's School of Engineering and Applied Science. He holds a secondary appointment in the Department of Electrical and Systems Engineering and the Perelman School of Medicine’s Department of Biostatistics, Epidemiology, and Informatics. IEEE TCCPS Distinguished Leadership Award (2023) Fellow of the AAAS (2022) Test of Time Award, Runtime Verification (2019) Fellow of the ACM (2017) Best Paper Awards at IEEE ICPS, ACM/IEEE ICCPS, and MEMOCODE His research focuses on cyber-physical systems , real-time and embedded systems , safe autonomy , and internet of medical things , with applications in healthcare and connected systems. He advises PhD students including Eric Lu, Kaustubh Sridhar, Sooyong Jang, and Jean Park (co-advised with Kevin Johnson). Recent publications address safety monitoring for learning-enabled systems, model-free control synthesis using reinforcement learning, and multilingual toxicity guardrails for large language models. His team collaborates with institutions like Hillrom and Penn Nursing to optimize medical device usage in clinical settings.

Hyesoon KimView profile

Professor

• Computer Architecture
• GPU
• Compilers and Runtime Systems
• +3 more

Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).

Daniel W. BlissView profile

Professor

• Radar
• Wireless Communications
• Precision Positioning
• +7 more

Daniel W. Bliss is a Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University and Director of ASU's Center for Wireless Information Systems and Computational Architectures (WISCA). With over $50 million in research funding as principal investigator from organizations including DARPA, ONR, Google, and Airbus, his work bridges theoretical foundations with practical implementations across multiple domains of wireless systems. Dr. Bliss received his educational foundation with a B.S.E.E. from Arizona State University (1989), followed by M.S. and Ph.D. degrees in Physics from the University of California-San Diego (1995, 1997). His academic journey includes significant industry experience at General Dynamics (1989-1993) and MIT Lincoln Laboratory (1997-2012) before joining ASU. His research program focuses on advanced wireless systems spanning radar, communications, precision positioning, computational architectures, and medical monitoring applications. Bliss employs information theory, estimation theory, and signal processing to develop novel system concepts with disruptive capabilities. Current research emphasizes RF convergence, integrated sensing and communications, and anticipatory medical analytics using wireless technologies, with particular focus on extracting physiological data from radar signals. Analysis of recent publications reveals a strong trend toward integrated sensing and communications systems, particularly utilizing mmWave and radar technologies for medical monitoring applications. His work increasingly bridges traditional communications and radar domains while expanding into physiological monitoring, demonstrating a clear trajectory toward convergence of wireless technologies for healthcare applications and remote vital sign detection. Dr. Bliss has received significant recognition for his contributions: Fellow of the IEEE (2015) 2021 IEEE Warren D. White Award for Excellence in Radar Engineering 2016-2017 Top 5% Teaching Award at ASU 2017 ASU Fulton Engineering Exemplar Faculty As a dedicated mentor, Dr. Bliss has supervised numerous graduate students through successful dissertation and thesis defenses across both PhD and Master's programs. His research portfolio includes substantial funding from diverse sources with over $50 million secured as principal investigator. Current projects include the $17M DARPA DASH project focused on advanced software-reconfigurable heterogeneous SoCs for next-generation RF systems, and multiple initiatives in contactless vital sign monitoring using radar technologies. Dr. Bliss leads the BLISS Lab and serves as director of WISCA, fostering interdisciplinary research in wireless systems. His team includes researchers working on distributed coherent systems, MIMO radar, RF convergence, and medical monitoring applications, with recent successes including the Making Waves team that tied for first place in the Air Force Spark Tank challenge. He has founded two startup companies: DASH Tech Integrated Circuits Company and the Big Little Sensor Company, focusing on high-performance embedded processing and small-scale radar physiological monitoring, respectively.

• Software Verification
• Formal Methods
• Programming Languages
• +5 more

Jenna Wise DiVincenzo is an Assistant Professor at the Elmore Family School of Electrical and Computer Engineering at Purdue University. She specializes in research areas such as software verification, formal methods, and programming languages, with a focus on gradual verification techniques that combine static and dynamic analysis. Her work emphasizes usability and scalability in verification tools, and she has contributed to projects like Gradual C0 and gradual null-pointer analysis. Dr. DiVincenzo earned her PhD in Software Engineering from Carnegie Mellon University (2023) and a BS in Mathematics and Computer Science from Youngstown State University (2017). She has interned at IBM Research, MIT Lincoln Laboratory, and the Software Engineering Research and Empirical Studies Lab at YSU. Her awards include the Google PhD Fellowship, NSF GRFP Fellowship, and 2022 Rising Star in EECS. Her research projects span theoretical advancements in gradual verification, empirical studies on usability, and practical tool development. She advises PhD students (e.g., Craig Liu, Conrad Zimmerman) and collaborates on initiatives like gradual verification for Rust and educational tools to teach verification concepts. Her work also explores leveraging large language models for specification generation and enhancing verification tool soundness through formal proofs.

Benjamin Carrison-SchaferView profile

Associate Professor

• Reconfigurable Computing
• FPGAs
• Electronic Design Automation
• +7 more

Benjamin Carrison-Schafer is an Associate Professor and Assistant Dean for Graduate Student Success at the Department of Electrical and Computer Engineering, Erik Jonsson School of Engineering and Computer Science, University of Texas at Dallas. He leads the Design Automation and Reconfigurable Computing Laboratory (DARClab), focusing on systems, high-level design, and programming methodologies for VLSI computing systems and FPGAs. Education: MBA from McGill University, Canada (2012) PhD in Electrical and Electronic Engineering from University of Birmingham, UK (2003) Research Interests: His work spans modeling, analysis, synthesis, optimization, and implementation of VLSI systems. Current projects include: Approximate Computing, High-Level Synthesis Design Space Exploration, Hardware Security, Behavioral MPSoC Optimization, and Automatic Fault-Tolerant System Generation. His research blends theory and practice, using analytical and experimental techniques to solve real-world problems. Publication Trends: Recent publications demonstrate strong focus on hardware security, FPGA optimization, and automated design methodologies. Key themes include High-Level Synthesis innovations, hardware acceleration techniques, and cross-disciplinary applications of reconfigurable computing. His work frequently addresses challenges in hardware trustworthiness, energy efficiency, and design automation scalability. Professional Activities: Associate Editor: IEEE Transactions on Sustainable Computing (2022-present) Conference Chair: ICCD 2024, DCAS 2024 Program Committee: ASP-DAC, DATE, FCCM, GLSVLSI Advising & Labs: Supervises multiple PhD and Master's students at DARClab. Current research includes domain-specific architecture design, hardware security, sustainable computing, and ML for VLSI design. The lab collaborates with industry partners like Renesas Electronics and develops commercial tools through spin-off company highX Technologies.

Deian StefanView profile

Associate Professor

• Security
• Programming Languages
• Systems
• +6 more

Deian Stefan is an Associate Professor in the Department of Computer Science and Engineering at the University of California, San Diego (UCSD). His research focuses on building secure systems through interdisciplinary approaches spanning security , programming languages , and systems . Key areas include WebAssembly security , JavaScript JITs , constant-time programming , memory safety , information flow control , and program analysis tools. He co-founded Intrinsic , a web-security startup later acquired by VMWare, and contributed to standards like W3C WebAppSec and Node.js Security Working Groups. Education: PhD in Computer Science from Stanford University (2015), advised by David Mazières, John C. Mitchell, and Alejandro Russo BE and ME in Electrical Engineering from Cooper Union (2011) Research Trends: His work targets secure systems (Web frameworks, sandboxing, runtime systems), language-based security (constant-time programming, memory safety), and verification for security . Recent publications focus on mitigating speculative execution attacks, hardware-assisted sandboxing, and WebAssembly security. Awards & Recognition: Distinguished Paper Award at POPL 2021 and IEEE MICRO Top Picks 2024 Best Paper Award at CollaborateCom 2010 2010.01 Prize by Daniel J. Bernstein (DJB) Most Influential Paper Award at ICFP 2022 Teaching: He has taught graduate and undergraduate courses including Graduate Computer Security (CSE 227) , Building Secure Systems with Rust , and Programming Languages: Principles and Paradigms at UCSD since 2018. Prior teaching experience includes Stanford and Cooper Union.

Nate FosterView profile

Professor

• Programming Languages
• Networking
• Databases
• +5 more

Nate Foster is a Professor of Computer Science at Cornell University and currently serves as the Associate Dean for Research in the Ann S. Bowers College of Computing and Information Science. He is also a Visiting Researcher at Jane Street and served as a Visiting Professor at École Polytechnique Fédérale de Lausanne during the 2023-24 academic year. His research uses ideas from programming languages to solve problems in networking, databases, and security. BA in Computer Science, Williams College (2001) MPhil in History and Philosophy of Science, University of Cambridge (2008, all work completed in 2003) PhD in Computer and Information Science, University of Pennsylvania (2009) Foster's research focuses on developing languages and tools that make it easy for programmers to build secure and reliable systems. His current work centers on the design and implementation of languages and tools for programmable networks, particularly using the P4 language. His past work includes bidirectional languages (also known as 'lenses'), database query languages, data provenance, type systems, mechanized proof, and formal semantics. His research group at Cornell has made significant contributions to network verification, software-defined networking, and formal foundations for programmable data planes. Analysis of Foster's recent publications reveals a strong focus on network verification and programming language foundations for networking. His work consistently applies formal methods to practical networking problems, with a particular emphasis on the NetKAT and P4 languages. Over the past five years, his research has evolved toward more complex network verification techniques, including infinite state verification, active learning of network models, and dependently-typed approaches to network programming. His work bridges theoretical computer science with practical networking systems, making formal methods accessible to network engineers. ACM Fellow (2025) ACM SIGPLAN Robin Milner Award (2023) ACM SIGCOMM Rising Star Award (2018) NSF CAREER Award (2013) Alfred P. Sloan Fellowship (2012) Multiple distinguished paper awards across top conferences including POPL, PLDI, and SIGCOMM Foster has advised numerous PhD and Master's students who have gone on to prominent positions in both industry and academia, with many continuing work in programming languages and networking. He has led multiple significant research grants including an NSF CAREER Award and has been involved in the P4 Language Consortium, serving as Chair of the P4 Language Governing Board. His work has been supported by various organizations including NSF, DARPA, and industry partners like Intel and Jane Street. Foster is also active in the programming languages research community, serving on numerous program committees and as Vice Chair of DARPA's Information Science and Technology (ISAT) study group. Foster leads a vibrant research group at Cornell focused on programming languages for networks, with collaborators from academia and industry. His group has developed several influential tools and frameworks including NetKAT, Petr4, and KATch. They maintain strong connections with the P4 community and work closely with industry partners to ensure their research has practical impact on real-world networking systems.

Lin TanView profile

Professor

• Software-AI synergy
• Software dependability
• Software engineering
• +7 more

Lin Tan is a Professor of Computer Science at Purdue University , holding the Mary J. Elmore New Frontiers Professorship . She joined Purdue in 2019 after serving as a Canada Research Chair and associate professor at the University of Waterloo. She is an ACM Distinguished Member and IEEE Senior Member . Education: PhD in Computer Science, University of Illinois Urbana-Champaign BS in Computer Science and Technology, Zhejiang University Research Interests: Professor Tan’s research lies at the intersection of software engineering , artificial intelligence , and security . Her work focuses on software-AI synergy , software dependability , defect detection & repair , and software text analytics . She leverages machine learning and natural language processing to enhance software reliability, and conversely uses software techniques to improve the dependability of AI systems. Her recent projects include building binary foundation models (Nova), evaluating large language models for code generation and repair, and developing interactive debugging tools that reduce debugging time by one-third. She also explores robot task planning with LLMs and automated front-end development . Awards & Honors: Best Paper Award Finalist, ICRA 2025 ELATES Fellow, 2024-2025 ACM SIGSAC Distinguished Paper Award, CCS 2024 J.P.Morgan AI Faculty Research Awards (2020, 2021, 2022) ACM SIGSOFT Distinguished Paper Awards (ASE 2020, MSR 2018, FSE 2016) Canada Research Chair (2017) Ontario Early Researcher Award (2015) NSERC Discovery Accelerator Supplements Award (2015) Google Faculty Research Awards (2010, 2014) IEEE Micro Top Picks (2006) Advising & Funding: Professor Tan currently advises eight PhD students and has graduated 20+ PhD and Master’s students now thriving in academia (York University, Concordia University, University of Alberta) and industry (Microsoft, Meta, Amazon, Google). Her group is generously supported by NSF , Meta/Facebook Research Awards , J.P.Morgan AI Faculty Awards , and NSF REU programs. Labs & Teams: She leads the Software Reliability & AI Lab at Purdue, recruiting postdocs, PhD, MS, and undergraduate researchers year-round. Lab interests span binary recovery , LLM-based program repair , testing deep-learning libraries , and data-free model extraction .

• Database Management Systems
• Self-Driving Database Architectures
• Transaction Processing Systems
• +4 more

Andy Pavlo is an Associate Professor with Indefinite Tenure in the Computer Science Department at Carnegie Mellon University's School of Computer Science. He is an active member of the CMU Database Group and the Parallel Data Laboratory, where he leads research in database management systems with a focus on self-driving architectures, transaction processing, and large-scale analytics. His work bridges academic research and industry applications through projects like NoisePage, OtterTune (which he co-founded and served as CEO before it ceased operations), and Peloton. Dr. Pavlo's research interests span database management systems with particular emphasis on autonomous database architectures that can self-tune and optimize without human intervention. His work explores transaction processing systems that can handle high-throughput workloads while maintaining consistency, and large-scale data analytics techniques that efficiently process massive datasets. He has made significant contributions to query optimization, database extensibility, and automatic database tuning using machine learning techniques. His recent work on database extensibility revealed critical issues in PostgreSQL's extension ecosystem, showing that approximately 16% of extensions are incompatible with at least one other extension due to API violations and memory errors. His research output demonstrates a consistent focus on practical database systems challenges, with recent publications examining database extensibility, user-defined function optimization, and the cyclical nature of database research. The articles show a strong trend toward making database systems more autonomous, with increasing integration of machine learning techniques for automatic tuning and optimization. His work often combines deep theoretical analysis with practical implementation in open-source systems. Dijkstra Award 2024 for contributions to database systems research Dr. Pavlo actively mentors graduate students, with current advisees including Wan Shen Lim, William Zhang, and Sam Arch (co-advised with Todd Mowry). His former students have gone on to successful careers in both industry and academia. He has secured significant research funding through CMU's affiliate program with major database companies including ClickHouse, DataStax, dbt, Firebolt, MotherDuck, RelationalAI, SingleStore, Spiral, PingCAP/TiDB, Yellowbrick, and Yugabyte. His research is supported by these industry partnerships and likely includes NSF funding given his active participation in the database research community. At CMU, Dr. Pavlo leads the Database Group and organizes several seminar series including "SQL or Death," "Database Building Blocks," and "ML⇄DB Technical Talks." These seminars bring together researchers and practitioners to discuss cutting-edge developments in database systems. He also runs a summer research internship program that has attracted students for multiple consecutive years, indicating a strong research group with ongoing projects and funding.

• Computer Engineering
• Circuit Design
• Fault Tolerance
• +6 more

Matteo Sonza Reorda is a Full Professor at the Polytechnic University of Turin, affiliated with the Department of Automatic Control and Computer Science (DAUIN). He holds roles such as Partnership Agreement Coordinator with SMAT and has served as Vice-Rector for Research (2021–2024). His research focuses on fault tolerance, hardware reliability, and AI acceleration, with contributions to GPU/CNN reliability, self-test libraries, and defect-oriented testing. Education: M.S. in Electronics Engineering, Politecnico di Torino (1986) Ph.D. in Computer Engineering, Politecnico di Torino (1990) Research Interests: His work spans automatic test equipment, circuit reliability, GPU fault tolerance, neural network hardening, and embedded systems safety . He leads the Electronic CAD & Reliability Group and collaborates with institutions like the ISI Foundation and the National Research Council (CNR). Publications & Impact: With over 180 publications, his recent work emphasizes AI accelerator reliability, fault injection techniques, and safety-critical systems. Key trends include GPU resilience for CNNs, self-test library optimization, and radiation fault modeling in neural networks. Awards & Recognition: IEEE Fellow (2016–) Multiple best-paper awards at IEEE conferences (DDECS, DATE, etc.) Grants & Collaborations: Coordinator of EU projects (RESCUE, TUTORIAL) Partnerships with EDF, Marelli Europe, and SMAT Lead on National HPC/Quantum Computing Spoke 1 (2022–2025) Labs/Teams: Leads the CAD Group and collaborates with the French-Italian LIA LAFISI lab on hardware-software integration.

James C. HoeView profile

Professor

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +4 more

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

• Reconfigurable Computing
• FPGA Architectures
• Computer Security
• +6 more

André DeHon is the Oliver C. Boileau Jr. and Nan Eleze Boileau Professor of Electrical Engineering at the University of Pennsylvania, affiliated with Electrical and Systems Engineering (ESE) and Computer and Information Science (CIS). He chairs the Computer Engineering (CMPE) program and directs the CyberSavvy Security Center. His research focuses on reconfigurable computing, FPGA architectures, computer security, and energy-efficient hardware design. He holds a Ph.D. and M.S. from MIT and a B.S. from MIT's Lincoln School. Research interests include reconfigurable computing, FPGA interconnect, hardware security, and fault-tolerant systems. Notable achievements include the SEVER & PROTECT DARPA award and IEEE/ACM Fellowships. Recent work addresses fast FPGA compilation (HiPR, PLD), security through compartmentalization (μSCOPE, SCALPEL), and partial reconfiguration techniques. Teaching includes courses on hardware security, system-on-chip architecture, and digital audio basics. Over 200 publications span FPGA design, network-on-chip optimization, and molecular-scale computing. His labs (Implementation of Computation Group) explore physical implementation of computations through hardware-software co-design.